公开(公告)号：US07095095B2

公开(公告)日：2006-08-22

申请号：US10879372

申请日：2004-06-28

申请人： Tongbi Jiang ,  Zhiping Yin

发明人： Tongbi Jiang ,  Zhiping Yin

IPC分类号： H01L23/58

CPC分类号： H01L29/7842 ,  H01L21/3221 ,  H01L23/4951 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L2924/01019 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： The invention includes a semiconductor construction. The construction has a semiconductor material die with a front surface, a back surface in opposing relation to the front surface, and a thickness of less than 400 microns between the front and back surfaces. The construction also has circuitry associated with the die and over the front surface of the die, and a layer touching the back surface of the die. The layer can correspond to getter-inducing material and/or to a stress-inducing material. The layer can have a composition which includes silicon dioxide and/or silicon nitride. The composition can include one or more hydrogen isotopes, and the hydrogen isotopes can have a higher abundance of deuterium than the natural abundance of deuterium.

摘要翻译： 本发明包括半导体结构。 该结构具有半导体材料模具，其具有前表面，与前表面相对的后表面，并且在前表面和后表面之间的厚度小于400微米。 该结构还具有与管芯相连的电路和管芯前表面上的电路，以及接触管芯背面的层。 该层可以对应于吸气剂诱导材料和/或对应力诱导材料。 该层可以具有包括二氧化硅和/或氮化硅的组成。 该组合物可以包括一种或多种氢同位素，氢同位素可以具有比氘天然丰度更高的氘丰度。

公开(公告)号：US07067894B2

公开(公告)日：2006-06-27

申请号：US10684431

申请日：2003-10-15

申请人： Gurtej S. Sandhu ,  Zhiping Yin

发明人： Gurtej S. Sandhu ,  Zhiping Yin

IPC分类号： H01L31/232

CPC分类号： H01L21/0276 ,  G03F7/091 ,  H01L21/0275 ,  H01L21/31144 ,  H01L21/3145 ,  H01L21/31625 ,  H01L21/76801 ,  H01L21/76829 ,  H01L21/76832 ,  H01L29/7833 ,  Y10S430/151 ,  Y10S438/952

摘要： Techniques are disclosed for fabricating a device using a photolithographic process. The method includes providing a first anti-reflective coating over a surface of a substrate. A layer which is transparent to a wavelength of light used during the photolithographic process is provided over the first anti-reflective coating, and a photosensitive material is provided above the transparent layer. The photosensitive material is exposed to a source of radiation including the wavelength of light. Preferably, the first anti-reflective coating extends beneath substantially the entire transparent layer. The complex refractive index of the first anti-reflective coating can be selected to maximize the absorption at the first anti-reflective coating to reduce notching of the photosensitive material.

摘要翻译： 公开了使用光刻工艺制造器件的技术。 该方法包括在衬底的表面上提供第一抗反射涂层。 在光刻工艺中使用的光的波长透明的层被提供在第一抗反射涂层上，并且感光材料设置在透明层的上方。 感光材料暴露于包括光的波长的辐射源。 优选地，第一抗反射涂层在基本上整个透明层的下方延伸。 可以选择第一抗反射涂层的复合折射率以使第一抗反射涂层处的吸收最大化，以减少光敏材料的凹陷。

公开(公告)号：US07037808B2

公开(公告)日：2006-05-02

申请号：US11197151

申请日：2005-08-03

申请人： Tongbi Jiang ,  Zhiping Yin

发明人： Tongbi Jiang ,  Zhiping Yin

IPC分类号： H01L21/322

CPC分类号： H01L29/7842 ,  H01L21/3221 ,  H01L23/4951 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L2924/01019 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： The invention includes a semiconductor construction. The construction has a semiconductor material die with a front surface, a back surface in opposing relation to the front surface, and a thickness of less than 400 microns between the front and back surfaces. The construction also has circuitry associated with the die and over the front surface of the die, and a layer touching the back surface of the die. The layer can correspond to getter-inducing material and/or to a stress-inducing material. The layer can have a composition which includes silicon dioxide and/or silicon nitride. The composition can include one or more hydrogen isotopes, and the hydrogen isotopes can have a higher abundance of deuterium than the natural abundance of deuterium.

摘要翻译： 本发明包括半导体结构。 该结构具有半导体材料模具，其具有前表面，与前表面相对的后表面，并且在前表面和后表面之间的厚度小于400微米。 该结构还具有与管芯相连的电路和管芯前表面上的电路，以及接触管芯背面的层。 该层可以对应于吸气剂诱导材料和/或对应力诱导材料。 该层可以具有包括二氧化硅和/或氮化硅的组成。 该组合物可以包括一种或多种氢同位素，氢同位素可以具有比氘天然丰度更高的氘丰度。

公开(公告)号：US20060001066A1

公开(公告)日：2006-01-05

申请号：US11203046

申请日：2005-08-12

申请人： Er-Xuan Ping ,  Zhiping Yin

发明人： Er-Xuan Ping ,  Zhiping Yin

IPC分类号： H01L31/119 ,  H01L29/94 ,  H01L27/108 ,  H01L29/76

CPC分类号： H01L21/0217 ,  C23C16/345 ,  H01L21/02129 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/3144 ,  H01L21/3145 ,  H01L21/3185 ,  H01L27/10808 ,  H01L27/10852 ,  H01L28/40 ,  H01L28/84 ,  H01L28/91 ,  H01L29/945

摘要： The invention encompasses a method of forming a silicon nitride layer. A substrate is provided which comprises a first mass and a second mass. The first mass comprises silicon and the second mass comprises silicon oxide. A sacrificial layer is formed over the first mass. While the sacrificial layer is over the first mass, a nitrogen-containing material is formed across the second mass. After the nitrogen-containing material is formed, the sacrificial layer is removed. Subsequently, a silicon nitride layer is formed to extend across the first and second masses, with the silicon nitride layer being over the nitrogen-containing material. Also, a conductivity-enhancing dopant is provided within the first mass. The invention also pertains to methods of forming capacitor constructions.

摘要翻译： 本发明包括形成氮化硅层的方法。 提供了包括第一质量和第二质量的衬底。 第一质量包括硅，第二质量包含氧化硅。 在第一质量块上形成牺牲层。 当牺牲层超过第一质量时，在第二质量块上形成含氮材料。 在形成含氮材料之后，去除牺牲层。 随后，形成氮化硅层以跨越第一和第二质量块延伸，其中氮化硅层在含氮材料之上。 此外，在第一质量块内提供导电性增强掺杂剂。 本发明还涉及形成电容器结构的方法。

公开(公告)号：US06900138B1

公开(公告)日：2005-05-31

申请号：US09259762

申请日：1999-03-01

申请人： Zhiping Yin ,  Mark Fischer

发明人： Zhiping Yin ,  Mark Fischer

IPC分类号： H01L21/027 ,  H01L21/318 ,  H01L21/302

CPC分类号： H01L21/3185 ,  H01L21/0274

摘要： The present invention includes a method for preventing distortion in semiconductor fabrication. The method comprises providing a substrate comprising a film comprising silicon nitride. The substrate is treated in a vacuum of about 3.0-6.5 Torr in an atmosphere comprising oxygen plasma wherein the oxygen plasma flow rate is at least about 300 sccm oxygen. A resist is applied to the treated substrate and the resist is patterned over the treated substrate.

摘要翻译： 本发明包括一种用于防止半导体制造中的变形的方法。 该方法包括提供包含含氮化硅的膜的衬底。 在包含氧等离子体的气氛中，在约3.0-6.5乇的真空中处理衬底，其中氧等离子体流速为至少约300sccm的氧气。 将抗蚀剂施加到经处理的基底上，并且将抗蚀剂图案化在经处理的基底上。

公开(公告)号：US06881606B2

公开(公告)日：2005-04-19

申请号：US10391080

申请日：2003-03-18

申请人： Tongbi Jiang ,  Zhiping Yin ,  Mike Connell

发明人： Tongbi Jiang ,  Zhiping Yin ,  Mike Connell

IPC分类号： H01L21/56 ,  H01L23/29 ,  H01L23/31 ,  H01L21/50

CPC分类号： H01L23/291 ,  H01L21/565 ,  H01L23/3192 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention provides a semiconductor device having a protective layer for use in packaging the semiconductor device. The apparatus includes a dielectric layer, a first passivation layer formed above the dielectric layer, and a protective layer formed above the first passivation layer, the protective layer adapted to reduce stress defect failures in the semiconductor device when packaged.

摘要翻译： 本发明提供一种具有用于封装半导体器件的保护层的半导体器件。 该装置包括电介质层，形成在电介质层之上的第一钝化层以及形成在第一钝化层之上的保护层，该保护层适于在包装时减少半导体器件中的应力缺陷故障。

公开(公告)号：US06790762B1

公开(公告)日：2004-09-14

申请号：US09651386

申请日：2000-08-29

申请人： Zhiping Yin ,  Mark Jost

发明人： Zhiping Yin ,  Mark Jost

IPC分类号： H01L214763

CPC分类号： H01L21/76849 ,  H01L21/76801 ,  H01L21/76867

摘要： As an alternative embodiment and in connection with the reduction of the amount of ammonia in the mixture, processing conditions may be altered from conditions that are less likely to cause formation to oxide husk 20 to conditions that are more likely. For example, processing temperatures sufficient to form passivation layer 32 may be initiated with an ammonia-rich mixture under conditions not likely to cause formation of oxide husk 20. As the amount of ammonia in the mixture is reduced, processing temperatures may be increased proportionally under conditions that are more likely to cause formation of oxide husk 20 than under conditions previously established when the amount of ammonia in the mixture is greater. The initial formation of some of passivation layer 32, however, resists the formation of oxide husk 20. Preferably, the processing temperature will be the same as the deposition temperature for ILD layer 18.

摘要翻译： 本发明涉及ILD层的形成，同时防止金属互连的上表面的氧化降低。 根据本发明，通过在形成ILD之前钝化金属互连的暴露的上表面来避免金属互连的上表面的氧化。为了避免在互连的上表面期间的氧化 立即在形成ILD层之前或同时形成ILD层，互连的上表面的原位钝化避免了现有技术的问题。

公开(公告)号：US06605863B2

公开(公告)日：2003-08-12

申请号：US10178398

申请日：2002-06-24

申请人： Zhiping Yin ,  Gary Chen

发明人： Zhiping Yin ,  Gary Chen

IPC分类号： H01L2358

CPC分类号： H01L21/76814 ,  H01L21/02063 ,  H01L21/0276 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31633 ,  H01L21/76802 ,  H01L21/76807

摘要： Methods of selectively removing post-etch polymer material and dielectric antireflective coatings (DARC) without substantially etching an underlying carbon-doped low k dielectric layer, and compositions for the selective removal of a DARC layer and post-etch polymer material are provided. A composition comprising trimethylammonium fluoride is used to selectively etch a dielectric antireflective coating layer overlying a low k dielectric layer at an etch rate of the antireflective coating layer to the low k dielectric layer that is greater than the etch rate of the antireflective coating to a TEOS layer. The method and composition are useful, for example, in the formation of high aspect ratio openings in low k (carbon doped) silicon oxide dielectric layers and maintaining the integrity of the dimensions of the formed openings during a cleaning step to remove a post-etch polymer and antireflective coating.

公开(公告)号：US06605502B2

公开(公告)日：2003-08-12

申请号：US10172895

申请日：2002-06-17

申请人： Ravi Iyer ,  Steven M. McDonald ,  Thomas R. Glass ,  Zhiping Yin

发明人： Ravi Iyer ,  Steven M. McDonald ,  Thomas R. Glass ,  Zhiping Yin

IPC分类号： H01L2176

CPC分类号： G03F7/091 ,  G03F7/092 ,  H01L21/0276 ,  H01L21/32 ,  H01L21/76202 ,  Y10T428/24471 ,  Y10T428/24917

摘要： A method of forming an oxidation diffusion barrier stack for use in fabrication of integrated circuits includes forming an inorganic antireflective material layer on a semiconductor substrate assembly with an oxidation diffusion barrier layer then formed on the inorganic antireflective material layer. Another method of forming such a stack includes forming a pad oxide layer on the semiconductor substrate assembly with an inorganic antireflective material layer then formed on the pad oxide layer and an oxidation diffusion barrier layer formed on the antireflective material layer. Another method of forming the stack includes forming a pad oxide layer on the semiconductor substrate assembly. A first oxidation diffusion barrier layer is then formed on the pad oxide layer, an inorganic antireflective material layer is formed on the first oxidation diffusion barrier layer, and a second oxidation diffusion barrier layer is formed on the inorganic antireflective material layer. The antireflective material layer may include a layer of material selected from the group of silicon nitride, silicon oxide, and silicon oxynitride and further may be a silicon-rich layer. The oxidation diffusion barrier stacks may be used for oxidation of field regions for isolation in an integration circuit. Further, the various oxidation diffusion barrier stacks are also described.

公开(公告)号：US06495450B1

公开(公告)日：2002-12-17

申请号：US09620790

申请日：2000-07-21

申请人： Ravi Iyer ,  Steven M. McDonald ,  Thomas R. Glass ,  Zhiping Yin

发明人： Ravi Iyer ,  Steven M. McDonald ,  Thomas R. Glass ,  Zhiping Yin

IPC分类号： H01L214763

CPC分类号： G03F7/091 ,  G03F7/092 ,  H01L21/0276 ,  H01L21/32 ,  H01L21/76202 ,  Y10T428/24471 ,  Y10T428/24917

摘要： A method of forming an oxidation diffusion barrier stack for use in fabrication of integrated circuits includes forming an inorganic antireflective material layer on a semiconductor substrate assembly with an oxidation diffusion barrier layer then formed on the inorganic antireflective material layer. Another method of forming such a stack includes forming a pad oxide layer on the semiconductor substrate assembly with an inorganic antireflective material layer then formed on the pad oxide layer and an oxidation diffusion barrier layer formed on the antireflective material layer. The antireflective material layer may include a layer of material selected from the group of silicon nitride, silicon oxide, and silicon oxynitride and further may be a silicon-rich layer. The oxidation diffusion barrier stacks may be used for oxidation of field regions for isolation in an integration circuit. Further, the various oxidation diffusion barrier stacks are also described.

摘要翻译： 形成用于集成电路制造的氧化扩散阻挡层叠体的方法包括在半导体衬底组件上形成无机抗反射材料层，然后在无机抗反射材料层上形成氧化扩散阻挡层。 形成这种堆叠的另一种方法包括在半导体衬底组件上形成衬垫氧化物层，然后在衬垫氧化物层上形成无机抗反射材料层，形成在抗反射材料层上的氧化扩散阻挡层。 抗反射材料层可以包括选自氮化硅，氧化硅和氮氧化硅的材料层，并且还可以是富硅层。 氧化扩散阻挡层可以用于场集成电路中用于隔离的场区氧化。 此外，还描述了各种氧化扩散阻挡层叠体。