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69 条记录 (耗时 0.027 秒)

    Backward compatibility for plug and play systems
    63.
    发明授权
    Backward compatibility for plug and play systems 失效
    即插即用系统的向后兼容性

    公开(公告)号：US5634075A

    公开(公告)日：1997-05-27

    申请号：US371304

    申请日：1995-01-11

    申请人： Stephen A. Smith ,  Suhas A. Shetty ,  Daniel G. Bezzant

    发明人： Stephen A. Smith ,  Suhas A. Shetty ,  Daniel G. Bezzant

    IPC分类号： G06F9/445 ,  G06F12/06 ,  G06F13/00

    CPC分类号： G06F9/4411 ,  G06F12/0646

    摘要： A device for use in a computer system, particularly a personal computer (PC) which provides compatibility for a proposed ISA plug and play (PNP) standard. The device of the present invention is also backward compatible with non-PNP (legacy) PCs. Upon power-up, a device may initialize using default traditional or specification (ISA) values for I/O address, IRQ and DMA channels. If PNP activity by the host PC is detected by the device, the device is disabled, and awaits activation and I/O address, IRQ and DMA channel assignments from a host PC. If no PNP activity by a host PC is detected, the device continues to operate using default traditional or specification (ISA) I/O address, IRQ and DMA channels. The device of the present invention may be installed in PNP or legacy type PCs without reconfiguring hardware (e.g., DIP switches, jumpers or the like) in the device or installing new firmware, operating system, or applications software in a host PC.

    摘要翻译： 一种用于计算机系统中的装置，特别是为所提出的ISA即插即用（PNP）标准提供兼容性的个人计算机（PC）。 本发明的设备也向后兼容非PNP（传统）PC。 上电时，设备可以使用I / O地址，IRQ和DMA通道的默认传统或规范（ISA）值进行初始化。 如果设备检测到主机PC的PNP活动，则该设备被禁用，并且等待主机PC的激活和I / O地址，IRQ和DMA通道分配。 如果没有检测到主机PC的PNP活动，设备将使用默认的传统或规范（ISA）I / O地址，IRQ和DMA通道继续运​​行。 本发明的设备可以安装在PNP或传统型PC中，而不重新配置设备中的硬件（例如，DIP开关，跳线等）或在主机PC中安装新的固件，操作系统或应用软件。

    Adapter for detecting whether a peripheral is standard or multimedia type format and selectively switching the peripheral to couple or bypass the system bus
    64.
    发明授权
    Adapter for detecting whether a peripheral is standard or multimedia type format and selectively switching the peripheral to couple or bypass the system bus 失效
    用于检测外设是标准的还是多媒体格式的适配器，并选择性地切换外设以耦合或绕过系统总线

    公开(公告)号：US5630174A

    公开(公告)日：1997-05-13

    申请号：US383582

    申请日：1995-02-03

    申请人： John E. Stone, III ,  Stephen A. Smith

    发明人： John E. Stone, III ,  Stephen A. Smith

    IPC分类号： G06F3/14 ,  G06F3/16 ,  G06F13/38 ,  G06F13/00 ,  G06F13/14

    CPC分类号： G06F13/385 ,  G06F3/14 ,  G06F3/162 ,  G06F3/1423

    摘要： A computer system including one or more PCMCIA expansion slots allows video and/or audio capabilities to be added to the system through a standard PCMCIA interface, utilizing multimedia type PCMCIA peripheral cards. A PCMCIA host adapter integrated circuit interrogates a PCMCIA peripheral card to determine whether or not the PCMCIA peripheral card is a multimedia type PCMCIA peripheral including video or audio capability. If the PCMCIA peripheral card is a multimedia type peripheral, the PCMCIA host adapter integrated circuit couples the PCMCIA peripheral card directly to the graphics and sound controller integrated circuits, using the standard PCMCIA interface and bypassing the host system bus. Otherwise, if the PCMCIA peripheral card is a standard PCMCIA peripheral, then the PCMCIA host adapter integrated circuit interfaces communications between the PCMCIA peripheral card and the host system bus in a conventional manner. The computer system includes a multi-windowing or display function whereby a typical computer applications program may be operating and displayed in a first window or display while the system simultaneously displays a playback or live video signal from a multimedia type peripheral card in a second window or display.

    摘要翻译： 包括一个或多个PCMCIA扩展槽的计算机系统允许通过使用多媒体类型PCMCIA外围卡的标准PCMCIA接口将视频和/或音频功能添加到系统。 PCMCIA主机适配器集成电路询问PCMCIA外设卡，以确定PCMCIA外设卡是否是包含视频或音频功能的多媒体类型PCMCIA外设。 如果PCMCIA外设卡是多媒体类型外设，则PCMCIA主机适配器集成电路将PCMCIA外设卡直接连接到图形和声音控制器集成电路，使用标准PCMCIA接口并绕过主机系统总线。 否则，如果PCMCIA外设卡是标准PCMCIA外设，则PCMCIA主机适配器集成电路以常规方式接口PCMCIA外设卡与主机系统总线之间的通信。 计算机系统包括多窗口或显示功能，其中典型的计算机应用程序可以在第一窗口或显示器中操作和显示，同时系统在第二窗口中同时显示来自多媒体类型外围卡的播放或实况视频信号，或 显示。

    Low power clocking apparatus and method
    65.
    发明授权
    Low power clocking apparatus and method 失效
    低功率计时装置及方法

    公开(公告)号：US5467042A

    公开(公告)日：1995-11-14

    申请号：US149107

    申请日：1993-11-08

    申请人： Stephen A. Smith ,  Bryan Richter ,  Dave M. Singhal

    发明人： Stephen A. Smith ,  Bryan Richter ,  Dave M. Singhal

    IPC分类号： G06F1/32 ,  H03K3/00

    CPC分类号： G06F1/3287 ,  G06F1/3203 ,  Y02B60/1282

    摘要： A low power clocking apparatus and method is used to reduce power consumption by an electronic system or an integrated circuit that is coupled to an external system via a system bus which is configured to selectively transmit or receive signals from the electronic system or integrated circuit. The electronic system or integrated circuit includes a plurality of sub-circuits. Each sub-circuit is configured to operate under control of a clock signal and further includes an apparatus for keeping or rejecting the clock signal. Once each sub-circuit within the electronic system or integrated circuit rejects the clock signal, an integral arbiter circuit disables the clock signal to all the sub-circuits. The arbiter circuit continuously monitors the system bus. Upon detecting that the sub-circuits will require the clock signal, the arbiter will re-enable the clock signal to all of the sub-circuits.

    摘要翻译： 低功率计时装置和方法被用于通过经配置以选择性地从电子系统或集成电路发送或接收信号的系统总线来耦合到外部系统的电子系统或集成电路来降低功耗。 电子系统或集成电路包括多个子电路。 每个子电路被配置为在时钟信号的控制下操作，并且还包括用于保持或拒绝时钟信号的装置。 一旦电子系统或集成电路中的每个子电路拒绝时钟信号，整数仲裁电路将时钟信号禁止所有子电路。 仲裁器电路连续监视系统总线。 在检测到子电路需要时钟信号时，仲裁器将重新使能到所有子电路的时钟信号。

    Method and apparatus for controlling a mixed voltage interface in a multivoltage system
    66.
    发明授权
    Method and apparatus for controlling a mixed voltage interface in a multivoltage system 失效
    用于控制多电压系统中的混合电压接口的方法和装置

    公开(公告)号：US5440244A

    公开(公告)日：1995-08-08

    申请号：US149061

    申请日：1993-11-08

    申请人： Bryan M. Richter ,  Stephen A. Smith ,  Mike Assar ,  Abdul Q. Kashmiri ,  Jerry L. Clark ,  Dave M. Singhal

    发明人： Bryan M. Richter ,  Stephen A. Smith ,  Mike Assar ,  Abdul Q. Kashmiri ,  Jerry L. Clark ,  Dave M. Singhal

    IPC分类号： H01L27/118 ,  H03K19/00 ,  H03K19/003 ,  H03K19/0185 ,  H03K19/0175

    CPC分类号： H01L27/11898 ,  H03K19/0027 ,  H03K19/00315 ,  H03K19/018521 ,  H03K19/018585 ,  H03K19/018592 ,  H03K2217/0018

    摘要： The design and implementation of a low power CMOS bi-directional I/O buffer that translates low voltage core logic level signals into the highest logic level signals to drive the final output stage which outputs a selectable logic level signal. The buffer further translates input signals of a variety of logic levels into low voltage core logic level signals. In either case, AC and DC power consumption is minimized in a mixed power supply environment that requires voltage translation to represent the proper binary logic levels. An multivoltage I/O buffer having multiple input-receiving NOR gates is also described. The NOR gates of the multivoltage I/O buffer having triggering levels optimized for differing core voltage levels. Also described is a host adapted system for interfacing between and removable peripheral card and a host computer. The host adaptor includes an integrated circuit employing the multivoltage bi-directional I/O buffer.

    摘要翻译： 低功耗CMOS双向I / O缓冲器的设计和实现，将低电压核心逻辑电平信号转换为最高逻辑电平信号，以驱动输出可选逻辑电平信号的最终输出级。 缓冲器还将各种逻辑电平的输入信号转换为低电压核心逻辑电平信号。 在任一情况下，在需要电压转换来表示适当的二进制逻辑电平的混合电源环境中AC和DC功耗被最小化。 还描述了具有多个输入接收NOR门的多电压I / O缓冲器。 具有针对不同核心电压电平优化的触发电平的多电压I / O缓冲器的或非门。 还描述了用于在可移动外围卡和主计算机之间进行接口的主机适配系统。 主机适配器包括采用多电压双向I / O缓冲器的集成电路。

    Thiol carboxylic acid derivatives and their use as collagenase inhibitor
    67.
    发明授权
    Thiol carboxylic acid derivatives and their use as collagenase inhibitor 失效
    噻咯羧酸衍生物及其作为胶原抑制剂的用途

    公开(公告)号：US5109000A

    公开(公告)日：1992-04-28

    申请号：US517391

    申请日：1990-04-30

    申请人： Roger E. Markwell ,  Stephen A. Smith ,  Ian Hughes

    发明人： Roger E. Markwell ,  Stephen A. Smith ,  Ian Hughes

    IPC分类号： C07D209/20 ,  C07D295/185 ,  C07K5/06

    CPC分类号： C07D295/185 ,  C07D209/20 ,  C07K5/06043

    摘要： Novel compounds of the formula (I), processes for their preparation and their use as collagenase inhibitors are described: ##STR1## in which R.sub.1 is hydroxy; alkoxy; aryloxy; aralkyloxy; --NR.sub.6 R.sub.7 where R.sub.6 and R.sub.7 are hydrogen or alkyl, or R.sub.6 and R.sub.7 together with the N-atom to which they are bonded form a 5- to 7-membered ring with an optional heteroatom; --NHCH(R.sub.8)COR.sub.9 is hydrogen; alkyl optionally substituted by hydroxy, alkoxy, --NR.sub.6 R.sub.7, quanidine; CO.sub.2 H, CONH.sub.2, SH, or S-alkyl; or CH.sub.2 --AR where Ar is optionally substituted aryl; and R.sub.9 is hydroxy, alkoxy or --NR.sub.6 R.sub.7.R.sub.2 is hydrogen or acyl.R.sub.3 is C.sub.3-6 alkyl.R.sub.4 is hydrogen; alkyl; --CH.sub.2 R.sub.10 where R.sub.10 is optionally substituted phenyl or heteroaryl; or --CH(R.sub.12) O--R.sub.11 where R.sub.11 is hydrogen; alkyl; or --CH.sub.2 Ph where Ph is optionally substituted phenyl; and R.sub.12 is hydrogen or alkyl.R.sub.5 is hydrogen; alkyl; or --CH(R.sub.13) COR.sub.14 where R.sub.13 is hydrogen or alkyl; and R.sub.14 is hydroxy, alkoxy or --NR.sub.6 R.sub.7.

    Isoquinolines or benzisoquinoliner having antiinflammatory activity
    68.
    发明授权
    Isoquinolines or benzisoquinoliner having antiinflammatory activity 失效

    公开(公告)号：US4745115A

    公开(公告)日：1988-05-17

    申请号：US789105

    申请日：1985-10-18

    申请人： Roger E. Markwell ,  Stephen A. Smith ,  David J. Hunter

    发明人： Roger E. Markwell ,  Stephen A. Smith ,  David J. Hunter

    IPC分类号： A61K31/435 ,  A61K31/47 ,  A61K31/472 ,  A61K31/473 ,  A61P29/00 ,  A61P37/08 ,  C07D217/22 ,  C07D217/24 ,  C07D221/08 ,  C07D221/10 ,  C07D401/04

    CPC分类号： C07D401/04 ,  C07D217/22 ,  C07D217/24 ,  C07D221/08 ,  C07D221/10

    摘要： Compounds of the general formula I ##STR1## in which: R.sub.1 and R.sub.2 are independently hydrogen, C.sub.1-6 alkyl or together are a group X which is C.sub.3-6 polymethylene optionally in which one carbon atom is replaced by O, S or NR.sub.6 wherein R.sub.6 is hydrogen or C.sub.1-6 alkyl;R.sub.3 is a mono- or fused bi-cyclic heteroaromatic group having up to ten atoms in the aromatic ring(s), not more than four of which are selected from nitrogen, oxygen or sulphur, optionally C-substituted by one or more substituents selected from halogen, CF.sub.3, nitro, C.sub.1-6 alkyl, C.sub.1-6 alkoxy, C.sub.1-6 alkylthio, C.sub.2-7 alkanoyl or cyano; or is phenyl or naphthyl, optionally substituted by one or more substituents selected from halogen, CF.sub.3, nitro, C.sub.1-6 alkyl, C.sub.1-6 alkoxy, C.sub.1-6 alkylthio, C.sub.2-7 alkanoyl, carboxyl, C.sub.1-6 alkoxycarbonyl, cyano, CONR.sub.7 R.sub.8 wherein R.sub.7 and R.sub.8 are selected from hydrogen or C.sub.1-6 alkyl or together are a group X; NR.sub.9 R.sub.10 wherein R.sub.9 and R.sub.10 are selected from hydrogen, C.sub.1-6 alkyl, C.sub.2-7 alkanoyl or C.sub.1-6 alkylsulphonyl or together are a group X; SO.sub.2 NR.sub.11 R.sub.12 wherein R.sub.11 and R.sub.12 are selected from hydrogen or C.sub.1-6 alkyl or together are a group X; or S(O).sub.m R.sub.13 wherein m is 1 or 2 and R.sub.13 is C.sub.1-6 alkyl; Z is naphthyl or a mono- or fused bicyclic heteroaromatic ring having up to ten atoms in the aromatic ring(s), not more than four of which are selected from nitrogen, oxygen or sulphur or (when R.sub.3 is an optionally substituted naphthyl or heteroaromatic group as defined) Z is a phenyl ring; and Z is optionally C-substituted by one or two substituents R.sub.4 and R.sub.5 which are independently selected from C.sub.1-6 alkyl, cyano, amino, aminocarbonyl or aminocarbamoyl optionally substituted by one or two C.sub.1-6 alkyl groups or by a group X, halogen, CF.sub.3, nitro, C.sub.1-6 alkoxy, C.sub.1-6 alkylthio, C.sub.2-7 alkanoyloxy or hydroxy, or together on adjacent carbon atoms are methylenedioxy or C.sub.3-5 polymethylene,are disclosed as an active therapeutic substances for the treatment of inflammatory conditions.