摘要:
A field-effect transistor has a semiconductor body with a main area, in which at least one source zone and one drain zone are introduced and which is provided with a gate electrode isolated from a channel region disposed between a source zone and a drain zone by an insulator layer. In the field-effect transistor, the source zone, the drain zone and the channel region are disposed in walls of a respective trench or recess formed in the semiconductor body.
摘要:
The invention relates to a two-chip power IC, in which a sensor chip having a sensor is mounted on a switch chip having a switch. The sensor is electrically connected to the switch in order to turn the switch off when a temperature detected by the sensor exceeds a threshold value which can be preset. In order to ensure that the sensor chip is heated more quickly, at least one supply line for the switch is routed in the vicinity of the sensor so as to assure good heat transfer from the supply line to the sensor.
摘要:
A method for forming a field effect vertical bipolar transistor that includes a semiconductive body that has at its top surface a plurality of emitter zones of one conductivity type, each surrounded by a base zone of the opposite conductivity type, and gate electrodes for creating a channel at the surface through the base zone into the bulk inner portion of the one conduction type and at a bottom surface a collector zone that includes a collector electrode overlying a collector layer of the opposite conduction type overlying a field stop layer heavily doped of the opposite conduction type overlying the inner portion lightly doped of the one conduction type. Each of the collector layer and the field stop layer is less than 2 microns in thickness and the collector layer is used to inject minority carriers into the inner zone when appropriately biased.
摘要:
A field-effect-controllable, vertical semiconductor component, and a method for producing the semiconductor component include a semiconductor body having at least one drain zone of a first conduction type, at least one source zone of the first conduction type, at least one gate electrode insulated from the entire semiconductor body by a gate oxide, and a bulk region of the first conduction type. A source terminal is located on the rear side of the wafer, and a drain terminal and a gate terminal are located on the front side of the wafer.
摘要:
A semiconductor component having a body with an upper surface, a base zone having a portion adjoining the upper surface of the semiconductor body, at least one source zone embedded in the base zone, at least one gate electrode lying parallel to the upper surface that covers at least the portion of the base zone adjoining the upper surface, a contact region constructed and arranged as a buried layer in the base zone and projecting laterally beyond the source zone, the contact region having a higher conductivity than that of the base zone, and an electrode that contacts the source zone and the contact region. In order to improve the contact between base zone and source electrode, the contact region is fashioned as a layer buried in the base zone and projects laterally beyond the source zone. Also, a field effect controlled semiconductor component having at least one source zone, at least one vertical gate electrode arranged in a trench lying vertically relative to the surface, at least one base zone that laterally abuts the trench, a contact region having a depth greater than that of the source zone and a conductivity higher than that of the base zone and is electrically connected thereto, and an electrode that contacts the source zone and the contact region.
摘要:
An integrated comparator circuit includes a first terminal and a second terminal for an operating voltage. An input stage has two complementary MOSFETS having main current paths connected in series defining a common connecting point therebetween. The two MOSFETS have gate terminals connected to the common connecting point. The series circuit of the MOSFETS is connected between the first terminal and a third terminal. An inverter stage has two complementary MOSFETS having main current paths connected in series defining a common connecting point therebetween forming an output terminal. The two complementary MOSFETS have gate terminals connected to the common connecting point of the input stage. The second terminal and the third terminal receive an input signal of the comparator circuit. A fourth terminal is provided for application of a reference potential to determine a switching threshold of the comparator circuit. The reference potential has a level between potentials of the first terminal and the second terminal. The series circuit of the MOSFETs of the inverter stage is connected between the first terminal and the fourth terminal. Each of the MOSFETs of the same channel type are identical.
摘要:
Power MOSFETs with a source-side load are often triggered by so-called charge pumps. In order to provide a faster turnoff, until now the gate-to-source capacitance of the power MOSFET, which is typically constructed as an enhancement MOSFET, has been discharged through a depletion MOSFET that is parallel to the gate-to-source path. Those different MOSFET types require complicated and expensive production technology. A circuit configuration is proposed that makes it possible to use solely enhancement MOSFETs.
摘要:
In power switches, reports should be issued frequently when the load becomes high in impedance and the load current drops below a predetermined value. In the idling case, however, the voltage drop at the power switch is very low and therefore can only be measured with some inaccuracy. Accurate detection of the reduction in the load current is possible, if a resistor is connected parallel, in the ON-state, to the load path of the power switch. The resistance of the resistor is greater by a multiple than the resistance of the internal resistor of the load path of the power switch. A comparator compares the voltage dropping at the load path of the power switch and therefore at the resistor with a predetermined reference voltage, and it signals the dropping of the load current below a value defined by the ratio of the reference voltage and the resistance of the resistor.
摘要:
A power semiconductor component assembly includes a power semiconductor component having a semiconductor body. A controllable switch is connected to the power semiconductor component. A temperature sensor has a given reset time. The temperature sensor is connected to the controllable switch for turning on the controllable switch to control the power semiconductor component from a conducting state into a range of higher resistance once a temperature in the semiconductor body of the power semiconductor component attains a critical value. A delay member is connected between the temperature sensor and the controllable switch. The delay member is triggered upon response of the temperature sensor and has a delay time being longer than the given reset time, for preventing blocking of the controllable switch during the delay time.
摘要:
A signal voltage (E) based upon a supply voltage must be converted to a signal voltage (A) with ground reference so as to enable further processing in a logic circuit. A simple level converter comprises a series connection of a MOSFET (T1) connected to the supply voltage; the MOSFET also comprises a resistor (T2). The source terminal of the MOSFET (T1) is located at the potential of the supply voltage. The voltage to be converted is applied between the gate terminal and the source terminal, and the converted voltage occurs at the resistor (T2). The two voltages are each limited by one Zener diode (D2, D1).