摘要:
A system is disclosed for reducing or removing a form of read disturb in a non-volatile storage device. One embodiment seeks to prevent read disturb by eliminating or minimizing boosting of the channel of the memory elements. For example, one implementation prevents or reduces boosting of the source side of the NAND string channel during a read process. Because the source side of the NAND string channel is not boosted, at least one form of read disturb is minimized or does not occur.
摘要:
A current source for generating a PTAT current using two bipolar transistors with an 1:A emitter area ratio implements a split resistor architecture to cancel mismatch errors in the current mirror of the current source. In one embodiment, a first resistor is coupled to the unit area bipolar transistor and a second resistor is coupled to the A-ratio-area bipolar transistor. The first resistor has a resistance value indicative of the emitter resistance re of the bipolar transistors while the second resistor has a resistance value satisfying the equation re*(lnA−1). In another embodiment, an emitter area trim scheme is applied in a PTAT current source to cancel, in one trim operation, both bipolar transistor area mismatch error and sheet resistance variations. The emitter area trim scheme operates to modify the emitter area of the A-ratio-area bipolar transistor to select the best effective emitter area that provides the most accurate PTAT current.
摘要翻译:使用具有1:A发射极面积比的两个双极晶体管产生PTAT电流的电流源实现了分离电阻架构,以消除电流源的电流镜中的失配误差。 在一个实施例中,第一电阻器耦合到单位区域双极晶体管,并且第二电阻器耦合到A比区域双极晶体管。 第一电阻器具有指示双极晶体管的发射极电阻r e e的电阻值,而第二电阻器具有满足方程式的电阻值(1n-1) )。 在另一个实施例中,在PTAT电流源中施加发射极面积微调方案,以在一个微调操作中消除双极晶体管面积失配误差和薄层电阻变化。 发射极区域修整方案用于修改A比率面积双极晶体管的发射极面积,以选择提供最准确的PTAT电流的最佳有效发射极面积。
摘要:
A system is disclosed for reducing or removing a form of read disturb in a non-volatile storage device. One embodiment seeks to prevent read disturb by eliminating or minimizing boosting of the channel of the memory elements. For example, one implementation prevents or reduces boosting of the source side of the NAND string channel during a read process. Because the source side of the NAND string channel is not boosted, at least one form of read disturb is minimized or does not occur.
摘要:
A non-volatile memory is programmed in a manner which reduces the incidence of program disturb for inhibited memory elements which undergo boosting to reduce program disturb, but which experience reduced boosting benefits due to their word line location. To achieve this result, a word line sequence in which the memory elements are programmed is adjusted so that higher word lines are programmed first, out of sequence relative to the remaining word lines. Additionally, self-boosting can be used for the higher word lines, while erased area self-boosting or a variant can be used for the remaining word lines. Furthermore, pre-charging of the channel of the inhibited memory elements may be employed prior to the self boosting, for the non-volatile storage elements which are programmed after those associated with the first word line.
摘要:
The maximum allowable number of voltage programming pulses to program memory elements of a non-volatile memory device is adjusted to account for changes in the memory elements which occur over time. Programming pulses are applied until the threshold voltage of one or more memory elements reaches a certain verify level, after which a defined maximum number of additional pulses may be applied to other memory elements to allow them to also Teach associated target threshold voltage levels. The technique enforces a maximum allowable number of programming pulses that can change over time as the memory is cycled.
摘要:
The maximum allowable number of voltage programming pulses to program memory elements of a non-volatile memory device is adjusted to account for changes in the memory elements which occur over time. Programming pulses are applied until the threshold voltage of one or more memory elements reaches a certain verify level, after which a defined maximum number of additional pulses may be applied to other memory elements to allow them to also reach associated target threshold voltage levels. The technique enforces a maximum allowable number of programming pulses that can change over time as the memory is cycled.
摘要:
A system, method, and computer program product for measuring wall thickness. After an internal body topology of the model is generated, the topology is traversed between wall elements to determine wall thickness.
摘要:
A lead frame support plate 200 and a window clamp 400 for wire bonding machines are disclosed herein. In a described embodiment, the lead frame support plate 200 includes a network of suction grooves 218 provided on a support surface 212, each suction groove 218 being arranged to be in fluid communication with at least a vacuum hole 216 to enable a suction force to be created, in response to a vacuum force, along the network of suction grooves for holding a lead frame against the support surface. A window clamp 400 having slots for compensating deformation of the window clamp and a method of fabricating the lead frame support plate are also disclosed.
摘要:
The invention provides Stat3 and Tyk2 targets that have importance for diagnosis of neurode-generative diseases such as Alzheimer's disease. Stat3 and Tyk2 are also important as targets for drug development for neurodegenerative diseases.
摘要:
To program a set of non-volatile storage elements, a set of programming pulses are applied to the control gates (or other terminals) of the non-volatile storage elements. The programming pulses have a constant pulse width and increasing magnitudes until a maximum voltage is reached. At that point, the magnitude of the programming pulses stops increasing and the programming pulses are applied in a manner to provide varying time duration of the programming signal between verification operations. For example, after the pulses reach the maximum magnitude the pulse widths are increased. Alternatively, after the pulses reach the maximum magnitude multiple program pulses are applied between verification operations.