公开(公告)号：US09512532B2

公开(公告)日：2016-12-06

申请号：US14065720

申请日：2013-10-29

Applicant: Microfabrica Inc.

Inventor： Dennis R. Smalley

IPC: C25D5/02 ,  B81C1/00 ,  G01P15/08 ,  G01P15/125 ,  H01L21/288 ,  H01L21/768 ,  H01P1/202 ,  H01P3/06 ,  H01P5/18 ,  H01P11/00 ,  C25D1/00 ,  C23C18/16 ,  G06F17/50 ,  H05K3/46

CPC classification number: C25D5/02 ,  B33Y10/00 ,  B33Y50/00 ,  B33Y50/02 ,  B81B2201/042 ,  B81C1/00126 ,  B81C1/0038 ,  C23C18/1605 ,  C23C18/1651 ,  C25D1/003 ,  G01P15/0802 ,  G01P15/125 ,  G06F17/5072 ,  H01L21/2885 ,  H01L21/76885 ,  H01P1/202 ,  H01P3/06 ,  H01P5/183 ,  H01P11/00 ,  H01P11/005 ,  H05K3/4647

Abstract: Multi-layer structures are electrochemically fabricated by depositing a first material, selectively etching the first material (e.g. via a mask), depositing a second material to fill in the voids created by the etching, and then planarizing the depositions so as to bound the layer being created and thereafter adding additional layers to previously formed layers. The first and second depositions may be of the blanket or selective type. The repetition of the formation process for forming successive layers may be repeated with or without variations (e.g. variations in: patterns; numbers or existence of or parameters associated with depositions, etchings, and or planarization operations; the order of operations, or the materials deposited). Other embodiments form multi-layer structures using operations that interlace material deposited in association with some layers with material deposited in association with other layers.

公开(公告)号：US20140209473A1

公开(公告)日：2014-07-31

申请号：US14185613

申请日：2014-02-20

Applicant: Microfabrica Inc.

Inventor： Adam L. Cohen ,  Michael S. Lockard ,  Kieun Kim ,  Qui T. Le ,  Gang Zhang ,  Uri Frodis ,  Dale S. McPherson ,  Dennis R. Smalley

IPC: C25D5/02

CPC classification number: C25D5/022 ,  B81C1/00126 ,  B81C2201/0109 ,  B81C2201/019 ,  C23C18/1605 ,  C23C18/1651 ,  C25D1/003 ,  Y10T156/11 ,  Y10T156/19

Abstract: Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.

Abstract translation: 本发明的一些实施例涉及在电介质或部分电介质基底上建立单层或多层结构的技术。 某些实施方案将种子层材料直接沉积到基底材料上，而其它实施例使用中间粘合层材料。 一些实施例使用不同种子层材料和/或用于牺牲和结构导电建筑材料的粘合层材料。 一些实施例将种子层和/或粘合层材料应用于有选择性的方式，而其它实施例以毯子的方式应用材料。 一些实施例通过平面化操作去除外来沉积物（例如沉积到不想要形成层的一部分的区域），而其他实施例通过蚀刻操作去除外来材料。 其它实施方案涉及使用至少一种导电结构材料，至少一种导电牺牲材料和至少一种电介质材料形成的多层中尺度或微结构结构的电化学制造。 在一些实施方案中，电介质材料是可UV固化的光聚合物。

公开(公告)号：US20140134453A1

公开(公告)日：2014-05-15

申请号：US14017535

申请日：2013-09-04

Applicant: Microfabrica Inc.

Inventor： Ming Ting Wu ,  Rulon J. Larsen, III ,  Young Kim ,  Kieun Kim ,  Adam L. Cohen ,  Ananda H. Kumar ,  Michael S. Lockard ,  Dennis R. Smalley

IPC: B32B15/01

CPC classification number: G01R1/06761 ,  B32B15/01 ,  Y10T428/12486

Abstract: Some embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes for use in die level testing of semiconductor devices) from a core material and a shell or coating material that (1) partially coats the surface of the structure, (2) completely coats the surface of the structure, and/or (3) completely coats the surface of structural material of each layer from which the structure is formed including interlayer regions. These embodiments incorporate both the core material and the shell material into the structure as each layer is formed along with a sacrificial material that is removed after formation of all layers of the structure. In some embodiments the core material may be a material that would be removed with sacrificial material if it were accessible by an etchant during removal of the sacrificial material.

Abstract translation: 本发明的一些实施方案涉及用于从核心材料和壳或涂层材料形成结构或器件（例如用于半导体器件的晶片级测试的微探针）的电化学制造方法，（1）部分地涂覆结构的表面 ，（2）完全涂覆结构的表面，和/或（3）完全涂覆包含中间层区域的结构形成的各层结构材料的表面。 这些实施例将芯材料和壳体材料结合到结构中，因为每个层与形成所述结构的所有层之后被去除的牺牲材料一起形成。 在一些实施例中，芯材料可以是如果在去除牺牲材料期间可通过蚀刻剂使用牺牲材料将其去除的材料。

公开(公告)号：US20140008235A1

公开(公告)日：2014-01-09

申请号：US13657375

申请日：2012-10-22

Applicant: Microfabrica Inc.

Inventor： Dennis R. Smalley ,  Adam L. Cohen ,  Ananda H. Kumar ,  Michael S. Lockard

IPC: C25D5/02

CPC classification number: A61N1/00 ,  C23C18/1605 ,  C23C18/1651 ,  C25D1/003 ,  C25D1/20 ,  C25D5/022 ,  G01R1/0483 ,  G01R1/06716 ,  G01R1/07357 ,  G01R31/2886 ,  H05K3/467 ,  H05K3/4682

Abstract: Electrochemical fabrication processes and apparatus for producing multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers including operations for providing coatings of dielectric material that isolate at least portions of a first conductive material from (1) other portions of the first conductive material, (2) a second conductive material, or (3) another dielectric material, and wherein the thickness of the dielectric coatings are thin compared to the thicknesses of the layers used in forming the structures. In some preferred embodiments, portions of each individual layer are encapsulated by dielectric material while in other embodiments only boundaries between distinct regions of materials are isolated from one another by dielectric barriers.

Abstract translation: 用于生产多层结构的电化学制造方法和装置，其中每个层包括至少两种材料的沉积，并且其中形成至少一些层，包括用于提供将第一导电材料的至少一部分与 （1）第一导电材料的其它部分，（2）第二导电材料或（3）另一种电介质材料，并且其中电介质涂层的厚度与用于形成结构的层的厚度相比较薄。 在一些优选实施例中，每个单独层的部分被电介质材料包封，而在其它实施例中，材料的不同区域之间的边界通过电介质屏障彼此隔离。