公开(公告)号：US20090280614A1

公开(公告)日：2009-11-12

申请号：US12503042

申请日：2009-07-14

申请人： Neng-Kuo Chen ,  Chien-Chung Huang ,  Jei-Ming Chen

发明人： Neng-Kuo Chen ,  Chien-Chung Huang ,  Jei-Ming Chen

IPC分类号： H01L21/336

CPC分类号： H01L21/2652 ,  H01L21/2658 ,  H01L21/823807 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7843

摘要： A method is disclosed to make a strained-silicon PMOS or CMOS transistor, in which, a compressive stress film is formed by reacting a silane having at least one substituent selected from the group consisting of hydrocarbyl, hydrocarboxy, carbonyl, formyl, carboxylic group, ester group, and halo group and ammonia, or a conventional compressive stress film is implanted with fluorine atoms, oxygen atoms, or carbon atoms, so as to improve the properties of negative bias temperature instability (NBTI).

摘要翻译： 公开了制造应变硅PMOS或CMOS晶体管的方法，其中通过使具有至少一个选自烃基，烃羧基，羰基，甲酰基，羧基的取代基的硅烷反应形成压应力膜， 酯基，卤代基和氨，或者常规的压应力膜注入氟原子，氧原子或碳原子，以提高负偏压温度不稳定性（NBTI）的性质。

公开(公告)号：US20090274852A1

公开(公告)日：2009-11-05

申请号：US12496652

申请日：2009-07-02

申请人： Neng-Kuo Chen ,  Teng-Chun Tsai ,  Chien-Chung Huang

发明人： Neng-Kuo Chen ,  Teng-Chun Tsai ,  Chien-Chung Huang

IPC分类号： B05D1/00

CPC分类号： H01L21/31633 ,  H01L21/02126 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/823807 ,  H01L23/3192 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7843 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for fabricating strained silicon transistors is disclosed. First, a semiconductor substrate is provided, in which the semiconductor substrate includes a gate, at least a spacer, and a source/drain region formed thereon. Next, a precursor, silane, and ammonia are injected, in which the precursor is reacted with silane and ammonia to form a high compressive stress film on the surface of the gate, the spacer, and the source/drain region. Preferably, the high compressive stress film can be utilized in the fabrication of a poly stressor, a contact etch stop layer, and dual contact etch stop layers.

摘要翻译： 公开了制造应变硅晶体管的方法。 首先，提供半导体衬底，其中半导体衬底包括栅极，至少一个间隔物和形成在其上的源极/漏极区域。 接下来，注入前体，硅烷和氨，其中前体与硅烷和氨反应，以在栅极，间隔物和源极/漏极区的表面上形成高压缩应力膜。 优选地，高压缩应力膜可以用于制造多应力器，接触蚀刻停止层和双接触蚀刻停止层。

公开(公告)号：US07585790B2

公开(公告)日：2009-09-08

申请号：US11459008

申请日：2006-07-20

申请人： Wen-Han Hung ,  Cheng-Tung Huang ,  Kun-Hsien Lee ,  Shyh-Fann Ting ,  Li-Shian Jeng ,  Tzyy-Ming Cheng ,  Chia-Wen Liang ,  Neng-Kuo Chen

发明人： Wen-Han Hung ,  Cheng-Tung Huang ,  Kun-Hsien Lee ,  Shyh-Fann Ting ,  Li-Shian Jeng ,  Tzyy-Ming Cheng ,  Chia-Wen Liang ,  Neng-Kuo Chen

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L29/7833 ,  H01L21/823807 ,  H01L21/823835 ,  H01L27/092 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/7843

摘要： A method of forming a semiconductor device. The method comprises steps of providing a substrate having a first transistor, a second transistor and non-salicide device formed thereon and the conductive type of the first transistor is different from that of the second transistor. A buffer layer is formed over the substrate and a tensile material layer is formed over the buffer layer. A portion of the tensile material layer over the second transistor is thinned and a spike annealing process is performed. The tensile material layer is removed to expose the buffer layer over the substrate and a patterned salicide blocking layer is formed over the non-salicide device. A salicide process is performed for forming a salicide layer on a portion of the first transistor and the second transistor.

摘要翻译： 一种形成半导体器件的方法。 该方法包括以下步骤：提供具有形成在其上的第一晶体管，第二晶体管和非自对准硅化物器件的衬底，并且第一晶体管的导电类型与第二晶体管的导电类型不同。 在衬底上形成缓冲层，并在缓冲层上形成拉伸材料层。 第二晶体管上的拉伸材料层的一部分变薄，并且执行尖峰退火处理。 除去拉伸材料层以暴露衬底上的缓冲层，并且在非自对准硅化物器件上形成图案化的自对准硅化物阻挡层。 执行自对准处理以在第一晶体管和第二晶体管的一部分上形成自对准硅化物层。

公开(公告)号：US07566668B2

公开(公告)日：2009-07-28

申请号：US11963999

申请日：2007-12-24

申请人： Neng-Kuo Chen ,  Teng-Chun Tsai ,  Chien-Chung Huang

发明人： Neng-Kuo Chen ,  Teng-Chun Tsai ,  Chien-Chung Huang

IPC分类号： H01L21/469 ,  H01L21/338

CPC分类号： H01L21/76837 ,  H01L21/76801

摘要： A method of forming a contact is provided. A substrate having at least two metal oxide semiconductor devices is provided and a gap is formed between the two devices. A first stress layer is formed over the substrate to cover the metal-oxide semiconductor devices and the substrate. The first stress layer is formed by first forming a first stress material layer over the substrate to cover the metal-oxide semiconductor devices and to fill the gap, the stress material inside the gap. An etching back process is then performed to remove a portion of the stress material layer inside the gap. A second stress layer and a dielectric layer are sequentially formed on the first stress layer. A portion of the second stress layer is removed to form a contact opening. A first conductive layer is filled into the contact opening to form a contact.

摘要翻译： 提供了形成接触的方法。 提供具有至少两个金属氧化物半导体器件的衬底，并且在两个器件之间形成间隙。 在衬底上形成第一应力层以覆盖金属氧化物半导体器件和衬底。 第一应力层通过首先在衬底上形成第一应力材料层以覆盖金属氧化物半导体器件并填充间隙内的应力材料而形成。 然后执行回蚀处理以去除间隙内部的应力材料层的一部分。 第一应力层和电介质层依次形成在第一应力层上。 去除第二应力层的一部分以形成接触开口。 将第一导电层填充到接触开口中以形成接触。

公开(公告)号：US07541298B2

公开(公告)日：2009-06-02

申请号：US11621968

申请日：2007-01-10

申请人： Shao-Ta Hsu ,  Neng-Kuo Chen ,  Teng-Chun Tsai

发明人： Shao-Ta Hsu ,  Neng-Kuo Chen ,  Teng-Chun Tsai

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/31612 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/02337 ,  H01L21/76224

摘要： A method for filling silicon oxide materials into a trench includes providing a substrate having a plurality of trenches, performing a first deposition process to form a first silicon oxide layer in the trenches, and performing a second deposition process to form a second silicon oxide layer in the trenches. The reactant gas of the first deposition process has a first O3/TEOS flow ratio larger than a second O3/TEOS flow ratio of the reactant gas of the second deposition process.

摘要翻译： 将氧化硅材料填充到沟槽中的方法包括提供具有多个沟槽的衬底，执行第一沉积工艺以在沟槽中形成第一氧化硅层，以及执行第二沉积工艺以形成第二氧化硅层 壕沟 第一沉积工艺的反应气体具有比第二沉积工艺的反应气体的第二O 3 / TEOS流量比大的第一O 3 / TEOS流动比。

公开(公告)号：US20090068854A1

公开(公告)日：2009-03-12

申请号：US11853475

申请日：2007-09-11

申请人： Neng-Kuo Chen ,  Chao-Ching Hsieh ,  Chien-Chung Huang

发明人： Neng-Kuo Chen ,  Chao-Ching Hsieh ,  Chien-Chung Huang

IPC分类号： H01L21/31

CPC分类号： H01L21/3185 ,  H01L21/76832 ,  H01L21/76837 ,  H01L21/823412 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/7843

摘要： A method for fabricating a silicon nitride gap-filling layer is provided. A pre-multi-step formation process is performed to form a stacked layer constituting as a dense film on a substrate. Then, a post-single step deposition process is conducted to form a cap layer constituting as a sparse film on the stacked layer, wherein the cap layer has a thickness of at least 10% of the total film thickness.

摘要翻译： 提供了一种制造氮化硅间隙填充层的方法。 进行预多级形成处理，以在基板上形成构成致密膜的层叠层。 然后，进行单一步骤沉积处理，以在层叠层上形成构成稀薄膜的覆盖层，其中盖层的厚度为总膜厚度的至少10％。

公开(公告)号：US07494878B2

公开(公告)日：2009-02-24

申请号：US11552532

申请日：2006-10-25

申请人： Kun-Hsien Lee ,  Cheng-Tung Huang ,  Wen-Han Hung ,  Shyh-Fann Ting ,  Li-Shian Jeng ,  Tzyy-Ming Cheng ,  Neng-Kuo Chen ,  Shao-Ta Hsu ,  Teng-Chun Tsai ,  Chien-Chung Huang

发明人： Kun-Hsien Lee ,  Cheng-Tung Huang ,  Wen-Han Hung ,  Shyh-Fann Ting ,  Li-Shian Jeng ,  Tzyy-Ming Cheng ,  Neng-Kuo Chen ,  Shao-Ta Hsu ,  Teng-Chun Tsai ,  Chien-Chung Huang

IPC分类号： H01L21/8234

CPC分类号： H01L21/823807 ,  H01L21/823835 ,  H01L21/82385 ,  H01L21/823864 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/7843

摘要： A method of manufacturing a MOS transistor device. First, a semiconductor substrate having a gate structure is prepared. The gate structure has two sidewalls and a liner on the sidewalls. Subsequently, a stressed cap layer is formed on the semiconductor substrate, and covers the gate structure and the liner. Next, an activating process is performed. Furthermore, the stressed cap layer is etched to be a salicide block. Afterward, a salicide process is performed to form a silicide layer on the regions that are not covered by the stressed cap layer.

摘要翻译： 一种制造MOS晶体管器件的方法。 首先，准备具有栅极结构的半导体基板。 栅极结构在侧壁上具有两个侧壁和衬垫。 随后，在半导体衬底上形成应力覆盖层，并覆盖栅极结构和衬垫。 接下来，执行激活处理。 此外，将应力覆盖层蚀刻成为自对准硅化物块。 之后，进行自对准处理以在未被应力覆盖层覆盖的区域上形成硅化物层。

公开(公告)号：US07485515B2

公开(公告)日：2009-02-03

申请号：US11308641

申请日：2006-04-17

申请人： Neng-Kuo Chen ,  Teng-Chun Tsai ,  Chien-Chung Huang

发明人： Neng-Kuo Chen ,  Teng-Chun Tsai ,  Chien-Chung Huang

IPC分类号： H01L21/337

CPC分类号： H01L21/0217 ,  H01L21/0214 ,  H01L21/02167 ,  H01L21/02271 ,  H01L21/3145 ,  H01L21/3185 ,  H01L21/823807 ,  H01L29/7843 ,  H01L29/7845

摘要： A method of forming compressive nitride film is provided. The method includes performing a chemical vapor deposition (CVD) process to form a nitride film on a substrate, and the method is characterized by adding a certain gas, selected from among Ar, N2, Kr, Xe, and mixtures thereof. Due to the addition of the foregoing certain gas, it can increase the compressive stress, thereby increasing PMOS drive current gain.

摘要翻译： 提供一种形成压缩氮化物膜的方法。 该方法包括进行化学气相沉积（CVD）工艺以在衬底上形成氮化物膜，该方法的特征在于加入选自Ar，N2，Kr，Xe及其混合物中的某些气体。 由于加入上述某些气体，可以增加压缩应力，从而增加PMOS驱动电流增益。

公开(公告)号：US20080237748A1

公开(公告)日：2008-10-02

申请号：US12123452

申请日：2008-05-19

申请人： Neng-Kuo Chen ,  Teng-Chun Tsai ,  Chien-Chung Huang

发明人： Neng-Kuo Chen ,  Teng-Chun Tsai ,  Chien-Chung Huang

IPC分类号： H01L29/00

CPC分类号： H01L21/31633 ,  H01L21/02126 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/823807 ,  H01L23/3192 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7843 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for fabricating strained silicon transistors is disclosed. First, a semiconductor substrate is provided, in which the semiconductor substrate includes a gate, at least a spacer, and a source/drain region formed thereon. Next, a precursor, silane, and ammonia are injected, in which the precursor is reacted with silane and ammonia to form a high compressive stress film on the surface of the gate, the spacer, and the source/drain region. Preferably, the high compressive stress film can be utilized in the fabrication of a poly stressor, a contact etch stop layer, and dual contact etch stop layers.

公开(公告)号：US20080188091A1

公开(公告)日：2008-08-07

申请号：US12043905

申请日：2008-03-06

申请人： SHAO-TA HSU ,  Teng-Chun Tsai ,  Neng-Kuo Chen ,  Hsiu-Lien Liao ,  Cheng-Han Wu ,  Wen-Han Hung

发明人： SHAO-TA HSU ,  Teng-Chun Tsai ,  Neng-Kuo Chen ,  Hsiu-Lien Liao ,  Cheng-Han Wu ,  Wen-Han Hung

IPC分类号： H01L21/469

CPC分类号： H01L27/092 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/823807 ,  H01L29/7843

摘要： A method for forming a semiconductor device is provided. The method comprises steps of providing a substrate having a first-conductive-type transistor and a second-conductive-type transistor formed thereon and then forming a stress layer over the substrate to conformally cover the first-conductive-type transistor and the second-conductive-type transistor. A cap layer is formed on the stress layer over the first-conductive-type transistor. A modification process is performed. The cap layer is removed.

摘要翻译： 提供一种形成半导体器件的方法。 该方法包括以下步骤：提供具有形成在其上的第一导电型晶体管和第二导电型晶体管的衬底，然后在衬底上形成应力层以共形覆盖第一导电型晶体管和第二导电型晶体管 型晶体管。 在第一导电型晶体管上的应力层上形成覆盖层。 执行修改处理。 盖层被去除。