公开(公告)号：US20110084607A1

公开(公告)日：2011-04-14

申请号：US12925078

申请日：2010-10-13

Applicant: Peter J. Hopper ,  Ann M. Gabrys ,  William French

Inventor： Peter J. Hopper ,  Ann M. Gabrys ,  William French

IPC: H01J7/44 ,  H05K1/18 ,  H05K3/10

CPC classification number: H05K1/165 ,  H05B33/0803 ,  H05B33/0815 ,  H05K1/162 ,  H05K1/186 ,  H05K2201/086 ,  H05K2201/10106

Abstract: A method includes forming one or more capacitors over a substrate. The method also includes forming a transformer at least partially over the substrate. The transformer is adjacent to at least one of the one or more capacitors. At least a portion of the transformer is formed at a same level over the substrate as the one or more capacitors. The method further includes coupling the one or more capacitors and the transformer to at least one embedded integrated circuit die. The one or more capacitors, the transformer, and the at least one embedded integrated circuit die form at least part of a light emitting diode (LED) driver.

Abstract translation: 一种方法包括在衬底上形成一个或多个电容器。 该方法还包括至少部分地在衬底上形成变压器。 变压器与一个或多个电容器中的至少一个相邻。 所述变压器的至少一部分与所述一个或多个电容器形成在与所述衬底相同的电平上。 该方法还包括将一个或多个电容器和变压器耦合到至少一个嵌入式集成电路管芯。 一个或多个电容器，变压器和至少一个嵌入式集成电路管芯形成发光二极管（LED）驱动器的至少一部分。

公开(公告)号：US07875955B1

公开(公告)日：2011-01-25

申请号：US11713921

申请日：2007-03-05

Applicant: Peter J. Hopper ,  Peter Johnson ,  Kyuwoon Hwang ,  Philipp Lindorfer

Inventor： Peter J. Hopper ,  Peter Johnson ,  Kyuwoon Hwang ,  Philipp Lindorfer

IPC: H01L27/08

CPC classification number: H01L23/5227 ,  H01F17/0006 ,  H01F17/02 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

Abstract: An on-chip inductor structure for a DC-DC power regulator circuit merges the switching transistor metallization with the inductor. Thick top level conductor metal that is used to strap the transistor array and to lower its on-state resistance is also used to extend the power inductor into the transistor array. Thus, the structure includes three basic components: a power inductor that spirals around the transistor array, the transistor array itself, and the transistor array metallization that is used to form a distributed inductance situated over the transistor array.

Abstract translation: 用于DC-DC功率调节器电路的片上电感器结构将开关晶体管金属化与电感器并入。 用于绑定晶体管阵列并降低其导通电阻的厚顶级导体金属也用于将功率电感器扩展到晶体管阵列中。 因此，该结构包括三个基本部件：围绕晶体管阵列螺旋的功率电感器，晶体管阵列本身以及用于形成位于晶体管阵列上方的分布式电感器的晶体管阵列金属化。

公开(公告)号：US07839242B1

公开(公告)日：2010-11-23

申请号：US11893535

申请日：2007-08-16

Applicant: Peter J. Hopper ,  Trevor Niblock ,  Peter Johnson ,  Vladislav Vashchenko

Inventor： Peter J. Hopper ,  Trevor Niblock ,  Peter Johnson ,  Vladislav Vashchenko

IPC: H01H51/34

CPC classification number: H02M3/34

Abstract: A MEMS magnetic flux switch is fabricated as a ferromagnetic core. The core includes a center cantilever that is fabricated as a free beam that can oscillate at a resonant frequency that is determined by its mechanical and material properties. The center cantilever is moved by impulses applied by an associated motion oscillator, which can be magnetic or electric actuators.

Abstract translation: MEMS磁通开关被制造为铁磁芯。 芯包括中心悬臂，其被制造为可以以其机械和材料性质确定的共振频率振荡的自由梁。 中心悬臂由相关运动振荡器施加的脉冲移动，运动振荡器可以是磁性或电动执行器。

公开(公告)号：US07800127B1

公开(公告)日：2010-09-21

申请号：US11503593

申请日：2006-08-14

Applicant: Vladislav Vashchenko ,  Alexander Burinskiy ,  Peter J. Hopper ,  Vladimir Kuznetsov

Inventor： Vladislav Vashchenko ,  Alexander Burinskiy ,  Peter J. Hopper ,  Vladimir Kuznetsov

IPC: H01L23/62

CPC classification number: H01L29/7436 ,  H01L27/0262 ,  H01L29/87

Abstract: In an ESD device for fast switching applications based on a BSCR or NLDMOS-SCR, an anode junction control electrode is provided by not connecting the anode electrode to the collector of the BSCR or to the drain of the NLDMOS-SCR, and a cathode junction control electrode is provided by forming an additional n+ region in the BSCR or an additional p+ region in the p-well of the NLDMOS-SCR. The triggering voltage of the ESD device is adjusted after a time delay by controlling one or both of the control electrodes using an RC-timer-driver circuit.

Abstract translation: 在用于基于BSCR或NLDMOS-SCR的快速切换应用的ESD装置中，阳极结控制电极通过不将阳极电极连接到BSCR的集电极或NLDMOS-SCR的漏极而提供，并且阴极结 通过在BSCR中的附加n +区域或NLDMOS-SCR的p阱中的附加p +区域形成控制电极。 通过使用RC定时器驱动器电路控制一个或两个控制电极，在延迟之后调整ESD装置的触发电压。

公开(公告)号：US07795102B1

公开(公告)日：2010-09-14

申请号：US11654735

申请日：2007-01-17

Applicant: Vladislav Vashchenko ,  Vladimir Kuznetsov ,  Peter J. Hopper

Inventor： Vladislav Vashchenko ,  Vladimir Kuznetsov ,  Peter J. Hopper

IPC: H01L21/331

CPC classification number: H01L29/8611 ,  H01L27/0255 ,  H01L29/161 ,  H01L29/66128

Abstract: In a SiGe BJT process, a diode is formed by defining a p-n junction between the BJT collector and BJT internal base, blocking the external gate regions of the BJT and doping the emitter poly of the BJT with the same dopant type as the internal base thereby using the emitter contact to define the contact to the internal base. Electrical contact to the collector is established through a sub-collector or by means of a second emitter poly and internal base both doped with the same dopant type as the collector.

Abstract translation: 在SiGe BJT工艺中，通过限定BJT集电极和BJT内部基极之间的pn结，形成二极管，阻挡BJT的外部栅极区域，并以与内部基底相同的掺杂剂类型掺杂BJT的发射极多晶， 使用发射极接触来定义与内部基座的接触。 通过子集电极或通过掺杂与收集器相同的掺杂剂类型的第二发射极多晶硅和内部基极建立与集电极的电接触。

公开(公告)号：US20100144116A1

公开(公告)日：2010-06-10

申请号：US12315934

申请日：2008-12-08

Applicant: Peter J. Hopper ,  William French ,  Kyuwoon Hwang

Inventor： Peter J. Hopper ,  William French ,  Kyuwoon Hwang

IPC: H01L21/76

CPC classification number: H01L21/76283

Abstract: In a SOI process, a high lateral voltage isolation structure is formed by providing at least two concentric dielectric filled trenches, removing the semiconductor material between the dielectric filled trenches and filling the resultant gap with dielectric material to define a single wide dielectric filled trench.

Abstract translation: 在SOI工艺中，通过提供至少两个同心的电介质填充的沟槽来形成高横向电压隔离结构，去除介电填充的沟槽之间的半导体材料，并用电介质材料填充所得的间隙以限定单个宽的电介质填充的沟槽。

公开(公告)号：US20100141374A1

公开(公告)日：2010-06-10

申请号：US12315930

申请日：2008-12-08

Applicant: Peter J. Hopper ,  William French ,  Kyuwoon Hwang

Inventor： Peter J. Hopper ,  William French ,  Kyuwoon Hwang

IPC: H01F27/28 ,  H01F27/34

CPC classification number: H01F27/2804 ,  H01F27/34 ,  H01L23/5227 ,  H01L23/645 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In an on-chip transformer, external electromagnetic field influences are reduced by providing an isolation transformer having primary and secondary windings with a figure 8 configuration so that current induced by an external magnetic field is nulled.

Abstract translation: 在片上变压器中，通过提供具有图8构造的初级和次级绕组的隔离变压器来减小外部电磁场的影响，使得由外部磁场引起的电流为零。

公开(公告)号：US20100141292A1

公开(公告)日：2010-06-10

申请号：US12315933

申请日：2008-12-08

Applicant: Peter J. Hopper

Inventor： Peter J. Hopper

IPC: G01R31/26 ,  H01F5/00

CPC classification number: G01L1/14 ,  G01B7/345 ,  G01B2210/56 ,  H01F5/003

Abstract: In a MEMS wafer, film stresses are measured by placing an inductor array over or under the wafer and measuring inductance variations across the array to obtain a map defining the amount of bowing of the wafer.

Abstract translation: 在MEMS晶片中，通过将电感器阵列放置在晶片上方或下方并测量阵列上的电感变化来测量膜应力，以获得限定晶片弯曲量的映射。

公开(公告)号：US20090296493A1

公开(公告)日：2009-12-03

申请号：US12539872

申请日：2009-08-12

Applicant: Yuri Mirgorodski ,  Peter J. Hopper ,  Roozbeh Parsa

Inventor： Yuri Mirgorodski ,  Peter J. Hopper ,  Roozbeh Parsa

IPC: G11C16/04

CPC classification number: G11C16/10 ,  H01L27/11558 ,  H01L29/66825 ,  H01L29/7881

Abstract: A method of operating a non-volatile memory (NVM) cell structure that utilizes gated diode is provided. The cell architecture, utilizing about 4-10 um2 per bit, includes gated diodes that are used to program the cells while consuming low programming current. The cell architecture also allows a large number of cells to be programmed at the same time, thereby reducing the effective programming time per bit. Erase and read mode bias conditions are also provided.

Abstract translation: 提供了一种操作使用门控二极管的非易失性存储器（NVM）单元结构的方法。 该单元架构使用大约4-10 um2每位，包括门控二极管，用于对单元进行编程，同时消耗低编程电流。 单元架构还允许在同一时间编程大量单元，从而减少每位的有效编程时间。 还提供擦除和读取模式偏置条件。

公开(公告)号：US20090116269A1

公开(公告)日：2009-05-07

申请号：US11982633

申请日：2007-11-02

Applicant: Visvamohan Yegnashankaran ,  Peter J. Hopper

Inventor： Visvamohan Yegnashankaran ,  Peter J. Hopper

IPC: H02M7/155 ,  H02M7/02

CPC classification number: H02M3/33507 ,  H02M2001/0032 ,  Y02B70/16

Abstract: Detection and control circuitry are added to a conventional power supply to detect when a load, such as a portable electronic device, has been disconnected from the power supply and, when disconnected, interrupt a current path to the primary windings of a transformer within the power supply to substantially reduce the amount of reactive power that is consumed by the power supply.

Abstract translation: 将检测和控制电路添加到常规电源中以检测何时诸如便携式电子设备的负载已经从电源断开，并且当断开连接时，中断到电力内的变压器的初级绕组的电流通路 供应以显着减少由电源消耗的无功功率的量。