Wall assembly and method for attaching walls for flat panel display
    61.
    发明授权
    Wall assembly and method for attaching walls for flat panel display 有权
    用于平板显示器的墙壁安装和墙壁安装方法

    公开(公告)号:US06225737B1

    公开(公告)日:2001-05-01

    申请号:US09397790

    申请日:1999-09-16

    IPC分类号: H01J2902

    摘要: A flat panel display and a method for forming a flat panel display. In one embodiment, the flat panel display includes a wall which is held in place by a structure formed either on the faceplate or on the backplate. In one embodiment the supporting structure is formed by two adjacent walls that form a slot which mechanically restrains the wall. In another embodiment a slot is formed within the faceplate and the walls of the slot mechanically restrain the wall. In one embodiment wall segments are inserted into supporting structures that mechanically restrain each wall segment. In another embodiment a UV curable or a heat curable adhesive is used to maintain walls in their proper alignment and position. In yet another embodiment a conductive material is melted so as to bond conductive lines located on the wall and conductive lines located on the faceplate. This bond electrically connects the conductive lines located on the wall and the conductive lines located on the faceplate and maintains the wall in the proper alignment. The present invention eliminates the need for feet which attach to individual walls for maintaining the walls in the proper alignment.

    摘要翻译: 平板显示器和平板显示器的形成方法。 在一个实施例中,平板显示器包括通过形成在面板上或背板上的结构保持在适当位置的壁。 在一个实施例中,支撑结构由两个相邻的壁形成,其形成机械地限制壁的槽。 在另一个实施例中,在面板内形成槽,并且槽的壁机械地限制壁。 在一个实施例中,壁段插入到机械地限制每个壁段的支撑结构中。 在另一个实施方案中,使用UV可固化或可热固化的粘合剂来保持壁的正确对准和位置。 在另一个实施例中,导电材料被熔​​化以便粘合位于壁上的导电线和位于面板上的导电线。 该接合电连接位于壁上的导电线和位于面板上的导电线,并使壁保持正确的对准。 本发明消除了对连接到各个壁的脚的需要,以保持壁的适当对准。

    Flat panel display with encapsulated matrix structure
    62.
    发明授权
    Flat panel display with encapsulated matrix structure 失效
    具有封装矩阵结构的平板显示器

    公开(公告)号:US06215241B1

    公开(公告)日:2001-04-10

    申请号:US09087785

    申请日:1998-05-29

    IPC分类号: H01J1304

    摘要: Encapsulated matrix structures for flat panel displays are disclosed. In one embodiment, a field emission display includes a focusing structure disposed between a faceplate and a backplate, and a contamination prevention structure covering the focusing structure thereby preventing thermal outgassing and electron desorption of contaminants from the focusing structure. In another embodiment, a flat panel display includes a faceplate (100), a matrix structure (102), a porous material layer (702), a non-porous material layer (704), and a conductive coating (706).

    摘要翻译: 公开了用于平板显示器的封装的矩阵结构。 在一个实施例中,场发射显示器包括设置在面板和背板之间的聚焦结构,以及覆盖聚焦结构的防污染结构,从而防止来自聚焦结构的污染物的热除气和电子解吸。 在另一个实施例中,平板显示器包括面板(100),矩阵结构(102),多孔材料层(702),无孔材料层(704)和导电涂层(706)。

    Electrochemical removal of material in electron-emitting device
    63.
    发明授权
    Electrochemical removal of material in electron-emitting device 失效
    在电子发射器件中电化学去除材料

    公开(公告)号:US6120674A

    公开(公告)日:2000-09-19

    申请号:US884701

    申请日:1997-06-30

    IPC分类号: H01J9/02 C25F3/00

    CPC分类号: H01J9/025

    摘要: An electrochemical procedure is employed to selectively remove certain material from a structure without significantly electrochemically attacking other material of the same chemical type as the removed material. The material to be removed constitutes part or all of an electrically non-insulating region (52C). The material which is of the same chemical type as the removed material but which is not to be significantly electrochemically attacked during the removal procedure constitutes part or all of another electrically non-insulating region (52A) electrically decoupled from the first-mentioned non-insulating region. The electrochemical removal procedure is performed with an organically based electrolytic solution containing organic solvent and acid. The electrochemical removal procedure is typically assisted with an impedance component (42B) having characteristics designed to overcome electrical short problems between the material to be removed and the material not to be significantly electrochemically attacked.

    摘要翻译: 使用电化学方法从结构中选择性地去除某些材料,而不会显着地电化学地攻击与去除的材料相同的化学类型的其它材料。 要去除的材料构成电绝缘区域(52C)的一部分或全部。 与去除材料具有相同化学类型但在去除过程中不被显着电化学侵蚀的材料构成与第一种非绝缘的电绝缘的电绝缘区(52A)的一部分或全部, 地区。 电化学去除程序是用含有机溶剂和酸的有机基电解液进行的。 电化学去除程序通常由具有被设计成克服要移除的材料与不被显着电化学攻击的材料之间的电短路问题的特征的阻抗部件(42B)协助。

    Cleaning of flat-panel display
    64.
    发明授权
    Cleaning of flat-panel display 失效
    清洁平板显示器

    公开(公告)号:US6113708A

    公开(公告)日:2000-09-05

    申请号:US85037

    申请日:1998-05-26

    摘要: A component (10 or 12) of a flat-panel display is cleaned with a fluid having a mole-fraction dominant constituent. The cleaning operation is performed by subjecting the component to the cleaning fluid while its absolute pressure exceeds the absolute pressure at the triple point of the dominant constituent and is at least 20% of the absolute pressure value at the critical point of the dominant constituent. The temperature and pressure of the cleaning fluid are typically controlled in a direction toward the supercritical state of the dominant constituent.

    摘要翻译: 平板显示器的部件(10或12)用具有摩尔分数的主要成分的流体清洁。 清洗操作是通过使组分经受清洁液体的绝对压力超过主要成分的三重点处的绝对压力并且在主要成分的临界点处的绝对压力值的至少20%来进行。 清洗液的温度和压力通常控制在朝向主要成分的超临界状态的方向。

    Relaxed write timing for a memory device
    65.
    发明授权
    Relaxed write timing for a memory device 失效
    轻松的记忆设备的写时序

    公开(公告)号:US6026031A

    公开(公告)日:2000-02-15

    申请号:US78069

    申请日:1998-05-13

    IPC分类号: G11C7/22 G11C16/04

    CPC分类号: G11C7/22

    摘要: A memory device provides a relaxed write timing scheme that improves access time. The address and/or the data is set up to the memory array during a previous write cycle so that the next write cycle can proceed without delays produced in delivering the address and/or the data to the array during the write cycle in which the data is to be written to the array.

    摘要翻译: 存储器件提供了一种改善访问时间的轻松的写时序方案。 地址和/或数据在先前写入周期期间被设置到存储器阵列,使得下一个写入周期可以在写入周期期间在数据传送期间产生延迟而进行,其中数据 将被写入阵列。

    ECL logic gate with voltage protection
    66.
    发明授权
    ECL logic gate with voltage protection 失效
    ECL逻辑门电压保护

    公开(公告)号:US5256917A

    公开(公告)日:1993-10-26

    申请号:US863623

    申请日:1992-04-03

    CPC分类号: H03K19/086 H03K19/00307

    摘要: An ECL logic gate (70) includes a voltage protection clamp (60) for protecting a first bipolar transistor (58) from being too heavily reverse biased when an input signal A.sub.IN is pulled to V.sub.SS. The ECL logic gate (70) includes an emitter-follower input stage and a differential amplifier stage. A voltage protection clamp (60) includes a second transistor (52) and a resistor (53) and acts to divide the amount of reverse bias on the first bipolar transistor (58) between a third transistor (51) and the first transistor (58), thereby bringing the reverse bias voltage on the first transistor (58) within acceptable levels to prevent degradation of the first transistor (58).

    摘要翻译: ECL逻辑门(70)包括电压保护钳位(60),用于当输入信号AIN被拉到VSS时,用于保护第一双极晶体管(58)不被过大的反向偏置。 ECL逻辑门(70)包括射极跟随器输入级和差分放大级。 电压保护夹具(60)包括第二晶体管(52)和电阻器(53),并且用于将第一晶体管(51)和第一晶体管(58)之间的第一双极晶体管(58)上的反向偏置量 ),从而使第一晶体管(58)上的反向偏置电压达到可接受的水平以防止第一晶体管(58)的劣化。

    Apparatus and methods of driving signal for reducing the leakage current
    68.
    发明授权
    Apparatus and methods of driving signal for reducing the leakage current 有权
    驱动信号以减少漏电流的装置和方法

    公开(公告)号:US08681566B2

    公开(公告)日:2014-03-25

    申请号:US13106321

    申请日:2011-05-12

    IPC分类号: G11C11/34 G11C8/00 G11C16/06

    摘要: Apparatus and methods for driving a signal are disclosed. An example apparatus includes a pre-driver circuit and a driver circuit. The pre-driver circuit includes a step-down transistor and the driver circuit includes a pull-down transistor configured to be coupled to a reference voltage. In a first mode, the step-down transistor is configured to reduce a voltage provided to the pull-down transistor to less than a supply voltage, and in a second mode, the step-down transistor configured to provide the voltage of the supply voltage to the pull-down transistor. The pre-driver circuit of the example signal driver circuit may further include a step-up transistor configured to increase a voltage provided to a pull-up transistor of the driver circuit to greater than the reference voltage, and in the second mode, the step-up transistor configured to provide the voltage of the reference voltage to the pull-up transistor.

    摘要翻译: 公开了用于驱动信号的装置和方法。 示例性设备包括预驱动器电路和驱动器电路。 预驱动器电路包括降压晶体管,并且驱动器电路包括被配置为耦合到参考电压的下拉晶体管。 在第一模式中,降压晶体管被配置为将提供给下拉晶体管的电压降低到小于电源电压,并且在第二模式中,降压晶体管被配置为提供电源电压 到下拉晶体管。 示例性信号驱动器电路的预驱动电路还可以包括升压晶体管,其被配置为将提供给驱动器电路的上拉晶体管的电压增加到大于参考电压,并且在第二模式中,步骤 该晶体管被配置为向上拉晶体管提供参考电压的电压。

    MEMORY CELL
    70.
    发明申请
    MEMORY CELL 有权
    记忆体

    公开(公告)号:US20120092941A1

    公开(公告)日:2012-04-19

    申请号:US13335428

    申请日:2011-12-22

    申请人: John D. Porter

    发明人: John D. Porter

    IPC分类号: G11C7/00

    摘要: Methods, and circuits, are disclosed for operating a programmable memory device. One method embodiment includes storing a value as a state in a first memory cell and as a complementary state in a second memory cell. Such a method further includes determining the state of the first memory cell using a first self-biased sensing circuit and the complementary state of the second memory cell using a second self-biased sensing circuit, and comparing in a differential manner an indication of the state of the first memory cell to a reference indication of the complementary state of the second memory cell to determine the value.

    摘要翻译: 公开了用于操作可编程存储器件的方法和电路。 一个方法实施例包括将值作为状态存储在第一存储器单元中并作为互补状态存储在第二存储器单元中。 这种方法还包括使用第一自偏置感测电路确定第一存储单元的状态和使用第二自偏置感测电路来确定第二存储单元的互补状态,并以差分方式比较状态指示 的第一存储器单元的第二存储器单元的补充状态的参考指示以确定该值。