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    Organic semiconductor copolymers containing oligothiophene and n-type heteroaromatic units
    61.
    发明申请
    Organic semiconductor copolymers containing oligothiophene and n-type heteroaromatic units 有权
    含有低聚噻吩和n型杂芳族单元的有机半导体共聚物

    公开(公告)号：US20060006379A1

    公开(公告)日：2006-01-12

    申请号：US11073691

    申请日：2005-03-08

    Applicant: Bang Lee ,  Kook Han ,  Jung Shin ,  Sang Lee ,  Eun Jeong

    Inventor： Bang Lee ,  Kook Han ,  Jung Shin ,  Sang Lee ,  Eun Jeong

    IPC: H01L29/08 ,  C08G75/00

    CPC classification number: H01L51/0043 ,  H01L51/0036 ,  H01L51/0512 ,  Y10T428/31533

    Abstract: An exemplary organic semiconductor copolymer includes a polymeric repeat structure having a polythiophene structure and an electron accepting unit. The electron accepting unit has at least one electron-accepting heteroaromatic structure with at least one electron-withdrawing imine nitrogen in the heteroaromatic structure or a thiophene-arylene comprising a C2-30 heteroaromatic structure. Methods of synthesis and electronic devices incorporating the disclosed organic semiconductors, e.g., as a channel layer, are also disclosed.

    Abstract translation: 示例性的有机半导体共聚物包括具有聚噻吩结构的聚合物重复结构和电子接受单元。 电子接受单元具有在杂芳族结构中具有至少一个吸电子亚胺氮的至少一个电子接受性杂芳族结构或包含C 2〜2-30杂芳族结构的噻吩 - 亚芳基。 还公开了合成方法和结合所公开的有机半导体的电子器件，例如作为沟道层。

    Semiconductor device and method for manufacturing the same
    63.
    发明申请
    Semiconductor device and method for manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US20060001112A1

    公开(公告)日：2006-01-05

    申请号：US11219795

    申请日：2005-09-07

    Applicant: Sang Lee

    Inventor： Sang Lee

    IPC: H01L29/78

    CPC classification number: H01L21/28123 ,  H01L21/28061 ,  H01L21/28247 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: The present invention discloses method for manufacturing semiconductor device employing an EXTIGATE structure. In accordance with the method, a predetermined thickness of the device isolation film is etched to form a recess. The recess is then filled with a second nitride film. A stacked structure of a barrier metal film, a metal layer and a third nitride film on the second nitride film and the polysilicon film is formed on the entire surface and the etched via a photoetching process to form a gate electrode. An insulating film spacer is deposited on a sidewall of the gate electrode. The exposed portion of the polysilicon film using the third nitride film pattern and the insulating film spacer as a mask to form a polysilicon film pattern and an oxide film on a sidewall of the polysilicon film pattern.

    Abstract translation: 本发明公开了采用EXTIGATE结构制造半导体器件的方法。 根据该方法，对器件隔离膜的预定厚度进行蚀刻以形成凹陷。 然后用第二氮化物膜填充凹部。 在整个表面上形成第二氮化物膜和多晶硅膜上的阻挡金属膜，金属层和第三氮化物膜的堆叠结构，并通过光刻工艺蚀刻以形成栅电极。 绝缘膜间隔物沉积在栅电极的侧壁上。 使用第三氮化物膜图案和绝缘膜间隔物作为掩模的多晶硅膜的暴露部分在多晶硅膜图案的侧壁上形成多晶硅膜图案和氧化物膜。

    Method of producing multi-wavelength semiconductor laser device
    64.
    发明申请
    Method of producing multi-wavelength semiconductor laser device 审中-公开
    多波长半导体激光器件的制造方法

    公开(公告)号：US20050286590A1

    公开(公告)日：2005-12-29

    申请号：US10933531

    申请日：2004-09-03

    Applicant: Sang Lee

    Inventor： Sang Lee

    IPC: H01S5/30 ,  H01S5/00 ,  H01S5/02 ,  H01S5/22 ,  H01S5/323 ,  H01S5/40

    CPC classification number: H01S5/22 ,  H01S5/0213 ,  H01S5/0215 ,  H01S5/0217 ,  H01S5/32341 ,  H01S5/4087

    Abstract: Disclosed herein is a method for producing a multi-wavelength semiconductor laser device. The method comprises the steps of: forming a nitride epitaxial layer on a substrate for growth of a nitride single crystal; separating the nitride epitaxial layer from the substrate; attaching the separated nitride epitaxial layer to a first conductivity-type substrate; selectively removing the nitride semiconductor epitaxial layer to expose a portion of the first conductivity-type substrate and to form a first semiconductor laser structure; and sequentially forming second and third semiconductor laser structures on the exposed portion of the first conductivity-type substrate.

    Abstract translation: 本发明公开了一种多波长半导体激光装置的制造方法。 该方法包括以下步骤：在衬底上形成氮化物外延层以生长氮化物单晶; 从所述衬底分离所述氮化物外延层; 将分离的氮化物外延层附接到第一导电型基板; 选择性地去除所述氮化物半导体外延层以暴露所述第一导电型衬底的一部分并形成第一半导体激光器结构; 以及在第一导电型衬底的暴露部分上依次形成第二和第三半导体激光器结构。

    VARIABLE PITCH MANIFOLD FOR ROTOR COOLING IN AN ELECTRICAL MACHINE
    66.
    发明申请
    VARIABLE PITCH MANIFOLD FOR ROTOR COOLING IN AN ELECTRICAL MACHINE 失效
    用于电机中转子冷却的可变式倾斜歧管

    公开(公告)号：US20050264128A1

    公开(公告)日：2005-12-01

    申请号：US10709740

    申请日：2004-05-26

    Applicant: Christopher Kaminski ,  Anand Tanavde ,  Robert Nygard ,  Sang Lee

    Inventor： Christopher Kaminski ,  Anand Tanavde ,  Robert Nygard ,  Sang Lee

    IPC: H02K1/32 ,  H02K1/24 ,  H02K3/52 ,  H02K9/00 ,  H02K9/06 ,  H02K19/16

    CPC classification number: H02K3/527 ,  H02K1/24

    Abstract: A rotor in an electrical machine, the rotor comprises a magnetic core having at least two poles, a plurality of winding assemblies, one for each pole, and a cylindrical tube enclosing the magnetic core and winding assemblies, the tube including a plurality of rings having different axial widths. Each of the rings is axially spaced apart from an adjacent ring. The respective axial widths of the rings become progressively smaller than the axial width of the ring axially located at or near the center of the tube as the axial distance away from the center of the tube increases. A plurality of winding braces are coupled to at least one of the winding assemblies, the winding braces having different radial heights.

    Abstract translation: 一种电机中的转子，转子包括具有至少两个极的磁芯，多个绕组组件，每个磁极一个，以及包围磁芯和绕组组件的圆柱形管，该管包括多个环， 不同的轴向宽度。 每个环与相邻的环轴向间隔开。 随着远离管中心的轴向距离的轴向距离的增加，环的相应轴向宽度逐渐小于位于管中心处或附近的环的轴向宽度。 多个绕组支架联接到至少一个绕组组件，所述绕组支架具有不同的径向高度。

    Flash memory device and method for fabricating the same
    67.
    发明申请
    Flash memory device and method for fabricating the same 失效
    闪存装置及其制造方法

    公开(公告)号：US20050247987A1

    公开(公告)日：2005-11-10

    申请号：US11121495

    申请日：2005-05-03

    Applicant: Sang Lee

    Inventor： Sang Lee

    IPC: H01L21/8247 ,  H01L21/336 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

    CPC classification number: H01L27/11568 ,  H01L27/115 ,  H01L29/792 ,  Y10S438/954

    Abstract: A flash memory device and a method for fabricating the same is disclosed that reduces or prevents mis-operation and improves integration, which includes a semiconductor substrate having a field region and an active region; a device isolation layer on the field region including a conductive (e.g., polysilicon) layer and an insulating layer thereon; a sidewall spacer at sides of the device isolation layer; an ONO layer on the active region; a gate electrode on the ONO layer; source and drain regions at sides of the gate electrode in the active region; a passivation layer on the semiconductor substrate, having a contact hole in the drain region; and a drain electrode in the contact hole, connected with the drain region.

    Abstract translation: 公开了一种闪存器件及其制造方法，其减少或防止错误操作和改进集成，其包括具有场区域和有源区域的半导体衬底; 在场区域上的器件隔离层，包括导电（例如多晶硅）层和绝缘层; 在所述器件隔离层的侧面处的侧壁间隔物; 活性区上的ONO层; ONO层上的栅电极; 源极和漏极区域在栅电极的有源区中; 半导体衬底上的钝化层，在漏区中具有接触孔; 和接触孔中的漏电极，与漏区连接。

    Nonvolatile memory device and method for fabricating the same
    68.
    发明申请
    Nonvolatile memory device and method for fabricating the same 审中-公开
    非易失性存储器件及其制造方法

    公开(公告)号：US20050247973A1

    公开(公告)日：2005-11-10

    申请号：US11121866

    申请日：2005-05-03

    Applicant: Sang Lee

    Inventor： Sang Lee

    IPC: H01L21/76 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792

    CPC classification number: H01L27/11521 ,  H01L27/115 ,  H01L29/42336 ,  H01L29/7885

    Abstract: A nonvolatile memory device and a method for fabricating the same is disclosed, in which a corner of a floating gate is rounded to reduce, minimize or prevent discharge of programmed electrons, and an overlap between the floating gate and a control gate increases to improve a coupling ratio and enable nonvolatile memory device operations at a low voltage. The nonvolatile memory device includes a device isolation layer in a field region on a semiconductor substrate, the device isolation having a trench; a tunnel oxide layer; a floating gate comprising a polysilicon pattern in an active region of the semiconductor substrate and a polysilicon spacer at the side of the polysilicon pattern and the inner sidewall of the trench; a gate dielectric layer on the floating gate; and a control gate on the gate dielectric layer overlapping with the floating gate.

    Abstract translation: 公开了一种非易失性存储器件及其制造方法，其中浮动栅极的角被倒圆以减少，最小化或防止编程电子的放电，并且浮置栅极和控制栅极之间的重叠增加以改善 耦合比，并使得非易失性存储器件在低电压下工作。 非易失性存储器件包括在半导体衬底上的场区中的器件隔离层，器件隔离具有沟槽; 隧道氧化层; 包括在所述半导体衬底的有源区域中的多晶硅图案的浮置栅极和在所述多晶硅图案侧和所述沟槽的内侧壁处的多晶硅间隔物; 浮栅上的栅介质层; 并且栅极电介质层上的与浮动栅极重叠的控制栅极。

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