公开(公告)号：US20170147416A1

公开(公告)日：2017-05-25

申请号：US14951639

申请日：2015-11-25

Applicant: STMICROELECTRONICS INTERNATIONAL N.V. ,  STMICROELECTRONICS S.R.L.

Inventor： Om RANJAN ,  Fabio Enrico Carlo DISEGNI

IPC: G06F11/07

CPC classification number: G06F11/079 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/076 ,  G06F11/0772 ,  G06F11/08 ,  G06F11/1004 ,  G06F11/16 ,  G11B2020/1843 ,  G11C29/02 ,  G11C29/04 ,  G11C29/42

Abstract: An electronic device includes a memory having memory locations being subject to transient faults and permanent faults, and a fault detection circuit coupled to the memory. The fault detection circuit is configured to read the memory locations at a first time, and determine a first fault count and fault map signature including the transient and permanent faults at the first time based upon reading the plurality of memory locations, and to store the first fault count and fault map signature. The fault detection circuit is configured to read the memory locations at a second time and determine a second fault count and fault map signature including the transient and permanent faults at the second time based upon reading the memory locations, and compare the stored first fault count and fault map signature with the second fault count and fault map signature to determine a permanent fault count.

公开(公告)号：US20170140838A1

公开(公告)日：2017-05-18

申请号：US15420720

申请日：2017-01-31

Applicant: STMicroelectronics International N.V

Inventor： Swapnil Bahl ,  Shray Khullar

IPC: G11C29/32 ,  G01R31/3177 ,  G01R31/3185 ,  G11C29/34 ,  G06F11/25

CPC classification number: G11C29/32 ,  G01R31/3177 ,  G01R31/318541 ,  G01R31/318547 ,  G06F11/25 ,  G11C29/34 ,  G11C2029/3202

Abstract: An integrated circuit (IC) having a scan compression architecture includes decompression logic coupled between test access input and a block of IC elements (e.g. flip-flops) coupled together to define a plurality of scan paths. The block of IC elements includes an initial data selector at an initial position of each of the scan paths, and an additional data selector downstream within at least one of the scan paths and configured to reconfigure an order of the IC elements within the at least one scan path. Compression logic is coupled between the block of IC elements and a test access output.

公开(公告)号：US09647699B1

公开(公告)日：2017-05-09

申请号：US14984040

申请日：2015-12-30

Applicant: STMicroelectronics International N.V.

Inventor： Nitin Gupta ,  Tapas Nandy

IPC: H04K1/02 ,  H04L25/03 ,  H04L25/49 ,  H04B1/04

CPC classification number: H04B1/04 ,  H03F3/24 ,  H04B2001/0408

Abstract: A power harvesting circuit for use in an open drain transmitter circuit is configured to generate two distinct harvested supply voltages at different voltage levels along with two distinct cascode voltages at different voltage levels. The harvested supply voltages are used to power circuitry in the transmitter circuit. The cascode voltages are used to bias cascode transistors in the open drain circuitry for different channels.

公开(公告)号：US09640114B2

公开(公告)日：2017-05-02

申请号：US14725112

申请日：2015-05-29

Applicant: STMicroelectronics International N.V.

Inventor： Jerome Nebon ,  Christophe Forel

IPC: G09G3/3258 ,  G09G3/20 ,  G09G3/3291 ,  G09G3/3233 ,  G09G3/3266

CPC classification number: G09G3/3258 ,  G09G3/2003 ,  G09G3/2081 ,  G09G3/3233 ,  G09G3/3266 ,  G09G3/3291 ,  G09G2300/0866 ,  G09G2320/0233 ,  G09G2320/0242 ,  G09G2320/0626 ,  G09G2330/028

Abstract: A device includes a matrix of active pixels. Each active pixel includes an OLED and a control circuit configured to refresh the active pixel and including at least one transistor having a first conduction terminal coupled to a supply line and a second conduction terminal coupled to the OLED. Supply circuitry is configured to apply a supply voltage to the supply line of each active pixel during the refreshing of the active pixel and for a time period less than a duration of the refreshing of the active pixel.

公开(公告)号：US20170111567A1

公开(公告)日：2017-04-20

申请号：US14886944

申请日：2015-10-19

Applicant: STMicroelectronics International N.V.

Inventor： Rosarium PILA

IPC: H04N5/232 ,  H04N1/21

CPC classification number: H04N5/23216 ,  H04N1/2112 ,  H04N5/232 ,  H04N5/23222

Abstract: A method and apparatus for capturing stable images are disclosed. An ambient light sensor makes measurements of ambient light. A change in ambient light between two measurements is determined. If the change in ambient light measurements falls in a predefined range, then the change may be attributable to ambient light sensor being blocked by a user to trigger image capturing. Consequently, a camera is triggered to capture an image. Conversely, if the change in ambient light measurement is outside the range, image capturing is not triggered as the change may be attributable to other factors.

公开(公告)号：US09615196B2

公开(公告)日：2017-04-04

申请号：US14640138

申请日：2015-03-06

Applicant: STMicroelectronics International N.V.

Inventor： Constantin Socol ,  Daniel Orsatti

IPC: H04B5/00 ,  H04W4/00

CPC classification number: H04W4/008 ,  H04W4/80

Abstract: A NFC tag includes an NFC controller, with a secure element coupled to the NFC controller. The secure element is to send first configuration data to the NFC controller and not second configuration data. The first configuration data comprises data to be used by the NFC controller to generate responses to initial polling and anti-collision commands from an external NFC device and not data to be used by the NFC controller in processing a command from the external NFC device involving the use of an upper layer protocol. The second configuration data comprises data to be used by the NFC controller in processing a command involving the use of an upper layer protocol from the external NFC device.

公开(公告)号：US09613692B1

公开(公告)日：2017-04-04

申请号：US14971488

申请日：2015-12-16

Applicant: STMICROELECTRONICS INTERNATIONAL N.V. ,  STMICROELECTRONICS S.R.L.

Inventor： Marco Pasotti ,  Marcella Carissimi ,  Rajat Kulshrestha ,  Chantal Auricchio

IPC: G11C13/00

CPC classification number: G11C13/004 ,  G11C7/065 ,  G11C7/08 ,  G11C13/0004 ,  G11C13/0026 ,  G11C13/0028 ,  G11C13/0061 ,  G11C13/0097 ,  G11C2013/0042 ,  G11C2207/002

Abstract: A memory device includes an array of phase-change memory (PCM) cells and complementary PCM cells. A column decoder is coupled to the array of PCM cells and complementary PCM cells, and a sense amplifier is coupled to the column decoder. The sense amplifier includes a current integrator configured to receive first and second currents of a given PCM cell and complementary PCM cell, respectively. A current-to-voltage converter is coupled to the current integrator and is configured to receive the first and second currents, and to provide first and second voltages of the given PCM cell and complementary PCM cell to first and second nodes, respectively. A logic circuit is coupled to the first and second nodes and is configured to disable the column decoder and to discharge the bitline and complementary bitline voltages in response to the first and second voltages.

公开(公告)号：US09543044B2

公开(公告)日：2017-01-10

申请号：US14074341

申请日：2013-11-07

Applicant: STMicroelectronics International N.V. ,  STMicroelectronics S.R.L.

Inventor： Abhishek Jain ,  Andrea Mario Veggetti ,  Amit Chhabra

IPC: G11C29/48 ,  G06F1/08 ,  G11C29/24 ,  G11C29/52 ,  G11C29/54

CPC classification number: G11C29/48 ,  G06F1/08 ,  G06F11/00 ,  G11C29/24 ,  G11C29/52

Abstract: According to an embodiment described herein, a method for testing a memory includes receiving an address and a start signal at a memory, and generating a first detector pulse at a test circuit in response to the start signal. The first detector pulse has a leading edge and a trailing edge. A data transition of a bit associated with the address is detected. The bit is a functional bit. The method further includes determining whether the bit is a weak bit by determining whether the data transition occurred after the trailing edge.

Abstract translation: 根据本文描述的实施例，用于测试存储器的方法包括在存储器处接收地址和起始信号，并且响应于起始信号在测试电路产生第一检测器脉冲。 第一检测器脉冲具有前沿和后沿。 检测与地址相关联的位的数据转换。 该位是一个功能位。 该方法还包括通过确定在后沿之后是否发生数据转换来确定该位是否为弱位。

公开(公告)号：US20160379410A1

公开(公告)日：2016-12-29

申请号：US14750699

申请日：2015-06-25

Applicant: STMicroelectronics International N.V.

Inventor： Amit Sharma ,  Gaurav Jairath ,  Paramanand Singh ,  Amit Kumar Srivastava

IPC: G06T19/00 ,  G06F17/30 ,  G06T7/00 ,  G06T11/00

CPC classification number: G06T19/006 ,  G06F16/44 ,  G06F16/487 ,  G06T11/60 ,  H04N21/41407 ,  H04N21/4316 ,  H04N21/4722 ,  H04N21/4728

Abstract: A method for operating an augmented reality system includes acquiring video data from a camera sensor or video file, and identifying at least one region of interest within the video data. Augmented reality data is generated for the region of interest without receiving user input, with the augmented reality data being contextually related to the region of interest. The video data may be displayed with the augmented reality data superimposed thereupon in real time as the video data is acquired from the camera sensor or video file. The video data and the augmented reality data are stored in a non-conflated fashion. The video data may be displayed with updated AR content acquired for stored AR metadata during later playback. The method therefore allows the storage of AR ROI's and data from any suitable sensor as metadata, so that later retrieval is possible in the absence of additional processing.

Abstract translation: 用于操作增强现实系统的方法包括从相机传感器或视频文件获取视频数据，以及识别视频数据内的至少一个感兴趣区域。 为感兴趣的区域生成增强的现实数据，而不接收用户输入，增强的现实数据与感兴趣的区域上下文相关。 当从摄像机传感器或视频文件获取视频数据时，视频数据可以与其上叠加的增强现实数据实时显示。 视频数据和增强现实数据以非混合方式存储。 视频数据可以在随后的再现期间以存储的AR元数据获取的更新的AR内容显示。 因此，该方法允许将AR ROI和来自任何合适的传感器的数据存储为元数据，使得在没有附加处理的情况下稍后检索是可能的。

公开(公告)号：US20160371580A1

公开(公告)日：2016-12-22

申请号：US14903584

申请日：2014-06-12

Applicant: STMicroelectronics International N.V.

Inventor： Vinko KUNC ,  Anton STERN ,  Kosta KOVACIC ,  Albin PEVEC ,  Maksimiljan STIGLIC

IPC: G06K19/077

CPC classification number: G06K19/07773 ,  G06K19/0715 ,  G06K19/07749 ,  G06K19/0775

Abstract: An RFID transponder device has antenna terminals for coupling an antenna system to the device. A transmitter and a receiver are coupled to the antenna terminals. The device has at least one damping resistance connected to at least one of the antenna terminals. The at least one damping resistance is connected, depending on a voltage swing at the antenna terminals during a transmission burst period, either together with a serially connected switch in parallel to the antenna terminals that are coupled to the receiver, or together with a parallel connected switch between one of the antenna terminals and a terminal of the transmitter. A damping control is configured to activate the at least one damping resistance during a damping period after the transmission burst period by controlling the respective switch.

Abstract translation: RFID应答器设备具有用于将天线系统耦合到设备的天线端子。 发射器和接收器耦合到天线端子。 该装置具有连接到至少一个天线端子的至少一个阻尼电阻。 至少一个阻尼电阻根据传输脉冲串期间天线端子处的电压摆幅而连接，或者连接到与接收器耦合的天线端子并联连接的串联开关，或者与并联连接 在天线终端之一和发射机的终端之间切换。 阻尼控制被配置为通过控制相应的开关来在传输脉冲串周期之后的阻尼时段期间激活至少一个阻尼电阻。