公开(公告)号：US09276159B2

公开(公告)日：2016-03-01

申请号：US13725349

申请日：2012-12-21

申请人： TELEDYNE SCIENTIFIC & IMAGING, LLC

发明人： Allan Evans ,  William Tennant ,  Andrew Hood

IPC分类号： H01L29/06 ,  H01L31/00 ,  H01L31/109 ,  H01L31/0352 ,  H01L31/0304

CPC分类号： H01L31/109 ,  H01L31/03046 ,  H01L31/035236 ,  H01L31/1013 ,  H01L31/105 ,  Y02E10/544

摘要： A structure comprised of an InAsSb layer adjacent to a GaSb layer, with the adjacent InAsSb and GaSb layers repeating to form a superlattice (SL). The structure is preferably an unstrained SL, wherein the composition of the InAsSb layer is InAs0.91Sb0.09; the InAs0.91 Sb0.09 layers are preferably lattice-matched to the GaSb layers. The SL structure is preferably arranged such that the Sb component of the InAsSb layers reduces the strain in the SL structure so that it is less than that found in an InAs/GaSb Type-II Strained Layer Superlattice (SLS). The present SL structure is suitably employed as part of an infrared photodetector.

摘要翻译： 由与GaSb层相邻的InAsSb层构成的结构，相邻的InAsSb和GaSb层重复形成超晶格（SL）。 该结构优选为无约束SL，其中InAsSb层的组成为InAs 0.91 Sb 0.90; InAs0.91 Sb0.09层优选与GaSb层晶格匹配。 SL结构优选地布置成使得InAsSb层的Sb成分减小了SL结构中的应变，使得其小于在InAs / GaSb II型应变层超晶格（SLS）中发现的应变。 本SL结构适用于红外光电探测器的一部分。

公开(公告)号：USD750308S1

公开(公告)日：2016-02-23

申请号：US29476731

申请日：2013-12-16

申请人： CREE, INC.

设计人： Elizabeth Rodgers ,  Benjamin Beck ,  James Bowden ,  Yaote Huang

公开(公告)号：US09267681B2

公开(公告)日：2016-02-23

申请号：US13426516

申请日：2012-03-21

申请人： Samir Barudi ,  David Merrill ,  Chris Caron

发明人： Samir Barudi ,  David Merrill ,  Chris Caron

IPC分类号： F23D5/14 ,  F23D5/04 ,  F23K5/14 ,  F23K5/06 ,  F24B1/199

CPC分类号： F23D5/14 ,  F23D5/04 ,  F23K5/06 ,  F23K5/14 ,  F23K5/147 ,  F23K2301/20 ,  F24B1/199 ,  F24C5/18

摘要： A fire display assembly has a burner tray optionally located within a hollow space in the interior of a non-flammable structure. A porous element on or in the non-flammable structure has extensions from a lower surface thereof extending into fuel in the burner tray. The assembly can include a fuel tray connected to the burner tray by conduits which provide flow channels for liquid fuel between the trays. When a container of liquid fuel is placed in the fuel tray the fuel is dispensed and flows into the burner tray. Fuel in the tray is transmitted to the outer surface of the porous element. Flammable vapors from the liquid fuel at the outer surface are then ignited. The arrangement provides a continuous feed of fuel to the surface of the non-flammable structure and allows safe replenishment of the fuel in the burner while the flame is present.

摘要翻译： 火灾展示组件具有可选地位于不可燃结构内部的中空空间内的燃烧器托盘。 在非易燃结构上或其中的多孔元件从其下表面延伸到燃烧器托盘中的燃料中。 组件可以包括通过导管提供连接到燃烧器托盘的燃料盘，该管道为托盘之间的液体燃料提供流动通道。 当液体燃料的容器放置在燃料盘中时，燃料被分配并流入燃烧器托盘。 托盘中的燃料被传送到多孔元件的外表面。 然后点燃来自外表面的液体燃料的易燃蒸汽。 该装置提供了连续的燃料供给到不可燃结构的表面，并允许在存在火焰的同时在燃烧器中安全地补充燃料。

公开(公告)号：US09266733B2

公开(公告)日：2016-02-23

申请号：US11241518

申请日：2005-09-30

申请人： Martin W. Kendig ,  Young J. Chung ,  Alan B. Harker ,  Dennis R. Strauss

发明人： Martin W. Kendig ,  Young J. Chung ,  Alan B. Harker ,  Dennis R. Strauss

IPC分类号： C23C8/02 ,  C01B7/14 ,  A61L2/232 ,  C23C26/00 ,  C23C30/00

CPC分类号： C01B7/14 ,  A61L2/232 ,  C23C8/02 ,  C23C26/00 ,  C23C30/00

摘要： A layered construction for application to a device or substrate or placement in an enclosed space for use in decontaminating the underlying surface or enclosed space comprises a cathode, an electrolyte layer, an anode and a protective surface layer. A compound that can be electrically decomposed to release on demand and over an extended period of time, an oxidant is included in the layered structure, preferably in the electrolyte layer. Preferred compounds are those which can release halogen ions which react with various different chemical or biological contaminants which may contact the protective layer, destroying, or devitalizing the contaminants.

摘要翻译： 用于施加到装置或基板上的分层结构或放置在用于净化下面的表面或封闭空间的封闭空间中的分层结构包括阴极，电解质层，阳极和保护性表面层。 可以电分解以随时间延长释放的化合物，优选在电解质层中包含氧化剂。 优选的化合物是可以释放卤素离子的化合物，其与可能接触保护层的各种不同的化学或生物污染物反应，破坏或灭活污染物。

公开(公告)号：USD749768S1

公开(公告)日：2016-02-16

申请号：US29481543

申请日：2014-02-06

申请人： CREE, INC.

设计人： Nathan Snell ,  Brian Kinnune

公开(公告)号：US09263566B2

公开(公告)日：2016-02-16

申请号：US13351139

申请日：2012-01-16

申请人： Fumitake Mieno

发明人： Fumitake Mieno

IPC分类号： H01L21/28 ,  H01L23/498 ,  H01L29/43 ,  H01L29/778 ,  H01L29/66 ,  H01L29/10 ,  H01L29/49 ,  H01L29/165

CPC分类号： H01L29/4983 ,  H01L21/28255 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66651 ,  H01L29/7781

摘要： The present invention relates to a semiconductor device and its manufacturing method. The semiconductor device comprises: a gate structure located on a substrate, Ge-containing semiconductor layers located on the opposite sides of the gate structure, a doped semiconductor layer epitaxially grown between the Ge-containing semiconductor layers, the bottom surfaces of the Ge-containing semiconductor layers located on the same horizontal plane as that of the epitaxial semiconductor layer. The epitaxial semiconductor layer is used as a channel region, and the Ge-containing semiconductor layers are used as source/drain extension regions.

摘要翻译： 本发明涉及一种半导体器件及其制造方法。 半导体器件包括：位于衬底上的栅极结构，位于栅极结构的相对侧上的含锗半导体层，外延生长在含锗半导体层之间的掺杂半导体层，含Ge的半导体层的底表面 位于与外延半导体层相同的水平面上的半导体层。 使用外延半导体层作为沟道区，将含Ge半导体层用作源/漏延伸区。

公开(公告)号：US09228967B2

公开(公告)日：2016-01-05

申请号：US14414068

申请日：2013-07-16

申请人： SGX SENSORTECH SA

发明人： Christine Alepee ,  Nicolas Moser

IPC分类号： G01N15/06 ,  G01N33/00 ,  G01N33/48 ,  G01N27/12 ,  G01N27/18

CPC分类号： G01N27/128 ,  G01N27/18 ,  Y10T436/214

摘要： The present invention relates to a micro-hotplate device comprising a frame, a membrane, an active area comprising at least one active layer, and a heating structure designed to heat said active layer, said heating structure having concentric tracks and comprising inner tracks (20) and inner spaces (22) and outer tracks (24) and outer spaces (26) as being the one or two tracks and spaces located the furthest away from the center of the heating structure, characterized in that said outer tracks (24) are designed to be located closer to their neighboring tracks and/or are designed to have a width which is lower than those of the inner tracks (20), the width and the spacing of said inner tracks (20) being substantially constant.

摘要翻译： 本发明涉及一种包括框架，膜，包括至少一个有源层的有源区和设计用于加热所述有源层的加热结构的微电加热装置，所述加热结构具有同心轨道并且包括内轨道（20 ）和内部空间（22）和外部轨道（24）和外部空间（26），其是位于距离加热结构的中心最远的一个或两个轨道和间隔，其特征在于，所述外轨道（24） 被设计成更靠近它们相邻的轨道定位和/或被设计成具有比内轨道（20）的宽度低的宽度，所述内轨道（20）的宽度和间距基本上是恒定的。

公开(公告)号：US09200788B2

公开(公告)日：2015-12-01

申请号：US13787620

申请日：2013-03-06

申请人： The Sloan Company, Inc.

发明人： Timothy Drew Ferrie ,  Aaron Meyer ,  Bruce Quaal

IPC分类号： F21V21/005 ,  F21V3/04 ,  F21V21/08 ,  G09F13/04 ,  F21S4/00 ,  F21Y101/02 ,  F21V7/04 ,  F21V17/00

CPC分类号： F21V21/005 ,  F21S4/20 ,  F21V3/04 ,  F21V7/048 ,  F21V17/007 ,  F21V21/0808 ,  F21Y2107/70 ,  F21Y2115/10 ,  G09F13/0409

摘要： A lighting system comprising a light box housing, a plurality of lighting units including a housing, a plurality of light emitting elements mounted on a PCB within the housing. The light emitting elements arranged on an angled surface such that the light emitting elements emit light in a sideways direction from the lighting units. The lighting units can also be interconnected in a daisy-chain configuration, such that the lighting units form a row of lighting units. The row of lighting units adapted to be mounted within the light box housing, wherein the light box housing comprises one or more rows of lighting units.

摘要翻译： 一种照明系统，包括灯箱外壳，多个照明单元，包括外壳，安装在所述外壳内的PCB上的多个发光元件。 发光元件布置在倾斜的表面上，使得发光元件沿着来自照明单元的侧向方向发光。 照明单元还可以以菊花链配置互连，使得照明单元形成一排照明单元。 适于安装在灯箱壳体内的一排照明单元，其中灯箱外壳包括一排或多排照明单元。

公开(公告)号：US09196799B2

公开(公告)日：2015-11-24

申请号：US12229366

申请日：2008-08-22

申请人： Ashay Chitnis ,  Bernd Keller

发明人： Ashay Chitnis ,  Bernd Keller

IPC分类号： H01L33/00 ,  H01L33/44 ,  H01L33/50 ,  H01L33/62 ,  H01L23/31 ,  H01L33/38

CPC分类号： H01L33/44 ,  H01L23/3114 ,  H01L33/38 ,  H01L33/505 ,  H01L33/508 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods for fabricating semiconductor devices such as LED chips at the wafer level, and LED chips and LED chip wafers fabricated using the methods. An LED chip wafer according to the present invention comprises a plurality of LEDs on a wafer and a plurality of pedestals, each of which is on one of the LEDs. A fluorescent substrate or preform (“preform”) is provided covering at least some of the LEDs, the preform comprising holes with the pedestals arranged within the holes. During operation of the covered ones of said LEDs at least some light from the LEDs passes through the preform and is converted. LED chips are provided that are singulated from this LED chip wafer. One embodiment of a method for fabricating LED chips from a wafer comprises depositing LED epitaxial layers on an LED growth wafer to form a plurality of LEDs on the growth wafer. Pedestals are formed on the LEDs and a fluorescent preform is formed with holes. The fluorescent preform is bonded over at least some of the plurality of LEDs so that at least some light from the covered ones of said LEDs passes through the preform and is converted. The pedestals are arranged in the holes so that an electrical signal is applied to the LEDs through the pedestals.

摘要翻译： 用于制造晶片级的半导体器件如LED芯片的方法，以及使用该方法制造的LED芯片和LED芯片晶片。 根据本发明的LED芯片晶片包括晶片上的多个LED和多个基座，每个基座位于一个LED上。 提供了覆盖至少一些LED的荧光基板或预制件（“预制件”），预成型件包括具有布置在孔内的基座的孔。 在所述LED的被覆盖的操作期间，来自LED的至少一些光通过预型件并被转换。 提供从该LED芯片晶片分离的LED芯片。 从晶片制造LED芯片的方法的一个实施例包括在LED生长晶片上沉积LED外延层，以在生长晶片上形成多个LED。 在LED上形成基座，荧光预制件形成有孔。 所述荧光预制件被粘结在所述多个LED中的至少一些上，使得来自所述LED的被覆盖的LED的至少一些光通过所述预型件并被转换。 基座布置在孔中，使得电信号通过基座施加到LED。

公开(公告)号：US09196314B2

公开(公告)日：2015-11-24

申请号：US13530647

申请日：2012-06-22

申请人： Victor Cai

发明人： Victor Cai

IPC分类号： G06F1/16 ,  G11C5/04

CPC分类号： G06F3/061 ,  G06F1/185 ,  G06F3/0629 ,  G06F3/0683 ,  G11C5/04 ,  G11C11/4076 ,  G11C11/4082 ,  G11C11/4093

摘要： An extended-height DIMM for use in a memory system having slots designed to receive DIMMs that comply with a JEDEC standard that specifies a maximum height for the DIMM and a maximum number of devices allowed to reside on the DIMM. The DIMM comprises a PCB having an edge connector designed to mate with a memory system slot and a height which is greater than the maximum height specified in the applicable standard, a plurality of memory devices which exceeds the maximum number of devices specified in the applicable standard, and a memory buffer which operates as an interface between a host controller's data and command/address busses and the memory devices. This arrangement enables the extended-height DIMM to provide greater memory capacity than would a DIMM which complies with the maximum height and maximum number of devices limits.

摘要翻译： 用于内存系统的扩展高度DIMM，具有设计用于接收符合JEDEC标准的DIMM的插槽，该标准规定了DIMM的最大高度以及允许驻留在DIMM上的最大数量的设备。 DIMM包括具有边缘连接器的PCB，该边缘连接器被设计成与存储器系统槽相匹配，并且高度大于可应用标准中规定的最大高度;多个存储器件超过在适用标准中规定的最大数量的器件 以及作为主机控制器的数据与命令/地址总线和存储器件之间的接口进行操作的存储器缓冲器。 这种布置使得扩展高度DIMM能够提供比符合最大高度和最大数量限制的DIMM更大的存储容量。