LIGHT EMITTING DIODES AND METHOD FOR MANUFACTURING THE SAME
    71.
    发明申请
    LIGHT EMITTING DIODES AND METHOD FOR MANUFACTURING THE SAME 有权
    发光二极管及其制造方法

    公开(公告)号:US20120175630A1

    公开(公告)日:2012-07-12

    申请号:US13300731

    申请日:2011-11-21

    Abstract: An LED comprises an electrode layer comprising a first a second sections electrically insulated from each other; an electrically conductive layer on the second section, an electrically conductive pole protruding from the electrically conductive layer; an LED die comprising an electrically insulating substrate on the electrically conductive layer, and a P-N junction on the electrically insulating substrate, the P-N junction comprising a first electrode and a second electrode, the electrically conductive pole extending through the electrically insulating substrate to electrically connect the first electrode to the second section; a transparent electrically conducting layer on the LED die, the transparent electrically conducting layer electrically connecting the second electrode to the first section; and an electrically insulating layer between the LED die, the electrically conductive layer, and the transparent electrically conducting layer, wherein the electrically insulating layer insulates the transparent electrically conducting layer from the electrically conductive layer and the second section.

    Abstract translation: LED包括电极层,电极层包括彼此电绝缘的第一部分和第二部分; 所述第二部分上的导电层,从所述导电层突出的导电极; 包括在所述导电层上的电绝缘衬底的LED管芯和所述电绝缘衬底上的PN结,所述PN结包括第一电极和第二电极,所述导电极延伸穿过所述电绝缘衬底以电连接 第一电极到第二部分; 在所述LED管芯上的透明导电层,所述透明导电层将所述第二电极与所述第一部分电连接; 以及在LED管芯,导电层和透明导电层之间的电绝缘层,其中电绝缘层使透明导电层与导电层和第二部分绝缘。

    Input/output device for display apparatus
    72.
    发明授权
    Input/output device for display apparatus 有权
    显示装置的输入/输出装置

    公开(公告)号:US08215797B2

    公开(公告)日:2012-07-10

    申请号:US11513201

    申请日:2006-08-31

    CPC classification number: H05K5/0247

    Abstract: An input/output device used for connecting at least one external wire with a display apparatus, comprises a case, at least one I/O connector, a flip cover, and a lighting device. The case embedded in the case of the display apparatus has a wiring slot to provide the wire passing through the case. The I/O connectors embedded on the case are electrically connected to the display apparatus. The flip cover is pivoted on the case. The lighting device having a light source and a switch is associated with the flip cover to turn on or turn off the light source.

    Abstract translation: 用于将至少一个外部电线与显示装置连接的输入/输出装置包括壳体,至少一个I / O连接器,翻盖和照明装置。 在显示装置的情况下嵌入的壳体具有配线槽,用于提供穿过壳体的电线。 嵌入在壳体上的I / O连接器电连接到显示装置。 翻盖在壳体上枢转。 具有光源和开关的照明装置与翻盖相关联以打开或关闭光源。

    METHOD FOR FABRICATING SEMICONDUCTOR LIGHTING CHIP
    74.
    发明申请
    METHOD FOR FABRICATING SEMICONDUCTOR LIGHTING CHIP 失效
    制造半导体照明芯片的方法

    公开(公告)号:US20120164773A1

    公开(公告)日:2012-06-28

    申请号:US13216260

    申请日:2011-08-24

    CPC classification number: H01L33/20 H01L33/007 H01L33/12

    Abstract: A method for fabricating a semiconductor lighting chip includes steps of: providing a substrate; forming a first etching layer on the substrate; forming a connecting layer on the first etching layer; forming a second etching layer on the connecting layer; forming a lighting structure on the second etching layer; and etching the first etching layer, the connecting layer, the second etching layer and the lighting structure, wherein an etching rate of the first etching layer and the second etching layer is lager than that of the connecting layer and the lighting structure, thereby to form the connecting layer and the lighting structure each with an inverted frustum-shaped structure.

    Abstract translation: 一种制造半导体照明芯片的方法包括以下步骤:提供衬底; 在所述基板上形成第一蚀刻层; 在所述第一蚀刻层上形成连接层; 在连接层上形成第二蚀刻层; 在所述第二蚀刻层上形成照明结构; 并且蚀刻第一蚀刻层,连接层,第二蚀刻层和照明结构,其中第一蚀刻层和第二蚀刻层的蚀刻速率比连接层和照明结构的蚀刻速率大,从而形成 连接层和照明结构均具有倒立的截头锥形结构。

    Optimizing XOR-based codes
    75.
    发明授权
    Optimizing XOR-based codes 有权
    优化基于XOR的代码

    公开(公告)号:US08209577B2

    公开(公告)日:2012-06-26

    申请号:US11961866

    申请日:2007-12-20

    Abstract: A “code optimizer” provides various techniques for optimizing arbitrary XOR-based codes for encoding and/or decoding of data. Further, the optimization techniques enabled by the code optimizer do not depend on any underlining code structure. Therefore, the optimization techniques provided by the code optimizer are applicable to arbitrary codes with arbitrary redundancy. As such, the optimized XOR-based codes generated by the code optimizer are more flexible than specially designed codes, and allow for any desired level of fault tolerance. Typical uses of XOR-based codes include, for example, encoding and/or decoding data using redundant data packets for data transmission real-time communications systems, encoding and/or decoding operations for storage systems such as RAID arrays, etc.

    Abstract translation: “代码优化器”提供了用于优化用于对数据进行编码和/或解码的任意基于XOR的代码的各种技术。 此外,由代码优化器启用的优化技术不依赖于任何下划线的代码结构。 因此,代码优化器提供的优化技术适用于任意冗余的任意代码。 因此,由代码优化器生成的优化的基于XOR的代码比特别设计的代码更灵活,并允许任何期望的容错级别。 基于XOR的代码的典型用途包括例如使用用于数据传输实时通信系统的冗余数据分组来编码和/或解码数据,用于存储系统例如RAID阵列等的编码和/或解码操作。

    MINIMIZING NETWORK LATENCY IN INTERACTIVE INTERNET APPLICATIONS
    76.
    发明申请
    MINIMIZING NETWORK LATENCY IN INTERACTIVE INTERNET APPLICATIONS 有权
    最小化互联网应用中的网络延迟

    公开(公告)号:US20120128010A1

    公开(公告)日:2012-05-24

    申请号:US12951908

    申请日:2010-11-22

    CPC classification number: H04L1/0009 H04L1/1812 H04L1/188

    Abstract: A method and system that enhances a user's performance while interacting with an interactive internet application such as a Massively Multiplayer Online (MMO) game is provided. The network latency experienced by users participating in the MMO game is minimized by dynamically determining an optimal transmission action for a message generated by the MMO game. In one embodiment, determining the optimal transmission action for a message includes dynamically determining the optimal number of redundant Forward Error Correction (FEC) packets to add to a message prior to transmitting a message to a receiving device. The optimal number of FEC packets is determined based on a wide range of varying network conditions.

    Abstract translation: 提供了一种在与诸如大型多人在线(MMO)游戏之类的交互式互联网应用交互的同时增强用户表现的方法和系统。 通过动态地确定由MMO游戏产生的消息的最佳传输动作,使参与MMO游戏的用户经历的网络延迟最小化。 在一个实施例中,确定消息的最佳传输动作包括在将消息发送到接收设备之前动态地确定要添加到消息的冗余前向纠错(FEC)分组的最佳数量。 基于广泛的变化的网络条件来确定FEC分组的最佳数量。

    SUPPORT MECHANISM AND ELECTRONIC DEVICE USING THE SAME
    77.
    发明申请
    SUPPORT MECHANISM AND ELECTRONIC DEVICE USING THE SAME 失效
    支持机构和使用该设备的电子设备

    公开(公告)号:US20120106091A1

    公开(公告)日:2012-05-03

    申请号:US13160648

    申请日:2011-06-15

    CPC classification number: H05K5/0234 H04M1/0214 H04M1/0235 H04M1/04

    Abstract: A support mechanism includes a pivoting assembly and a support member. The pivoting assembly includes a fixing member, a sliding member slidably mounted on the fixing member, a pivoting shaft rotatably connected to one end of the fixing member, and at least one torsion spring sleeved on and coiling around the pivot shaft. The torsion spring includes two assembling legs, one assembling leg of the torsion spring elastically resists against the fixing member. The support member is fixed to the sliding member.

    Abstract translation: 支撑机构包括枢转组件和支撑构件。 所述枢转组件包括固定构件,可滑动地安装在所述固定构件上的滑动构件,可旋转地连接到所述固定构件的一端的枢转轴以及套在所述枢转轴周围并卷绕的至少一个扭簧。 扭转弹簧包括两个组装腿,扭转弹簧的一个组装腿弹性抵抗固定构件。 支撑构件固定在滑动构件上。

    METHOD FOR MANUFACTURING LIGHT EMITTING CHIP
    78.
    发明申请
    METHOD FOR MANUFACTURING LIGHT EMITTING CHIP 失效
    制造发光芯片的方法

    公开(公告)号:US20120100648A1

    公开(公告)日:2012-04-26

    申请号:US13216244

    申请日:2011-08-24

    CPC classification number: H01L33/0079 H01L33/0095 H01L33/46

    Abstract: A method for manufacturing light emitting chips includes steps of: providing a substrate having a plurality of separate epitaxy islands thereon, wherein the epitaxy islands are spaced from each other by channels; filling the channels with an insulation material; sequentially forming a reflective layer, a transition layer and a base on the insulation material and the epitaxy islands; removing the substrate and the insulation material to expose the channels; and cutting the reflective layer, the transition layer and the base to form a plurality of individual chips along the channels.

    Abstract translation: 制造发光芯片的方法包括以下步骤:提供其上具有多个分离的外延岛的衬底,其中所述外延岛通过沟道彼此间隔开; 用绝缘材料填充通道; 在绝缘材料和外延岛上依次形成反射层,过渡层和基底; 去除衬底和绝缘材料以暴露通道; 并且切割反射层,过渡层和基底,以沿通道形成多个独立的芯片。

    SEMICONDUCTOR DEVICE HAVING METAL GATE AND MANUFACTURING METHOD THEREOF
    79.
    发明申请
    SEMICONDUCTOR DEVICE HAVING METAL GATE AND MANUFACTURING METHOD THEREOF 审中-公开
    具有金属门的半导体器件及其制造方法

    公开(公告)号:US20120098043A1

    公开(公告)日:2012-04-26

    申请号:US12911714

    申请日:2010-10-25

    Abstract: A method of manufacturing a semiconductor device having metal gate includes providing a substrate having a semiconductor device and a contact etch stop layer (CESL) and a dielectric layer covering the semiconductor device formed thereon, wherein the semiconductor device having at least a dummy gate, performing a dummy gate removal step to form at least an opening in the semiconductor device and to simultaneously remove a portion of the CESL such that a top surface of the CESL is lower than the semiconductor device and the dielectric layer and a plurality of recesses is obtained, and performing a recess elimination step to form a substantially even surface of the dielectric layer.

    Abstract translation: 一种制造具有金属栅极的半导体器件的方法包括提供具有半导体器件和接触蚀刻停止层(CESL)的衬底和覆盖其上形成的半导体器件的电介质层,其中至少具有虚拟栅极的半导体器件执行 模拟栅极去除步骤,以在半导体器件中形成至少一个开口,并且同时去除CESL的一部分,使得CESL的顶表面比半导体器件和电介质层低,并且获得多个凹槽, 并执行凹陷消除步骤以形成电介质层的基本均匀的表面。

    LIGHT EMITTING DIODE CHIP AND METHOD FOR MANUFACTURING THE SAME
    80.
    发明申请
    LIGHT EMITTING DIODE CHIP AND METHOD FOR MANUFACTURING THE SAME 有权
    发光二极管芯片及其制造方法

    公开(公告)号:US20120097976A1

    公开(公告)日:2012-04-26

    申请号:US13214254

    申请日:2011-08-22

    CPC classification number: H01L33/0079 H01L33/20 H01L33/405

    Abstract: A light emitting diode chip includes an electrically conductive substrate, a reflecting layer disposed on the substrate, a semiconductor structure formed on the reflecting layer, an electrode disposed on the semiconductor structure, and a plurality of slots extending through the semiconductor structure. The semiconductor structure includes a P-type semiconductor layer formed on the reflecting layer, a light-emitting layer formed on the P-type semiconductor layer, and an N-type semiconductor layer formed on the light-emitting layer. A current diffusing region is defined in the semiconductor structure and around the electrode. The slots are located outside the current diffusing region.

    Abstract translation: 发光二极管芯片包括导电基板,设置在基板上的反射层,形成在反射层上的半导体结构,设置在半导体结构上的电极和延伸穿过半导体结构的多个狭缝。 半导体结构包括形成在反射层上的P型半导体层,形成在P型半导体层上的发光层和形成在发光层上的N型半导体层。 在半导体结构中和电极周围限定电流扩散区。 槽位于电流扩散区域外部。

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