公开(公告)号：US20240297230A1

公开(公告)日：2024-09-05

申请号：US18177592

申请日：2023-03-02

Applicant: GAN SYSTEMS INC.

Inventor： Seyedarmin MIREMAD ,  Iman ABDALI MASHHADI ,  Atrin TAVAKOLI ,  Hossein MOUSAVIAN

IPC: H01L29/417 ,  H01L29/10 ,  H01L29/20 ,  H01L29/66

CPC classification number: H01L29/41766 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/66462

Abstract: Overdriving a power field-effect transistor. In response to a detection that the power field-effect transistor has entered the saturation region, the gate node of the power field-effect transistor is overdriven with a higher voltage. The detection of whether the power field-effect transistor is within the saturation region is done with a sense field-effect transistor. This sense field-effect transistor uses the same epitaxial stack of semiconductor layers as the power field-effect transistor. That is, the power field-effect transistor includes a part of an epitaxial stack of semiconductor layers having a heterojunction between at least two adjacent semiconductor layers, and the sense field-effect transistor includes another part of this same epitaxial stack of semiconductor layers.

公开(公告)号：US20240282827A1

公开(公告)日：2024-08-22

申请号：US18172916

申请日：2023-02-22

Applicant: GAN SYSTEMS INC.

Inventor： Marco A. ZUNIGA ,  Thomas William MACELWEE ,  Rohan SAMSI ,  Lucas Andrew Milner ,  Vineet Unni ,  Jayasimha S. PRASAD ,  Ashutosh Ravindra JOHARAPURKAR ,  Ramesh G. KARPUR

IPC: H01L29/40 ,  H01L29/20 ,  H01L29/201 ,  H01L29/778

CPC classification number: H01L29/402 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/7786

Abstract: The biasing of one or more field plates of a high electron mobility transistor (a HEMT) with a non-zero voltage to thereby affect the electric field profile of the HEMT. The non-zero voltage may be a constant DC voltage, or perhaps may be a voltage that changes over time. The use of a non-zero voltage allows for greater ability to regulate and reduce the electric field occurring in the semiconductor channel region, especially at the field plate. Further, when the electric field occurring at the field plate is reduced, the overall size of the HEMT can also be reduced as compared to applying a zero voltage to the field plate. Alternatively, or in addition, applying a non-zero voltage to the field plate allows the voltage levels handled by the HEMT to be increased as compared to simply grounding the field plate.

公开(公告)号：US11735492B2

公开(公告)日：2023-08-22

申请号：US17465345

申请日：2021-09-02

Applicant: GaN Systems Inc.

Inventor： Juncheng Lu ,  Di Chen ,  Larry Spaziani ,  Peter Anthony Di Maso

IPC: H01L23/367 ,  H01L23/538 ,  H01L29/778 ,  H01L29/20 ,  H01L25/11 ,  H01L23/498

CPC classification number: H01L23/3675 ,  H01L23/49811 ,  H01L23/5386 ,  H01L25/115 ,  H01L29/2003 ,  H01L29/7786

Abstract: Low inductance power modules for ultra-fast wide-bandgap semiconductor power switching devices are disclosed. Conductive tracks define power buses for a switching topology, e.g. comprising GaN E-HEMTs, with power terminals extending from the power buses through the housing to provide a heatsink-to-busbar distance which meets creepage and clearance requirements. Low-profile, low-inductance terminals for gate and source-sense connections extend from contact areas located adjacent each power switching device to provide for a low inductance gate drive loop, for high di/dt switching. The gate driver board is mounted on the low-profile terminals, inside or outside of the housing, with decoupling capacitors provided on the driver board. For paralleled switches, additional terminals, which are referred to as dynamic performance pins, are provided to the power buses. These pins are configured to provide a low inductance path for high-frequency current and balance inductances of the power commutation loops for each switch.

公开(公告)号：US11689098B2

公开(公告)日：2023-06-27

申请号：US17497233

申请日：2021-10-08

Applicant: GaN Systems Inc.

Inventor： Xuechao Liu ,  Di Chen ,  Yajie Qiu

IPC: H02M1/42 ,  H02M3/335 ,  H02M7/48 ,  H02M7/04 ,  H02M7/02 ,  H02M3/00

CPC classification number: H02M1/4233 ,  H02M1/4241 ,  H02M3/33569 ,  H02M7/4815 ,  H02M3/01 ,  H02M7/02 ,  H02M7/04

Abstract: An AC/DC Switching Mode Power Supply (SMPS) comprises a PFC stage, an isolated LLC DC/DC converter stage, and a control circuit that provides feedback/control signals to PFC and LLC controllers, to enable a plurality of operating modes, dependent on a sensed peak AC input voltage and required output voltage Vo. The PFC provides a first DC bus voltage Vdc (e.g. 200V) for low line AC input and a second DC bus voltage (e.g. 400V) for high line or universal AC input. A multi-mode LLC converter is operable in a half-bridge mode or a full-bridge mode. For low line AC input, output voltage Vo, and PFC output Vdc, the LLC operates in full-bridge mode; for high line input, output voltage Vo and PFC output 2×Vdc, the LLC operates in half-bridge mode; for universal AC input, output voltage 2×Vo, and PFC output 2×Vdc, the LLC operates in full-bridge mode.

公开(公告)号：US20230110761A1

公开(公告)日：2023-04-13

申请号：US17942672

申请日：2022-09-12

Applicant: GaN Systems Inc.

Inventor： Yajie QIU ,  Xuechao LIU

IPC: H02M1/42 ,  H02M1/00 ,  H02M7/219

Abstract: An AC input AC/DC Switching Mode Power Supply (SMPS) with Power Factor Correction (PFC) comprises a boost follower circuit (BFC), a hybrid bulk capacitance circuit (HBCC) and driver and control circuitry. The BFC senses the peak AC input voltage and adjusts a PFC output voltage Vdc dependent on the AC input voltage, to improve low line efficiency and reduce losses. The BFC may provide a stepless or step regulation mode to follow the AC input line voltage. The driver and control circuitry coordinates operation of the BFC and HBCC. The driver and control circuitry comprises comparator circuitry, which enables selective connection of bulk capacitors of different voltage ratings, responsive to a sense voltage from the BFC, to meet requirements for ripple voltage and hold-up times for different Vdc. This solution provides a reduction in capacitor height and volume, with associated improvement in the power density of an isolated AC/DC power supply.

公开(公告)号：US20230019052A1

公开(公告)日：2023-01-19

申请号：US17945231

申请日：2022-09-15

Applicant: GaN Systems Inc.

Inventor： Cameron MCKNIGHT-MACNEIL ,  Abhinandan DIXIT ,  Ahmad MIZAN ,  An-Sheng CHENG

IPC: H01L23/00 ,  B23K26/06 ,  B23K26/364 ,  B23K26/60

Abstract: Embedded die packaging for semiconductor devices and methods of fabrication wherein conductive vias are provided to interconnect contact areas on the die and package interconnect areas. Before embedding, a protective masking layer is provided selectively on regions of the electrical contact areas where vias are to be formed by laser drilling. The material of the protective masking layer is selected to protect against over-drilling and/or to control absorption properties of surface of the pad metal to reduce absorption of laser energy during laser drilling of micro-vias, thereby mitigating physical damage, overheating or other potential damage to the semiconductor device. The masking layer may be resistant to surface treatment of other regions of the electrical contact areas, e.g. to increase surface roughness to promote adhesion of package dielectric.

公开(公告)号：US11476188B2

公开(公告)日：2022-10-18

申请号：US17065886

申请日：2020-10-08

Applicant: GaN Systems Inc.

Inventor： Cameron McKnight-MacNeil

IPC: H01L23/522 ,  H01L21/768 ,  H01L21/56 ,  H01L23/31

Abstract: Embedded die packaging for semiconductor devices and methods of fabrication wherein conductive vias are provided to interconnect contact areas on the die and package interconnect areas. Before embedding, a protective masking layer is provided selectively on regions of the electrical contact areas where vias are to be formed by laser drilling. The material of the protective masking layer is selected to control absorption properties of surface of the pad metal to reduce absorption of laser energy during laser drilling of micro-vias, thereby mitigating overheating and potential damage to the semiconductor device. The masking layer is resistant to surface treatment of other regions of the electrical contact areas, e.g. to increase surface roughness to promote adhesion of package dielectric.

公开(公告)号：US11463012B1

公开(公告)日：2022-10-04

申请号：US17688170

申请日：2022-03-07

Applicant: GaN Systems Inc.

Inventor： Xuechao Liu ,  Paul Wiener

IPC: H02M3/335 ,  H02M3/158 ,  H02M1/00 ,  H02M1/42

Abstract: An architecture for a multi-port AC/DC Switching Mode Power Supply (SMPS) with Power Factor Correction (PFC) comprises power management control (PMC) for PFC On/Off Control and Smart Power Distribution, and optionally, a boost follower circuit. For example, in a universal AC/DC multi-port USB-C Power Delivery (PD) adapter, PMC enables turn-on and turn-off of PFC dependent on output port operational status and a combined load of active output ports. A microprocessor control unit (MCU) receives operational status, a voltage sense input and a current sense input for each USB port, computes output power for each USB port, and executes a power distribution protocol to turn-on or turn-off PFC dependent on the combined load from each USB port. Available power may be distributed intelligently to one or more ports, dependent on load. In an example embodiment, turning-off PFC for low load and low AC line input increases efficiency by 3% to 5%.

公开(公告)号：US20220247219A1

公开(公告)日：2022-08-04

申请号：US17579941

申请日：2022-01-20

Applicant: GaN Systems Inc.

Inventor： Tiefeng SHI ,  Paul WIENER

IPC: H02J50/12 ,  H02J50/00 ,  H02J50/40

Abstract: A wireless power transfer (WPT) system is provided to drive multiple resonator coils utilizing one power amplifier. The WPT system may include a power amplifier, a differential 1:N power divider, impedance inversion circuits and multiple resonator coils. The WPT system may further include auto-tuning circuits with sensors that facilitate the efficient driving of the multiple resonator coils. As well, there is provided various 3D shaped coil topologies that are comprised of two or more separate coils. The 3D coil topology designs each provide a particular 3D magnetic field for wireless charging.

公开(公告)号：US20220020669A1

公开(公告)日：2022-01-20

申请号：US16928305

申请日：2020-07-14

Applicant: GaN Systems Inc.

Inventor： Cameron MCKNIGHT-MACNEIL ,  Greg P. KLOWAK

IPC: H01L23/495 ,  H01L23/482 ,  H01L23/498 ,  H01L23/522 ,  H01L23/532 ,  H01L23/31 ,  H01L29/20 ,  H01L29/778 ,  H01L23/00

Abstract: Embedded die packaging for high voltage, high temperature operation of power semiconductor devices is disclosed, wherein a power semiconductor die is embedded in laminated body comprising a layer stack of a plurality of dielectric layers and electrically conductive layers. For example, the dielectric layers comprise dielectric build-up layers of filled or fiber reinforced dielectric and conductive interconnect comprises copper layers and copper filled vias. Where a solder resist coating is provided, a dielectric build-up layer, e.g. filled or glass fiber reinforced epoxy, is provided between the solder resist coating and underlying copper interconnect, particularly in regions which experience high electric field during operation, such as between closely spaced source and drain interconnect metal. For example, the power semiconductor device comprises a GaN HEMT rated for operation at ≥100V wherein the package body has a laminated structure configured for high voltage, high temperature operation with improved reliability.