公开(公告)号：US20100248503A1

公开(公告)日：2010-09-30

申请号：US12741300

申请日：2008-10-30

申请人： Kyoung il Kang ,  Yong Goo Lee ,  Duk Kyu Kwon ,  Jang Mook Lee

发明人： Kyoung il Kang ,  Yong Goo Lee ,  Duk Kyu Kwon ,  Jang Mook Lee

IPC分类号： H01R12/14

CPC分类号： H01R24/50 ,  H01R2103/00

摘要： A connector capable of being connected to a printed circuit board (PCB) is provided. A female connector according to an embodiment of the present invention includes a core conductor, a body, and a housing. The core conductor is formed of a single body including a contact terminal formed of two or more insertion panels forming an insertion space where a signal pin of a male connector is inserted and a signal transmission panel connected to a bottom of the contact terminal and electrically connected a signal line of the PCB. The body includes an insertion part electrically insulated from the core conductor and gaping when coupling with the male connector and is formed in a single body including a trunk surrounding the contact terminal and a plurality of supporters connected to a bottom of the trunk. The housing stores the core conductor and the bottom of the trunk of the body or more.

摘要翻译： 提供能够连接到印刷电路板（PCB）的连接器。 根据本发明的实施例的阴连接器包括芯导体，主体和壳体。 芯导体由单体构成，该单体包括由形成插入空间的两个或更多个插入面形成的接触端子，其中插入阳连接器的信号针和连接到接触端子的底部的信号传输面板，并且电连接 PCB的信号线。 主体包括与芯导体电绝缘的插入部分和与阳连接器耦合时的间隙，并且形成在包括围绕接触端子的主体的单个主体中，以及连接到主体的底部的多个支撑件。 壳体存储芯体导体和身体躯干的底部或更多部分。

公开(公告)号：US20100202049A1

公开(公告)日：2010-08-12

申请号：US12678459

申请日：2008-09-17

申请人： Byoung-Il Kang ,  Chan-Hong Lee ,  Chang-Hun Han

发明人： Byoung-Il Kang ,  Chan-Hong Lee ,  Chang-Hun Han

IPC分类号： G02B1/08 ,  C08L51/00 ,  C08J5/18 ,  B29D11/00

CPC分类号： C08L51/00 ,  B29D11/00788 ,  C08J5/18 ,  C08J2333/06 ,  C08L33/14 ,  C08L37/00 ,  C08L39/04 ,  C08L51/04 ,  G02B5/3083 ,  G02F2201/50 ,  C08L2666/24

摘要： The present invention provides an optical film and a retardation film that each include an acryl resin, and 20 to 65 parts by weight of a graft copolymer including a conjugated diene rubber based on 100 parts by weight of the acryl resin, and an electronic device including the same.

摘要翻译： 本发明提供一种光学膜和延迟膜，其各自包含丙烯酸树脂，以及基于100重量份丙烯酸树脂的20至65重量份的包含共轭二烯橡胶的接枝共聚物，以及包含 一样。

公开(公告)号：US07494909B2

公开(公告)日：2009-02-24

申请号：US11499116

申请日：2006-08-03

申请人： Chull Won Ju ,  Byoung Gue Min ,  Seong Il Kim ,  Jong Min Lee ,  Kyung Ho Lee ,  Young Il Kang

发明人： Chull Won Ju ,  Byoung Gue Min ,  Seong Il Kim ,  Jong Min Lee ,  Kyung Ho Lee ,  Young Il Kang

IPC分类号： H01L21/00 ,  H01L21/76 ,  H01L21/46 ,  H01L21/44 ,  H01L29/40 ,  H01L23/02

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541

摘要： Provided are a chip, a chip stack, and a method of manufacturing the same. A plurality of chips which each include: at least one pad formed on a wafer; and a metal layer which protrudes up to a predetermined thickness from the bottom of the wafer and is formed in a via hole exposing the bottom of the pad are stacked such that the pad and the metal layer of adjacent chips are bonded. This leads to a simplified manufacturing process, high chip performance and a small footprint for a chip stack.

摘要翻译： 提供一种芯片，芯片堆叠及其制造方法。 多个芯片，每个芯片包括：形成在晶片上的至少一个焊盘; 并且从晶片的底部突出到预定厚度并且形成在露出焊盘底部的通孔中的金属层被堆叠成使得焊盘和相邻芯片的金属层接合。 这导致了简化的制造工艺，高芯片性能和用于芯片堆叠的小占地面积。

公开(公告)号：US20090042385A1

公开(公告)日：2009-02-12

申请号：US12177636

申请日：2008-07-22

申请人： Myung-Il Kang

发明人： Myung-Il Kang

IPC分类号： H01L21/44 ,  H01L21/306

CPC分类号： H01L21/7684 ,  H01L21/3212

摘要： A method of manufacturing a metal line according to embodiments includes forming an interlayer dielectric layer over a semiconductor substrate. A dielectric layer is formed over the interlayer dielectric layer. A trench may be formed by etching the dielectric layer and the interlayer dielectric layer. A metal material may be disposed over the interlayer dielectric layer including the trench. A first planarization process may be performed on the metal material using the dielectric layer as an etch stop layer. A wet etch process may be performed on the semiconductor substrate subjected the first planarization process. A second planarization process may be performed on interlayer dielectric layer subjected to the wet etch process.

摘要翻译： 根据实施例的制造金属线的方法包括在半导体衬底上形成层间电介质层。 在层间电介质层上形成电介质层。 可以通过蚀刻介电层和层间电介质层来形成沟槽。 可以在包括沟槽的层间电介质层上设置金属材料。 可以使用电介质层作为蚀刻停止层对金属材料进行第一平面化处理。 可以在经受第一平面化处理的半导体衬底上进行湿蚀刻工艺。 可以对经受湿蚀刻工艺的层间电介质层进行第二平面化处理。

公开(公告)号：US20080194966A1

公开(公告)日：2008-08-14

申请号：US12030676

申请日：2008-02-13

申请人： Hak Il KANG

发明人： Hak Il KANG

IPC分类号： A61B8/00

CPC分类号： G01S15/894 ,  G01S7/52079 ,  G01S7/5208 ,  G01S7/52084 ,  G10K11/355

摘要： The present invention is directed to an ultrasound system, which includes a probe to transmit ultrasound signals to a target object and receive ultrasound echo signals from the target object. The probe has an array transducer having multiple transducer elements for generating the ultrasound signals and converting the ultrasound echo signals into electrical signals; and an input unit to receive a swing speed input and form setup information according to the swing speed input. The ultrasound system further includes a body to form an ultrasound image based on the electric signals. The body includes a control unit for generating a control signal in response to the setup information. The probe further has an operation unit to swing the array transducer at a swing speed indicated by the control signal.

摘要翻译： 本发明涉及一种超声系统，其包括将超声信号发射到目标物体并从目标物体接收超声回波信号的探针。 探头具有阵列换能器，具有多个换能器元件，用于产生超声信号并将超声回波信号转换为电信号; 以及输入单元，用于接收摆动速度输入并根据所述摆动速度输入形成设置信息。 超声系统还包括基于电信号形成超声波图像的主体。 身体包括用于响应于设置信息产生控制信号的控制单元。 探头还具有操作单元，以由控制信号指示的摆动速度摆动阵列换能器。

公开(公告)号：US20080110809A1

公开(公告)日：2008-05-15

申请号：US11983635

申请日：2007-11-09

申请人： Seong-goo Kang ,  Jun-ho Lee ,  Ki-sang Kang ,  Hyun-seop Shim ,  Do-young Kam ,  Jae-il Lee ,  Ju-il Kang

发明人： Seong-goo Kang ,  Jun-ho Lee ,  Ki-sang Kang ,  Hyun-seop Shim ,  Do-young Kam ,  Jae-il Lee ,  Ju-il Kang

IPC分类号： G01R31/28 ,  B07C5/344 ,  G01R31/319 ,  B65G65/02

CPC分类号： H01L21/67282 ,  G01R31/2867 ,  G01R31/2893 ,  H01L21/67271 ,  Y10S414/135

摘要： A multifunctional handler system for electrical testing of semiconductor devices is provided. The multifunctional handler system comprises: (1) a semiconductor device processing section comprising a loading unit including a buffer, a sorting unit including a separate marking machine, and a unloading unit; (2) a semiconductor device testing section, separate from the semiconductor device processing section, comprises a test chamber, the test chamber is separated into two or more test spaces, and the test spaces of the test chamber include a second chamber positioned at a lower position, a first chamber positioned above the second chamber, and pipelines for connecting the first and second chambers to each other; and (3) a host computer which is independently connected to the semiconductor device processing section and the semiconductor device testing section and controls tray information, test results, marking information, and test program information.

摘要翻译： 提供了一种用于半导体器件的电测试的多功能处理器系统。 多功能处理器系统包括：（1）半导体器件处理部分，包括包括缓冲器的加载单元，包括单独的标记机的分拣单元和卸载单元; （2）与半导体器件处理部分分离的半导体器件测试部分包括测试室，测试室被分离成两个或更多个测试空间，并且测试室的测试空间包括位于下部的第二室 位置，位于第二室上方的第一室以及用于将第一和第二室彼此连接的管道; 和（3）独立地连接到半导体器件处理部分和半导体器件测试部分并且控制托盘信息，测试结果，标记信息和测试程序信息的主计算机。

公开(公告)号：US07372336B2

公开(公告)日：2008-05-13

申请号：US11323744

申请日：2005-12-30

申请人： Jae-Sup Lee ,  Hyun-Il Kang ,  Seong-Soo Lee ,  Holger Lothar ,  Ju-Hyun Ko ,  Dong-Hyun Baek ,  Song-Cheol Hong

发明人： Jae-Sup Lee ,  Hyun-Il Kang ,  Seong-Soo Lee ,  Holger Lothar ,  Ju-Hyun Ko ,  Dong-Hyun Baek ,  Song-Cheol Hong

IPC分类号： H03F3/14

CPC分类号： H03F3/604 ,  H03F1/02 ,  H03F1/22 ,  H03F3/195 ,  H03F3/265 ,  H03F2200/537 ,  H03F2200/541

摘要： A small-sized on-chip complementary metal-oxide semiconductor (CMOS) Power Amplifier having improved efficiency is provided herein. The on-chip CMOS power amplifier is capable of improving efficiency and maximizing output thereof by enhancing a K factor, which may cause a problem in a power amplifier having a distributed active transformer structure. The on-chip CMOS power amplifier having an improved efficiency and being fabricated in a small size, the on-chip CMOS power amplifier includes a primary winding located at a first layer, secondary windings located at a second layer, which is an upper part of the first layer, the secondary windings being located corresponding to a position of the primary winding, and a cross section for coupling the second windings with each other.

摘要翻译： 本文提供了具有提高的效率的小尺寸片上互补金属氧化物半导体（CMOS）功率放大器。 片上CMOS功率放大器能够通过增强K因子来提高效率并使其输出最大化，这可能导致具有分布式有源变压器结构的功率放大器的问题。 片上CMOS功率放大器具有改进的效率并以小尺寸制造，片上CMOS功率放大器包括位于第一层的初级绕组，位于第二层的次级绕组，其位于第二层的上部 第一层，次级绕组对应于初级绕组的位置，以及用于将第二绕组彼此联接的横截面。

公开(公告)号：US20080100546A1

公开(公告)日：2008-05-01

申请号：US11762519

申请日：2007-06-13

申请人： Sang-hoon LEE ,  Jeong-il KANG

发明人： Sang-hoon LEE ,  Jeong-il KANG

IPC分类号： G09G3/32

CPC分类号： H05B33/0866 ,  G09G3/3406 ,  G09G2320/0626 ,  G09G2360/16

摘要： A display apparatus comprising a display unit and a plurality of light emitting diodes (LEDs) provided in a backlight that illuminates the display unit, the display apparatus includes: a power supplier; a current detector which detects a value of a current flowing in each of the LEDs; a current adjusting unit which compares a target current value which is supplied to the LED with a current value detected by the current detector and controls the value of the current flowing in the LED; and a controller which determines the target current value based on grayscale information of a video signal which is displayed on the display unit, provides the target current value to the current adjusting unit, and provides a virtual target current value that is higher than the target current value to the current adjusting unit for a predetermined time period if the target current value is determined.

摘要翻译： 一种显示装置，包括显示单元和设置在照明所述显示单元的背光中的多个发光二极管（LED），所述显示装置包括：电源; 电流检测器，其检测在每个LED中流动的电流的值; 电流调节单元，其将提供给LED的目标电流值与由电流检测器检测的电流值进行比较，并控制在LED中流动的电流的值; 以及控制器，其基于显示在显示单元上的视频信号的灰阶信息来确定目标电流值，将目标电流值提供给当前调整单元，并提供高于目标电流的虚拟目标电流值 如果确定了目标电流值，则预定时间段内的当前调整单元的值。

公开(公告)号：US20080079371A1

公开(公告)日：2008-04-03

申请号：US11727675

申请日：2007-03-28

申请人： Jeong-il Kang ,  Sang-hoon Lee ,  Kyoung-geun Lee ,  Jun-ho Sung

发明人： Jeong-il Kang ,  Sang-hoon Lee ,  Kyoung-geun Lee ,  Jun-ho Sung

IPC分类号： H05B37/02

CPC分类号： H05B33/0854 ,  H05B33/0818 ,  Y02B20/341

摘要： A Light Emitting Diode (LED) lighting device capable of correcting changes in a wavelength of light output from an LED element caused by changes in temperature, and a method for controlling the same are provided. The lighting device includes a temperature-current converter which generates a current command value to correct change in a wavelength of output light based on temperature information indicating temperature of the light source, and a light source driver which receives the current command value, adjusts amplitude of a pulse width modulation (PWM) signal, and controls a driving electric current of the light source according to the adjusted PWM signal.

摘要翻译： 提供能够校正由温度变化引起的LED元件输出的光的波长变化的发光二极管（LED）照明装置及其控制方法。 照明装置包括：温度电流转换器，其根据表示光源的温度的温度信息生成电流指令值以校正输出光的波长的变化;以及光源驱动器，其接收电流指令值，调整振幅 脉冲宽度调制（PWM）信号，根据调整后的PWM信号控制光源的驱动电流。

公开(公告)号：US07347393B2

公开(公告)日：2008-03-25

申请号：US10524171

申请日：2003-08-11

申请人： Dae Il Kang

发明人： Dae Il Kang

IPC分类号： B02C19/00

CPC分类号： B02C19/08 ,  B02C19/10

摘要： Disclosed is a nano grinding mill including a lower turntable with a disc plate mounted on the lower portion thereof, and upper and intermediate plates disposed above the lower turntable, each of the upper and intermediate plates having several tens to several thousands of pressure grinding rods mounted thereon, the upper plate being adapted to fix the pressure grinding rods and the intermediate plate being adapted to eccentrically rotate the pressure grinding rods.

摘要翻译： 公开了一种纳米研磨机，其包括具有安装在其下部的盘片的下转台和设置在下转台上方的上板和中板，每个上板和中板均安装有数十至数千个压力磨杆 上板适于固定压力研磨棒，中间板适于使压力磨棒偏心旋转。