公开(公告)号：US20060211205A1

公开(公告)日：2006-09-21

申请号：US11385642

申请日：2006-03-21

申请人： Sang-hun Jeon ,  Kyu-sik Kim ,  Chung-woo Kim ,  Sung-ho Park ,  Yo-sep Min ,  Jeong-hee Han

发明人： Sang-hun Jeon ,  Kyu-sik Kim ,  Chung-woo Kim ,  Sung-ho Park ,  Yo-sep Min ,  Jeong-hee Han

IPC分类号： H01L21/336

CPC分类号： H01L21/324 ,  H01L21/28273 ,  H01L21/28282

摘要： In a method of manufacturing a memory device having improved erasing characteristics, the method includes sequentially forming a tunneling oxide layer, a charge storing layer, and a blocking oxide layer on a semiconductor substrate; annealing the semiconductor substrate including the tunneling oxide layer, the charge storing layer, and the blocking oxide layer under a gas atmosphere so that the blocking oxide layer has a negative fixed oxide charge; forming a gate electrode on the blocking oxide layer with the negative fixed oxide charge and etching the tunneling oxide layer, the charge storing layer, and the blocking oxide layer to form a gate structure; and forming a first doped region and a second doped region in the semiconductor substrate at sides of the gate structure by doping the semiconductor substrate with a dopant.

摘要翻译： 在制造具有改善的擦除特性的存储器件的方法中，该方法包括在半导体衬底上依次形成隧穿氧化物层，电荷存储层和阻挡氧化物层; 在气体气氛下退火包括隧道氧化物层，电荷存储层和阻挡氧化物层的半导体衬底，使得阻挡氧化物层具有负的固定氧化物电荷; 在阻挡氧化物层上形成具有负固定氧化物电荷的栅电极，蚀刻隧道氧化物层，电荷存储层和阻挡氧化物层以形成栅极结构; 以及通过用掺杂剂掺杂半导体衬底，在栅极结构的侧面在半导体衬底中形成第一掺杂区和第二掺杂区。

公开(公告)号：US20060192246A1

公开(公告)日：2006-08-31

申请号：US11365114

申请日：2006-02-28

申请人： Sang-Hun Jeon ,  Chung-Woo Kim ,  Hyun-Sang Hwang ,  Sang-Moo Choi

发明人： Sang-Hun Jeon ,  Chung-Woo Kim ,  Hyun-Sang Hwang ,  Sang-Moo Choi

IPC分类号： H01L29/788 ,  H01L29/76

CPC分类号： B82Y10/00 ,  H01L29/40117 ,  H01L29/42332 ,  H01L29/792

摘要： In one embodiment, a memory device includes a gate structure comprising a metal nitride material in a charge storing layer on a semiconductor substrate. The gate structure is disposed between a first dopant region and a second dopant region formed on the semiconductor substrate. The metal nitride material is structured to function as a trap site for trapping a charge.

摘要翻译： 在一个实施例中，存储器件包括在半导体衬底上的电荷存储层中包括金属氮化物材料的栅极结构。 栅极结构设置在形成在半导体衬底上的第一掺杂区域和第二掺杂区域之间。 金属氮化物材料被构造成用作捕获电荷的陷阱位置。

公开(公告)号：US20060157777A1

公开(公告)日：2006-07-20

申请号：US11333959

申请日：2006-01-17

申请人： Sang-Hun Jeon ,  Chung-Woo Kim ,  Hyun-Sang Hwang ,  Sung-Kweon Baek ,  Sang-Moo Choi

发明人： Sang-Hun Jeon ,  Chung-Woo Kim ,  Hyun-Sang Hwang ,  Sung-Kweon Baek ,  Sang-Moo Choi

IPC分类号： H01L29/792

CPC分类号： H01L29/66833 ,  H01L21/28282 ,  H01L29/0843 ,  H01L29/167 ,  H01L29/792

摘要： A semiconductor memory device includes a first dopant area and a second dopant area in a semiconductor substrate, the first dopant area and the second dopant area doped with one selected from the group consisting of Sb, Ga, and Bi. The semiconductor memory device includes an insulating layer disposed in contact with the first dopant area and the second dopant area, and a gate electrode layer disposed in contact with the insulating layer.

摘要翻译： 半导体存储器件包括在半导体衬底中的第一掺杂区域和第二掺杂剂区域，掺杂有Sb，Ga和Bi组成的组的第一掺杂区域和第二掺杂剂区域。 半导体存储器件包括与第一掺杂剂区域和第二掺杂剂区域接触设置的绝缘层和与绝缘层接触设置的栅极电极层。

公开(公告)号：US07053448B2

公开(公告)日：2006-05-30

申请号：US11070090

申请日：2005-03-03

申请人： Sang-hun Jeon ,  Chung-woo Kim ,  Dong-joon Ma ,  Sung-kyu Choi

发明人： Sang-hun Jeon ,  Chung-woo Kim ,  Dong-joon Ma ,  Sung-kyu Choi

IPC分类号： H01L29/792

CPC分类号： H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/022 ,  H01L21/28282 ,  H01L21/31616 ,  H01L21/31645 ,  H01L28/56 ,  H01L29/513 ,  H01L29/792

摘要： A SONOS type memory includes a semiconductor substrate, first and second impurity regions in the semiconductor substrate doped with impurity ions of a predetermined conductivity, separated a predetermined distance from each other, a channel region between the first and second impurity regions, and a data storage type stack on the semiconductor substrate between the first and second impurity regions. The data storage type stack includes a tunneling oxide layer, a memory node layer for storing data, a blocking oxide layer, and an electrode layer, which are sequentially formed. A dielectric constant of the memory node layer is higher than dielectric constants of the tunneling and the blocking oxide layers, and a band offset of the memory node layer is lower than band offsets of the tunneling and the blocking oxide layers. The tunneling oxide layer and the blocking oxide layer are high dielectric insulating layers.

摘要翻译： SONOS型存储器包括半导体衬底，半导体衬底中掺杂有预定电导率的杂质离子的第一和第二杂质区，彼此隔开预定距离，第一和第二杂质区之间的沟道区，以及数据存储 在第一和第二杂质区之间的半导体衬底上。 数据存储型堆叠包括依次形成的隧道氧化物层，用于存储数据的存储节点层，阻挡氧化物层和电极层。 存储节点层的介电常数高于隧道和阻塞氧化物层的介电常数，并且存储器节点层的带偏移低于隧道和阻塞氧化物层的带偏移。 隧道氧化物层和阻挡氧化物层是高介电绝缘层。

公开(公告)号：US09178030B2

公开(公告)日：2015-11-03

申请号：US13616964

申请日：2012-09-14

申请人： Sang-hun Jeon ,  I-hun Song ,  Chang-jung Kim ,  Seung-eon Ahn

发明人： Sang-hun Jeon ,  I-hun Song ,  Chang-jung Kim ,  Seung-eon Ahn

IPC分类号： G02F1/136 ,  H01L29/45 ,  G02F1/1368 ,  G06F3/042 ,  H01L29/49 ,  H01L29/786 ,  G02F1/1333

CPC分类号： H01L29/45 ,  G02F1/13338 ,  G02F1/1368 ,  G06F3/0421 ,  G06F2203/04103 ,  H01L29/4908 ,  H01L29/78606 ,  H01L29/7869

摘要： A thin film transistor is provided. The transistor includes a gate; a first passivation layer covering the gate; a channel layer disposed on the first passivation layer; a source and a drain that are disposed on the first passivation layer and contact two sides of the channel layer; a second passivation layer covering the channel layer, the source, and the drain; first and second transparent electrode layers that are disposed on the second passivation layer and spaced apart from each other; a first transparent conductive via that penetrates the second passivation layer and connects the source and the first transparent electrode layer; and a second transparent conductive via that penetrates the second passivation layer and connects the drain and the second transparent electrode layer. A cross-sectional area of the gate is larger than a cross-sectional area of the channel layer, the source, and the drain combined.

摘要翻译： 提供薄膜晶体管。 晶体管包括一个栅极; 覆盖所述栅极的第一钝化层; 设置在所述第一钝化层上的沟道层; 源极和漏极，其设置在所述第一钝化层上并接触所述沟道层的两侧; 覆盖沟道层，源极和漏极的第二钝化层; 第一和第二透明电极层，其设置在第二钝化层上并彼此间隔开; 第一透明导电通孔，其穿透所述第二钝化层并连接所述源极和所述第一透明电极层; 以及第二透明导电通孔，其穿透第二钝化层并连接漏极和第二透明电极层。 栅极的横截面面积大于沟道层，源极和漏极组合的横截面面积。

公开(公告)号：US08586427B2

公开(公告)日：2013-11-19

申请号：US13204785

申请日：2011-08-08

申请人： Sang-Hun Jeon ,  Moon-Sook Lee ,  Byeong-Ok Cho

发明人： Sang-Hun Jeon ,  Moon-Sook Lee ,  Byeong-Ok Cho

IPC分类号： H01L21/8234 ,  H01L29/786

CPC分类号： H01L29/41733 ,  H01L27/1292 ,  H01L29/42384

摘要： A thin film transistor includes a layer structure having a gate electrode, a gate insulation layer and a channel layer. A source line may contact the channel layer, and may extend along a direction crossing over the gate electrode. The source line may partially overlap the gate electrode so that both sides of the source line overlapping the gate electrode may be entirely positioned between both sides of the gate electrode. A drain line may make contact with the channel layer and may be spaced apart from the source line by a channel length. The drain line may have a structure symmetrical to that of the source line. Overlap areas among the gate electrode, the source line and the drain line may be reduced, so that the thin film transistor may ensure a high cut-off frequency.

摘要翻译： 薄膜晶体管包括具有栅电极，栅极绝缘层和沟道层的层结构。 源极线可以接触沟道层，并且可以沿着与栅电极交叉的方向延伸。 源极线可以部分地与栅电极重叠，使得与栅极重叠的源极线的两侧可以完全位于栅电极的两侧之间。 漏极线可以与沟道层接触并且可以与源极线隔开通道长度。 漏极线可以具有与源极线对称的结构。 可以减小栅电极，源极线和漏极线之间的重叠区域，使得薄膜晶体管可以确保高的截止频率。

公开(公告)号：US08582800B2

公开(公告)日：2013-11-12

申请号：US13343342

申请日：2012-01-04

申请人： Min Kim ,  Hag-do Kim ,  Sang-hun Jeon

发明人： Min Kim ,  Hag-do Kim ,  Sang-hun Jeon

IPC分类号： H04R9/06 ,  H04R11/02

CPC分类号： H04R9/043 ,  Y10T29/49005

摘要： A speaker includes a frame, a diaphragm disposed in a top end of the frame of the speaker and a bobbin disposed below the diaphragm. A voice coil is wound around a bottom end of the bobbin and a magnetic member, which has a groove in which the bottom end of the bobbin around which the voice coil is wound, is inserted and reciprocated in a straight line upward and downward. A central pillar is fixed to the magnetic member at a center of the bobbin and extends parallel to the movement of the bobbin. A damper supports an inner circumferential surface of the bobbin from the central pillar. The damper additionally supports an outer circumferential surface of the bobbin, from the frame, so as to allow the bobbin to reciprocate in a straight line. This results in minimization of wobble and distortion, so that accurate sound is generated.

摘要翻译： 扬声器包括框架，设置在扬声器的框架的顶端的隔膜和设置在隔膜下方的筒管。 音圈缠绕在线轴的底端，磁性构件具有一个槽，在该槽中绕着绕线圈的绕线筒的底端以一直线向上和向下插入和往复运动。 中心支柱固定在线轴的中心处的磁性构件上，并平行于线轴的运动而延伸。 阻尼器从中心支柱支撑线轴的内圆周表面。 阻尼器另外从框架支撑筒管的外圆周表面，以便使筒管以直线往复运动。 这导致摆动和失真的最小化，从而产生准确的声音。

公开(公告)号：US20130208204A1

公开(公告)日：2013-08-15

申请号：US13616964

申请日：2012-09-14

申请人： Sang-hun JEON ,  I-hun SONG ,  Chang-jung KIM ,  Seung-eon AHN

发明人： Sang-hun JEON ,  I-hun SONG ,  Chang-jung KIM ,  Seung-eon AHN

IPC分类号： G02F1/1368 ,  H01L29/786

CPC分类号： H01L29/45 ,  G02F1/13338 ,  G02F1/1368 ,  G06F3/0421 ,  G06F2203/04103 ,  H01L29/4908 ,  H01L29/78606 ,  H01L29/7869

摘要： A thin film transistor is provided. The transistor includes a gate; a first passivation layer covering the gate; a channel layer disposed on the first passivation layer; a source and a drain that are disposed on the first passivation layer and contact two sides of the channel layer; a second passivation layer covering the channel layer, the source, and the drain; first and second transparent electrode layers that are disposed on the second passivation layer and spaced apart from each other; a first transparent conductive via that penetrates the second passivation layer and connects the source and the first transparent electrode layer; and a second transparent conductive via that penetrates the second passivation layer and connects the drain and the second transparent electrode layer. A cross-sectional area of the gate is larger than a cross-sectional area of the channel layer, the source, and the drain combined.

摘要翻译： 提供薄膜晶体管。 晶体管包括一个栅极; 覆盖所述栅极的第一钝化层; 设置在所述第一钝化层上的沟道层; 源极和漏极，其设置在所述第一钝化层上并接触所述沟道层的两侧; 覆盖沟道层，源极和漏极的第二钝化层; 第一和第二透明电极层，其设置在第二钝化层上并彼此间隔开; 第一透明导电通孔，其穿透所述第二钝化层并连接所述源极和所述第一透明电极层; 以及第二透明导电通孔，其穿透第二钝化层并连接漏极和第二透明电极层。 栅极的横截面面积大于沟道层，源极和漏极组合的横截面面积。

公开(公告)号：US20130168770A1

公开(公告)日：2013-07-04

申请号：US13547200

申请日：2012-07-12

申请人： Sang-hun Jeon ,  Chang-jung Kim ,  I-hun Song

发明人： Sang-hun Jeon ,  Chang-jung Kim ,  I-hun Song

IPC分类号： H01L29/772 ,  H01L21/336

CPC分类号： H01L29/42384 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

摘要： A high-voltage oxide transistor includes a substrate; a channel layer disposed on the substrate; a gate electrode disposed on the substrate to correspond to the channel layer; a source contacting a first side of the channel layer; and a drain contacting a second side of the channel layer, wherein the channel layer includes a plurality of oxide layers, and none of the plurality of oxide layers include silicon. The gate electrode may be disposed on or under the channel layer. Otherwise, the gate electrodes may be disposed respectively on and under the channel layer.

摘要翻译： 高压氧化物晶体管包括基板; 设置在所述基板上的沟道层; 设置在所述基板上以对应于所述沟道层的栅电极; 源极，与所述沟道层的第一侧接触; 以及与沟道层的第二面接触的漏极，其中所述沟道层包括多个氧化物层，并且所述多个氧化物层中没有一个包括硅。 栅电极可以设置在沟道层上或下面。 否则，栅极电极可以分别设置在沟道层上和下面。

公开(公告)号：US08455933B2

公开(公告)日：2013-06-04

申请号：US12801392

申请日：2010-06-07

申请人： Sung-ho Park ,  I-hun Song ,  Ji-hyun Hur ,  Sang-hun Jeon

发明人： Sung-ho Park ,  I-hun Song ,  Ji-hyun Hur ,  Sang-hun Jeon

IPC分类号： H01L31/062

CPC分类号： H01L27/14647 ,  H01L27/14603 ,  H01L27/14621 ,  H01L29/41733

摘要： An image sensor according to example embodiments may include a plurality of light-sensitive transparent oxide semiconductor layers as light-sensing layers. The light-sensing layers may be stacked in one unit pixel region.

摘要翻译： 根据示例性实施例的图像传感器可以包括多个感光透明氧化物半导体层作为感光层。 光感测层可以堆叠在一个单位像素区域中。