摘要:
A system for detecting potentially suspicious motion of a piece of equipment in a healthcare establishment. The system comprises a first functional entity adapted to determine a set of authorized clinicians associated with the piece of equipment; a second functional entity adapted to determine, based at least in part on data regarding wirelessly detectable tags associated with the authorized clinicians and the piece of equipment, when the piece of equipment is in motion and satisfies a remoteness condition with respect to a subset of the authorized clinicians; and a third functional entity adapted to signal potentially suspicious motion of the piece of equipment in response to the piece of equipment being in motion and satisfying the remoteness condition with respect to the subset of the authorized clinicians. In this way, it may be possible to thwart an attempted theft of equipment.
摘要:
A code module is loaded in-process or out-of-process depending on metadata. The code module implements a service and the metadata is associated with the service. The metadata also indicates whether the code module is to be loaded in-process or out-of-process. A request for a service object provided by the service is received from a service requestor. The metadata is examined to determine whether the code module is to be loaded in-process or out-of-process and, when the metadata indicates the code module is to be loaded in-process, the code module is loaded into the process of the service requester. When the metadata indicates the code module is to be loaded out-of-process, the code module is loaded into a host process separate from the process of the service requester. The requested service object is instantiated using the loaded code module and the service requestor is enabled to access the instantiated service object.
摘要:
Read disturbs in phase change memories may be reduced by progressively reducing the read pulse falling edges. This may reduce the possibility of quenching and inadvertent amorphization of at least a portion of the bit. As a result, in some embodiments, read disturbs may be reduced.
摘要:
A synchronous semiconductor memory device is operable in a normal mode and an alternative mode. The semiconductor device has a command bus for receiving a plurality of synchronously captured input signals, and a plurality of asynchronous input terminals for receiving a plurality of asynchronous input signals. The device further has a clock input for receiving an external clock signal thereon, with the device being specified by the manufacturer to be operated in the normal mode using an external clock signal having a frequency no less than a predetermined minimum frequency. An internal delay locked loop (DLL) clocking circuit is coupled to the clock input terminal and is responsive in normal operating mode to be responsive to the external clock signal to generate at least one internal clock signal. control circuitry in the device is responsive to a predetermined sequence of asynchronous signals applied to the device's asynchronous input terminals to place the device in an alternative mode of operation in which the internal clocking circuit is disabled, such that the device may be operated in the alternative mode using an external clock signal having a frequency less than the predetermined minimum frequency. The alternative mode of operation facilitates testing of the device at a speed less than the minimum frequency specified for the normal mode of operation.
摘要:
A memory device is operable in either a high mode or a low speed mode. In either mode 32 bits of data from each of two memory arrays are prefetched into respective sets of 32 flip-flops. In the high-speed mode, the prefetched data bits are transferred in parallel to 4 parallel-to-serial converters, which transform the parallel data bits to a burst of 8 serial data bits and apply the burst to a respective one of 4 data bus terminals. In the low speed mode, two sets of prefetched data bits are transferred in parallel to 8 parallel-to-serial converters, which transform the parallel data bits to a burst of 8 serial data bits and apply the burst to a respective one of 8 data bus terminals.
摘要:
A memory device is operable in either a high mode or a low speed mode. In either mode 32 bits of data from each of two memory arrays are prefetched into respective sets of 32 flip-flops. In the high-speed mode, the prefetched data bits are transferred in parallel to 4 parallel-to-serial converters, which transform the parallel data bits to a burst of 8 serial data bits and apply the burst to a respective one of 4 data bus terminals. In the low speed mode, two sets of prefetched data bits are transferred in parallel to 8 parallel-to-serial converters, which transform the parallel data bits to a burst of 8 serial data bits and apply the burst to a respective one of 8 data bus terminals.
摘要:
Mobile computer workstations must be sufficiently large in order to be stable, but small enough to be easily maneuverable through a work place. A vertically-adjustable mobile computer workstation of the present disclosure includes a pole rotatably attached to a base supported by a plurality of rotatable members. The pole includes a first arm rotatably attached to a second arm. A computer support is attached to the second arm and is moveable between a sitting user position and a standing user position, at least in part, by pivoting the arms of the pole with respect to one another and the moveable base.
摘要:
The present invention provides an integrated point of sale transaction terminal that includes both operator and customer interfaces. A housing for the electronics of the point of sale terminal comprises an operator interface unit integrally associated therewith and extending from one side thereof and a customer interface unit integrally associated therewith and extending from the opposing side thereof.
摘要:
A programmable logic device and associated method is provided with repairable regions. In one aspect, general routing interconnect lines are segmented within repairable regions. In another aspect, IO bus lines and associated circuitry are provided that accommodate redundancy in a staggered segmented architecture. In another aspect, a dedicated routing architecture between particular logic regions accommodates shifting to define and utilize repairable regions. Principles of other aspects are illustrated and described in the context of several exemplary embodiments of aspects of the invention.
摘要:
A method of producing carbon nanoparticles comprises the steps of: passing a gaseous carbon source through a heated reactor; and adding catalyst supported on substrate particles or thermally decomposable catalyst precursor supported on substrate particles to the heated reactor to form a fluidised bed; such that carbon nanoparticles are formed in the heated reactor.