Thin film transistor array panel and method of manufacturing the same
    71.
    发明授权
    Thin film transistor array panel and method of manufacturing the same 有权
    薄膜晶体管阵列面板及其制造方法

    公开(公告)号:US07989814B2

    公开(公告)日:2011-08-02

    申请号:US12420958

    申请日:2009-04-09

    IPC分类号: H01L33/00

    摘要: A thin film transistor array panel including a substrate; a display area signal line; a display area thin film transistor; a peripheral area signal line; a black matrix disposed on the display area signal line, the display area thin film transistor, and the peripheral area signal line, the black matrix including a first and a second contact holes exposing the peripheral area signal line; a protrusion member disposed on the peripheral area signal line, the protrusion member overlapping the peripheral area signal line; a transparent connector disposed on the black matrix and within the peripheral area, wherein the transparent connector contacts the peripheral area signal line through at least one of the first and the second contact holes and includes a protrusion within at least one of the first and the second contact holes which corresponds to the protrusion member; and a pixel electrode.

    摘要翻译: 一种薄膜晶体管阵列面板,包括基板; 显示区信号线; 显示区薄膜晶体管; 外围区域信号线; 设置在显示区域信号线上的黑色矩阵,显示区域薄膜晶体管和外围区域信号线,黑色矩阵包括暴露外围区域信号线的第一和第二接触孔; 突出部件,配置在所述周边区域信号线上,所述突出部件与所述周边区域信号线重叠; 透明连接器,其设置在所述黑矩阵上并在所述周边区域内,其中所述透明连接器通过所述第一和第二接触孔中的至少一个接触所述外围区域信号线,并且包括在所述第一和第二接触孔中的至少一个内的突起 对应于突出部件的接触孔; 和像素电极。

    APPARATUS AND METHOD FOR EXECUTING ROBOT TASK USING ROBOT MODEL DEFINITION
    72.
    发明申请
    APPARATUS AND METHOD FOR EXECUTING ROBOT TASK USING ROBOT MODEL DEFINITION 有权
    使用机器人模型定义执行机器人任务的装置和方法

    公开(公告)号:US20110153074A1

    公开(公告)日:2011-06-23

    申请号:US12963220

    申请日:2010-12-08

    IPC分类号: B25J9/00

    CPC分类号: B25J9/1605

    摘要: Provided is an apparatus for executing a robot task using a robot model definition. A task execution apparatus include: a storage unit to store at least one robot model, at least one robot behavior, and at least one robot task; and a task execution unit to generate at least one execution object from the stored at least one robot model, at least one robot behavior, and at least one robot task, and to execute a task of a robot from a corresponding execution object among the generated at least one execution object in response to an execution command input from a user.

    摘要翻译: 提供了一种使用机器人模型定义来执行机器人任务的装置。 任务执行装置包括:存储单元,用于存储至少一个机器人模型,至少一个机器人行为和至少一个机器人任务; 以及任务执行单元,用于从所存储的至少一个机器人模型,至少一个机器人行为和至少一个机器人任务生成至少一个执行对象,并且从生成的所述至少一个机器人模型中的相应执行对象执行机器人的任务 至少一个执行对象,响应于从用户输入的执行命令。

    THIN FILM TRANSISTOR ARRAY PANEL AND LIQUID CRYSTAL DISPLAY INCLUDING THE SAME
    73.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL AND LIQUID CRYSTAL DISPLAY INCLUDING THE SAME 有权
    薄膜晶体管阵列面板和液晶显示器,包括它们

    公开(公告)号:US20110109852A1

    公开(公告)日:2011-05-12

    申请号:US12783356

    申请日:2010-05-19

    IPC分类号: G02F1/23 H01L33/44

    摘要: A thin film transistor includes: a substrate; a thin film transistor formed on the substrate; a first color filter and a second color filter formed on the thin film transistor and each having a through hole; a capping layer formed on the first color filter and the second color filter; and a pixel electrode formed on the capping layer and connected to the thin film transistor through the through hole, wherein the capping layer formed on the first color filter has a first opening exposing the through hole of the first color filter, the size of the first opening is larger than the size of the through hole, the capping layer formed on the second color filter has a second opening disposed inside the through hole of the second color filter, and the size of the second opening is smaller than the size of the through hole. Accordingly, the capping layer completely covers the green color filter which prevents damage to the green color filter in a dry etching process, and also prevents changes of a color coordinate.

    摘要翻译: 薄膜晶体管包括:基板; 形成在所述基板上的薄膜晶体管; 形成在所述薄膜晶体管上并具有通孔的第一滤色器和第二滤色器; 形成在所述第一滤色器和所述第二滤色器上的覆盖层; 以及形成在覆盖层上的像素电极,并且通过通孔与薄膜晶体管连接,其中形成在第一滤色器上的封盖层具有暴露第一滤色器的通孔的第一开口,第一滤色器的尺寸 开口大于通孔的尺寸,形成在第二滤色器上的覆盖层具有设置在第二滤色器的通孔内的第二开口,并且第二开口的尺寸小于通孔的尺寸 孔。 因此,覆盖层完全覆盖绿色滤色器,防止在干蚀刻工艺中损坏绿色滤色器,并且还防止颜色坐标的变化。

    LIQUID CRYSTAL DISPLAY DEVICE
    75.
    发明申请
    LIQUID CRYSTAL DISPLAY DEVICE 有权
    液晶显示装置

    公开(公告)号:US20100123692A1

    公开(公告)日:2010-05-20

    申请号:US12619976

    申请日:2009-11-17

    IPC分类号: G09G3/36 G09G5/00

    摘要: A liquid crystal display device capable of controlling a viewing angle is disclosed.The liquid crystal display device includes: a liquid crystal panel configured to include a plurality of quad type pixels each consisted of red, green, blue, and viewing angle control sub-pixels; and a timing controller configured to reply to a viewing angle mode selected by a user and apply red, green, and blue data and any one of a wide viewing angle control data, a first narrow viewing angle control data, and a second narrow viewing angle control data to the liquid crystal panel.As such, the LCD device controls a range of viewing angles, thereby allowing the image to be viewed from every direction or not to be viewed from the left and right directions or the upward diagonal directions in the center of the user. In other words, the LCD device can limit the image display according to the positions of the persons adjacent to the user. Therefore, the user using the LCD device can adjust it to freely share information or to limit its range with adjacent persons. Furthermore, the LCD device can enhance information reliability and security.

    摘要翻译: 公开了一种能够控制视角的液晶显示装置。 液晶显示装置包括:液晶面板,被配置为包括由红色,绿色,蓝色和视角控制子像素组成的多个四边形像素; 以及定时控制器,被配置为回复由用户选择的视角模式,并且应用红色,绿色和蓝色数据以及宽视角控制数据,第一窄视角控制数据和第二窄视角中的任何一个 控制数据到液晶面板。 因此,LCD装置控制视角范围,从而允许从用户的中心的左右方向或向上的对角线方向观看从每个方向观看的图像。 换句话说,LCD装置可以根据与用户相邻的人的位置来限制图像显示。 因此,使用LCD装置的用户可以调整它自由地共享信息或者限制其相邻的人的范围。 此外,LCD设备可以提高信息的可靠性和安全性。

    THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME
    76.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME 有权
    薄膜晶体管阵列及其制造方法

    公开(公告)号:US20100109007A1

    公开(公告)日:2010-05-06

    申请号:US12472979

    申请日:2009-05-27

    IPC分类号: H01L33/00 H01L21/336

    摘要: The present disclosure relates to a thin film transistor array panel and a manufacturing method thereof. The method comprises: forming a thin film transistor on a substrate; forming a color filter adjacent to the thin film transistor and over the same substrate; depositing a first passivation layer on the color filter; coating a photosensitive film on the first passivation layer and exposing the photosensitive film to light using a first photomask to form a first photosensitive film pattern that comprises a first portion and a second portion that is thicker than the first portion, the first photosensitive film pattern exposing the first passivation layer around a circumference of the second portion; removing the exposed first passivation layer using the first photosensitive film pattern as an etch mask; blanket etching a whole surface of the first photosensitive film pattern until the first portion is removed to form a second photosensitive film pattern; depositing a conductive layer on the second photosensitive film pattern; and removing the second photosensitive film pattern to thereby selectively lift off portions of the conductive layer where a left behind portion forms a pixel electrode.

    摘要翻译: 本公开涉及一种薄膜晶体管阵列面板及其制造方法。 该方法包括:在衬底上形成薄膜晶体管; 形成与所述薄膜晶体管相邻并且在相同基板上的滤色器; 在滤色器上沉积第一钝化层; 在第一钝化层上涂覆感光膜,并使用第一光掩模将感光膜曝光,以形成第一感光膜图案,其包括比第一部分厚的第一部分和第二部分,第一感光膜图案曝光 所述第一钝化层围绕所述第二部分的圆周; 使用第一感光膜图案去除暴露的第一钝化层作为蚀刻掩模; 毯式地蚀刻第一感光膜图案的整个表面,直到第一部分被去除以形成第二感光膜图案; 在第二感光膜图案上沉积导电层; 并且去除第二感光膜图案,从而选择性地剥离左后部分形成像素电极的导电层的部分。

    Apparatus and method for controlling packet data to provide multimedia broadcast/multicast services in a CDMA mobile communication system
    77.
    发明授权
    Apparatus and method for controlling packet data to provide multimedia broadcast/multicast services in a CDMA mobile communication system 有权
    用于控制分组数据以在CDMA移动通信系统中提供多媒体广播/组播服务的装置和方法

    公开(公告)号:US07693112B2

    公开(公告)日:2010-04-06

    申请号:US10387029

    申请日:2003-03-12

    IPC分类号: H04B7/216

    摘要: An apparatus and method for providing multimedia broadcast and multicast services in a CDMA (Code Division Multiple Access) mobile communication system. The apparatus and method enable a common MBMC (Multimedia Broadcast/Multicast Control) layer to be allocated between a plurality of cells, enable MBMC layers to be classified on the basis of types of services, and use the classified MBMC layers. That is, individual MBMC layers do not have to store large-capacity data because a unique service or transmission rate in each of cells is based on a slow rate, and the individual MBMC layers corresponding to respective cells process a service requiring complex scheduling. Moreover, the apparatus and method enable the same information to be provided to a plurality of cells and enable a streaming-type service to be processed in a common MBMC layer commonly used in the cells. The apparatus and method can not only reduce an overhead of storage and processing devices but also minimize a time difference between broadcast and multicast timings of different cells, by enabling the common MBMC layer to commonly process MBMS information for the plurality of cells.

    摘要翻译: 一种用于在CDMA(码分多址)移动通信系统中提供多媒体广播和组播服务的装置和方法。 该装置和方法使得能够在多个小区之间分配公共MBMC(多媒体广播/多播控制)层,使得可以基于服务类型对MBMC层进行分类,并使用分类的MBMC层。 也就是说,单个MBMC层不必存储大容量数据,因为每个小区中的唯一服务或传输速率基于慢速率,并且对应于相应小区的各个MBMC层处理需要复杂调度的服务。 此外,该装置和方法使得能够向多个小区提供相同的信息,并且能够在小区中通常使用的公共MBMC层中处理流式服务。 该装置和方法不仅可以减少存储和处理设备的开销,而且通过使公共MBMC层能够共同处理多个小区的MBMS信息,从而最小化不同小区广播和组播定时之间的时差。

    Semiconductor memory device and arrangement method thereof
    78.
    发明授权
    Semiconductor memory device and arrangement method thereof 失效
    半导体存储器件及其布置方法

    公开(公告)号:US07679985B2

    公开(公告)日:2010-03-16

    申请号:US11863141

    申请日:2007-09-27

    IPC分类号: G11C8/00

    摘要: A semiconductor memory device and an arrangement method thereof are disclosed. The semiconductor memory device comprises column selecting signal lines and global data IO signal lines arranged on the same layer in the same direction above a memory cell array; word lines and first local data IO signal lines arranged on a different layer from the column selecting signal lines above the memory cell array, in a perpendicular direction to the column selecting signal lines; and second local data IO signal lines arranged on a different layer from the column selecting signal lines and the word lines above the memory cell array, in the same direction as the first local data IO signal lines.

    摘要翻译: 公开了一种半导体存储器件及其布置方法。 半导体存储器件包括在存储单元阵列上方沿相同方向布置在同一层上的列选择信号线和全局数据IO信号线; 在与列选择信号线垂直的方向上与位于存储单元阵列上方的列选择信号线布置在不同层上的字线和第一本地数据IO信号线; 以及在与第一本地数据IO信号线相同的方向上与列选择信号线和存储单元阵列上方的字线​​布置在不同层上的第二本地数据IO信号线。

    Address buffer circuit and method for controlling the same
    79.
    发明授权
    Address buffer circuit and method for controlling the same 失效
    地址缓冲电路及其控制方法

    公开(公告)号:US07580318B2

    公开(公告)日:2009-08-25

    申请号:US11232175

    申请日:2005-09-21

    IPC分类号: G11C8/06 G11C5/14

    CPC分类号: G11C8/06

    摘要: An address buffer circuit for a semiconductor memory device wherein an address buffer is enabled (to output an internal address signal) in response to a first level of a control signal and, but is disabled in response to a second level of the control signal. An address buffer control unit generates the control signal at the second level in ‘no operation’ state (NOP command) in which the semiconductor memory device does not perform data accessing operations and generates the control signal at the first level while the semiconductor memory device performs data accessing operations, thereby reducing or minimizing the output of an internal address buffered and output by the address buffer at and thus reducing power consumption during no-operation states of the semiconductor memory device.

    摘要翻译: 一种用于半导体存储器件的地址缓冲器电路,其中地址缓冲器响应于控制信号的第一电平被使能(以输出内部地址信号),并且响应于控制信号的第二电平被禁止。 地址缓冲器控制单元在半导体存储器件不执行数据访问操作的“无操作”状态(NOP命令)中产生处于第二电平的控制信号,并且在半导体存储器件执行时产生处于第一电平的控制信号 数据访问操作,从而减少或最小化缓冲并由地址缓冲器输出的内部地址的输出,从而降低半导体存储器件的无操作状态期间的功耗。

    Semiconductor memory devices having controllable input/output bit architectures
    80.
    发明授权
    Semiconductor memory devices having controllable input/output bit architectures 有权
    具有可控输入/输出位体系结构的半导体存储器件

    公开(公告)号:US07391634B2

    公开(公告)日:2008-06-24

    申请号:US11358798

    申请日:2006-02-21

    IPC分类号: G11C5/02 G11C5/06

    CPC分类号: G11C7/22

    摘要: A semiconductor memory device may include a semiconductor substrate, a first unit memory device on the substrate, and a second unit memory device on the substrate. The first unit memory device may be configured to receive first through Nth data bits and/or to provide first through Nth data bits to an external device in response to a command signal, an address signal, and a clock signal, and in response to a first chip selection signal. The second unit memory device may be configured to receive (N+1)th through 2Nth data bits and/or to provide (N+1)th through 2Nth data bits to an external device in response to the command signal, the address signal, and the clock signal, and in response to a second chip selection signal. Related methods are also discussed.

    摘要翻译: 半导体存储器件可以包括半导体衬底,衬底上的第一单元存储器件和衬底上的第二单元存储器件。 第一单元存储器件可以被配置为响应于命令接收第一至第N个/或以上数据位和/或向外部设备提供第一至第N个/ 信号,地址信号和时钟信号,以及响应于第一芯片选择信号。 第二单元存储器件可以被配置为通过2N个第(N)个数据位接收(N + 1)个第个和/或提供(N + 1) 响应于命令信号,地址信号和时钟信号,以及响应于第二芯片选择信号,向外部设备提供/ SUP>至2N第数据位。 还讨论了相关方法。