Directory For Multi-Node Coherent Bus
    71.
    发明申请
    Directory For Multi-Node Coherent Bus 有权
    多节点相干总线目录

    公开(公告)号:US20090031086A1

    公开(公告)日:2009-01-29

    申请号:US11828448

    申请日:2007-07-26

    IPC分类号: G06F12/16

    CPC分类号: G06F12/0822

    摘要: A method for maintaining cache coherency for a multi-node system using a specialized bridge which allows for fewer forward progress dependencies. A local node makes a determination whether a request is a local or system request. If the request is a local request, a look-up of a directory in the local node is performed. If an entry in the directory of the local node indicates that data in the request does not have a remote owner and that the request does not have a remote destination, the coherency of the data is resolved on the local node, and a transfer of the data specified in the request is performed if required and if the request is a local request. If the entry indicates that the data has a remote owner or that the request has a remote destination, the request is forwarded to all remote nodes in the multi-node system.

    摘要翻译: 一种使用允许较少前进进度依赖性的专用桥来维护多节点系统的高速缓存一致性的方法。 本地节点确定请求是本地还是系统请求。 如果请求是本地请求,则执行本地节点中的目录的查找。 如果本地节点目录中的条目指示请求中的数据不具有远程所有者,并且请求没有远程目标,则在本地节点上解析数据的一致性,并且传输 如果需要,请求中指定的数据将被执行,并且请求是本地请求。 如果条目指示数据具有远程所有者或请求具有远程目标,则将请求转发到多节点系统中的所有远程节点。

    Directory for Multi-Node Coherent Bus
    72.
    发明申请
    Directory for Multi-Node Coherent Bus 有权
    多节点相干总线目录

    公开(公告)号:US20090031085A1

    公开(公告)日:2009-01-29

    申请号:US11828439

    申请日:2007-07-26

    IPC分类号: G06F12/16

    CPC分类号: G06F12/0817 G06F12/0831

    摘要: A method for maintaining cache coherency for a multi-node system using a specialized bridge which allows for fewer forward progress dependencies. A look-up of a local node directory is performed if a request received at a multi-node bridge of the local node is a system request. If a directory entry indicates that data specified in the request has a local owner or local destination, the request is forwarded to the local node. If the local node determines that the request is a local request, a look-up of the local node directory is performed. If the directory entry indicates that data specified in the request has a local owner and local destination, the coherency of the data on the local node is resolved and a transfer of the request data is performed if required. Otherwise, the request is forwarded to all remote nodes in the multi-node system.

    摘要翻译: 一种使用允许较少前进进度依赖性的专用桥来维护多节点系统的高速缓存一致性的方法。 如果在本地节点的多节点桥接处接收到的请求是系统请求,则执行本地节点目录的查找。 如果目录项指示请求中指定的数据具有本地所有者或本地目标,则请求将转发到本地节点。 如果本地节点确定请求是本地请求,则执行本地节点目录的查找。 如果目录条目指示请求中指定的数据具有本地所有者和本地目标,则解析本地节点上的数据的一致性,并且如果需要,则执行请求数据的传输。 否则,请求将转发到多节点系统中的所有远程节点。

    System and method for use in a computerized imaging system to
efficiently transfer graphics information to a graphics subsystem
employing masked span
    73.
    发明授权
    System and method for use in a computerized imaging system to efficiently transfer graphics information to a graphics subsystem employing masked span 失效
    用于计算机化成像系统中的系统和方法用于将图形信息有效地传送到使用掩蔽跨度的图形子系统

    公开(公告)号:US5790125A

    公开(公告)日:1998-08-04

    申请号:US636093

    申请日:1996-04-22

    CPC分类号: G06F3/14

    摘要: Graphics information is efficiently transferred from a host computer to a graphics subsystem in which rendering and pixel data is generated by the host system. A masked span operation provides an assist for 3D rendering performed by the system processor of the host and other system resources. Storage of depth, alpha, stencil, and other pixel data is in system memory including one or more ancillary graphics buffers. The main processor of the host system generates pixel data associated with an image. This data is checked against the buffers. As a result of such checking, a mask is generated by the host system. The mask is transferred in burst mode across the host-graphic subsystem PCI bus to the graphics subsystem in combination with span width, and in the case of interpolated color, color base and color increment data, and X,Y coordinate of the first pixel. In the graphics subsystem the mask is employed with the other data to load the frame buffer with the portion of pixel data defined by the mask.

    摘要翻译: 图形信息从主计算机有效地传送到图形子系统,其中渲染和像素数据由主机系统生成。 屏蔽跨度操作提供了由主机的系统处理器和其他系统资源执行的3D渲染的辅助。 深度,阿尔法,模板和其他像素数据的存储在系统存储器中,包括一个或多个辅助图形缓冲器。 主机系统的主处理器生成与图像相关联的像素数据。 此缓冲区检查此数据。 作为这种检查的结果,主机系统产生掩码。 掩模以突发模式通过主机图形子系统PCI总线传送到图形子系统,并结合跨度宽度,并且在内插颜色,色底和颜色增量数据以及第一像素的X,Y坐标的情况下。 在图形子系统中,使用掩码与其他数据一起加载由该掩码定义的像素数据部分的帧缓冲器。

    CONTROLLING BANDWIDTH RESERVATIONS METHOD AND APPARATUS
    74.
    发明申请
    CONTROLLING BANDWIDTH RESERVATIONS METHOD AND APPARATUS 失效
    控制带宽预留方法和装置

    公开(公告)号:US20110246695A1

    公开(公告)日:2011-10-06

    申请号:US13162917

    申请日:2011-06-17

    IPC分类号: G06F12/00

    CPC分类号: H04L41/0896

    摘要: Disclosed is an apparatus which operates to substantially evenly distribute commands and/or data packets issued from a managed program or other entity over a given time period. The even distribution of these commands or data packets minimizes congestion in critical resources such as memory, I/O devices and/or the bus for transferring the data between source and destination. Any unmanaged commands or data packets are treated as in conventional technology.

    摘要翻译: 公开了一种操作以在给定时间段内基本上均匀分布从被管理程序或其他实体发出的命令和/或数据分组的装置。 这些命令或数据分组的均匀分布最大限度地减少了诸如存储器,I / O设备和/或用于在源和目的地之间传送数据的总线的关键资源的拥塞。 任何非托管命令或数据包都按常规技术处理。

    Method and apparatus for directory-based coherence with distributed directory management utilizing prefetch caches

    公开(公告)号:US07321956B2

    公开(公告)日:2008-01-22

    申请号:US10809579

    申请日:2004-03-25

    IPC分类号: G06F13/00 G06F12/00

    CPC分类号: G06F12/0862 G06F12/0817

    摘要: A system for cache coherency comprises a memory. The memory comprises a plurality of data items and a plurality of directory information items, each data item uniquely associated with one of the plurality of directory information items. Each of the plurality of data items is configured in accordance with one of a plurality of access modes. Each of the plurality of directory information items comprises indicia of the access mode of its associated data item. A multiplexer couples to the memory and comprises a multiplex ratio. A plurality of buffers couple to the multiplexer and to the memory. The multiplex ratio is a function of the number of buffers in the plurality of buffers. A plurality of multiplexer/demultiplexers (MDMs) each uniquely couple to a different one of the plurality of buffers. A plurality of processing elements couple to the memory; each of the processing elements uniquely couples in a point-to-point connection to a different one of the plurality of MDMs. Each of the processing elements is configured to transmit a data request to its associated MDM, the data request identifying one of the plurality of data items and an access mode. Each of the processing elements further comprises a prefetch page cache, the prefetch page cache configured to store a subset of the plurality of data items and the plurality of directory information items. The memory is configured to transmit a data response to each of the processing elements in response to a data request, the data response comprising the identified data item and its associated directory information. Each of the processing elements is farther configured to receive the data response and to compare the associated directory information with the access mode of the data request and in the event that the associated directory information and the access mode of the data request are not compatible, to initiate coherence actions for the requested data item.

    Method and apparatus for generating a mask value and command for extreme data rate memories utilizing error correction codes
    80.
    发明授权
    Method and apparatus for generating a mask value and command for extreme data rate memories utilizing error correction codes 有权
    用于利用纠错码生成用于极端数据速率存储器的掩码值和命令的方法和装置

    公开(公告)号:US07287103B2

    公开(公告)日:2007-10-23

    申请号:US11130911

    申请日:2005-05-17

    IPC分类号: G06F3/00 G06F12/00

    CPC分类号: G11C7/1006

    摘要: A method, an apparatus, and a computer program product are provided for the handling of write mask operations in an XDR™ DRAM memory system. This invention eliminates the need for a two-port array because the mask generation is done as the data is received. Less logic is needed for the mask calculation because only 144 of the 256 possible byte values are decoded. The mask value is generated and stored in a mask array. Independently, the write data is stored in a write buffer. The mask value is utilized to generate a write mask command. Once the write mask command is issued, the write data and the mask value are transmitted to a multiplexer. The multiplexer masks the write data using the mask value, so that the masked data can be stored in the XDR DRAMS.

    摘要翻译: 提供了一种方法,装置和计算机程序产品,用于处理XDR(TM)DRAM存储器系统中的写掩码操作。 本发明消除了对双端口阵列的需要,因为在接收到数据时完成了掩码生成。 掩码计算需要较少的逻辑,因为256个可能的字节值中只有144个被解码。 掩码值生成并存储在掩码数组中。 独立地,写入数据被存储在写入缓冲器中。 掩码值用于生成写掩码命令。 一旦写掩码命令被发出,写入数据和掩码值被发送到多路复用器。 多路器使用掩码值对写入数据进行掩码,以便将掩蔽的数据存储在XDR DRAMS中。