公开(公告)号：US10157870B1

公开(公告)日：2018-12-18

申请号：US15716494

申请日：2017-09-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Wei Wu ,  Jing-Cheng Lin ,  Szu-Wei Lu ,  Ying-Ching Shih

IPC: H01L23/12 ,  H01L23/00 ,  H01L21/768 ,  H01L23/522 ,  H01L23/31 ,  H01L21/683 ,  H01L23/532

Abstract: A method of fabricating an integrated fan-out package is described. The method includes the following steps. A carrier is provided. Through insulator vias are formed on the carrier, and at least one semiconductor die is provided on the carrier. The semiconductor die is attached to the carrier through a die attach film. An insulating encapsulant having a first region and a second region is formed on the carrier. The insulating encapsulant in the first region is encapsulating the semiconductor die, and the insulating encapsulant in the second region is encapsulating the plurality of through insulator vias. The carrier is debonded, and a trimming process is performed to remove portions of the insulating encapsulant in the second region, and a trench is formed in the insulating encapsulant in the second region. A plurality of conductive balls is disposed on the insulating encapsulant in the second region. The plurality of conductive balls surround the first region of the insulating encapsulant and the die attach film, and is electrically connected to the plurality of through insulator vias.

公开(公告)号：US20240387330A1

公开(公告)日：2024-11-21

申请号：US18786921

申请日：2024-07-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chin-Chuan Chang ,  Szu-Wei Lu ,  Chen-Hua Yu

IPC: H01L23/48 ,  H01L21/56 ,  H01L21/768 ,  H01L23/00 ,  H01L23/498 ,  H01L25/065 ,  H01L25/10

Abstract: A method includes forming a set of through-vias in a substrate, the set of through-vias partially penetrating a thickness of the substrate. First connectors are formed over the set of through-vias on a first side of the substrate. The first side of the substrate is attached to a carrier. The substrate is thinned from the second side to expose the set of through-vias. Second connectors are formed over the set of through-vias on the second side of the substrate. A device die is bonded to the second connectors. The substrate is singulated into multiple packages.

公开(公告)号：US20240387198A1

公开(公告)日：2024-11-21

申请号：US18786739

申请日：2024-07-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih Ting Lin ,  Szu-Wei Lu ,  Kuo-Chiang Ting ,  Shang-Yun Hou ,  Chi-Hsi Wu ,  Weiming Chris Chen

IPC: H01L21/56 ,  H01L21/48 ,  H01L21/768 ,  H01L23/31 ,  H01L23/538

Abstract: A method includes attaching semiconductor devices to an interposer structure, attaching the interposer structure to a first carrier substrate, attaching integrated passive devices to the first carrier substrate, forming an encapsulant over the semiconductor devices and the integrated passive devices, debonding the first carrier substrate, attaching the encapsulant and the semiconductor devices to a second carrier substrate, forming a first redistribution structure on the encapsulant, the interposer structure, and the integrated passive devices, wherein the first redistribution structure contacts the interposer structure and the integrated passive devices, and forming external connectors on the first redistribution structure.

公开(公告)号：US20240385388A1

公开(公告)日：2024-11-21

申请号：US18319854

申请日：2023-05-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Szu-Wei Lu ,  Tsung-Fu Tsai ,  Chao-Jen Wang

IPC: G02B6/38 ,  G02B6/40

Abstract: Devices and methods of manufacture and use of a fiber bundle is presented. In embodiments the fiber bundle comprises a substrate material and optical fiber openings that extend from a first side of the substrate material to a second side of the substrate material, wherein the optical fiber openings at the first side of the substrate material are shifted either horizontally or vertically from the second side of the substrate material.

公开(公告)号：US20240385378A1

公开(公告)日：2024-11-21

申请号：US18789778

申请日：2024-07-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsung-Fu Tsai ,  Hsing-Kuo Hsia ,  Szu-Wei Lu ,  Chen-Hua Yu

IPC: G02B6/136 ,  G02B6/12 ,  G02B6/124

Abstract: A package includes a laser diode includes a bonding layer; a first dielectric layer over the laser diode, wherein the first dielectric layer is directly bonded to the bonding layer of the laser diode; a first silicon nitride waveguide in the first dielectric layer, wherein the first silicon nitride waveguide extends over the laser diode; a second dielectric layer over the first silicon nitride waveguide; a silicon waveguide in the second dielectric layer; an interconnect structure over the silicon waveguide; and conductive features extending through the first dielectric layer and the second dielectric layer to electrically contact the interconnect structure.

公开(公告)号：US20240379602A1

公开(公告)日：2024-11-14

申请号：US18781022

申请日：2024-07-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wen-Chih Chiou ,  Chen-Hua Yu ,  Shih Ting Lin ,  Szu-Wei Lu

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/29 ,  H01L23/31 ,  H01L23/498 ,  H01L25/00 ,  H01L25/065

Abstract: In an embodiment, a device includes: an interposer; a first integrated circuit device bonded to the interposer with dielectric-to-dielectric bonds and with metal-to-metal bonds; a second integrated circuit device bonded to the interposer with dielectric-to-dielectric bonds and with metal-to-metal bonds; a buffer layer around the first integrated circuit device and the second integrated circuit device, the buffer layer including a stress reduction material having a first Young's modulus; and an encapsulant around the buffer layer, the first integrated circuit device, and the second integrated circuit device, the encapsulant including a molding material having a second Young's modulus, the first Young's modulus less than the second Young's modulus.

公开(公告)号：US20240280764A1

公开(公告)日：2024-08-22

申请号：US18364332

申请日：2023-08-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsung-Fu Tsai ,  Chen-Hua Yu ,  Szu-Wei Lu ,  Chao-Jen Wang

IPC: G02B6/42

CPC classification number: G02B6/4206 ,  G02B6/4239 ,  G02B6/4245

Abstract: A method includes connecting a photonic package to a substrate, wherein the photonic package includes a waveguide and an edge coupler that is optically coupled to the waveguide; connecting a semiconductor device to the substrate adjacent the photonic package; depositing a first protection material on a first sidewall of the photonic package that is adjacent the edge coupler; encapsulating the photonic package and the semiconductor device with an encapsulant; performing a first sawing process through the encapsulant and the substrate, wherein the first sawing process exposes the first protection material; and removing the first protection material to expose the first sidewall of the photonic package.

公开(公告)号：US11967546B2

公开(公告)日：2024-04-23

申请号：US17870099

申请日：2022-07-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shang-Yun Hou ,  Hsien-Pin Hu ,  Sao-Ling Chiu ,  Wen-Hsin Wei ,  Ping-Kang Huang ,  Chih-Ta Shen ,  Szu-Wei Lu ,  Ying-Ching Shih ,  Wen-Chih Chiou ,  Chi-Hsi Wu ,  Chen-Hua Yu

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538

CPC classification number: H01L23/49816 ,  H01L21/4853 ,  H01L21/56 ,  H01L23/3121 ,  H01L23/49861 ,  H01L24/13 ,  H01L23/5385 ,  H01L2224/023 ,  H01L2225/107

Abstract: A semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second interposer, where the first side of the first interposer and the first side of the second interposer face the first die.

公开(公告)号：US11948930B2

公开(公告)日：2024-04-02

申请号：US17097579

申请日：2020-11-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chin-Chuan Chang ,  Szu-Wei Lu ,  Chen-Hua Yu

IPC: H01L23/12 ,  H01L21/66 ,  H01L21/683 ,  H01L21/768 ,  H01L21/78 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065 ,  H01L25/18

CPC classification number: H01L25/50 ,  H01L21/6836 ,  H01L21/76898 ,  H01L21/78 ,  H01L22/14 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L25/18 ,  H01L2221/68327 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/17181

Abstract: A method includes forming a set of through-vias in a substrate, the set of through-vias partially penetrating a thickness of the substrate. First connectors are formed over the set of through-vias on a first side of the substrate. The first side of the substrate is attached to a carrier. The substrate is thinned from the second side to expose the set of through-vias. Second connectors are formed over the set of through-vias on the second side of the substrate. A device die is bonded to the second connectors. The substrate is singulated into multiple packages.

公开(公告)号：US20240071849A1

公开(公告)日：2024-02-29

申请号：US17822476

申请日：2022-08-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jian-You Chen ,  Kuan-Yu Huang ,  Li-Chung Kuo ,  Chen-Hsuan Tsai ,  Kung-Chen Yeh ,  Hsien-Ju Tsou ,  Ying-Ching Shih ,  Szu-Wei Lu

IPC: H01L23/16 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L23/16 ,  H01L21/4857 ,  H01L21/56 ,  H01L23/3157 ,  H01L23/49822 ,  H01L23/49833 ,  H01L24/16 ,  H01L2224/16227

Abstract: A semiconductor package including one or more dam structures and the method of forming are provided. A semiconductor package may include an interposer, a semiconductor die bonded to a first side of the interposer, an encapsulant on the first side of the interposer encircling the semiconductor die, a substrate bonded to the a second side of the interposer, an underfill between the interposer and the substrate, and one or more of dam structures on the substrate. The one or more dam structures may be disposed adjacent respective corners of the interposer and may be in direct contact with the underfill. The coefficient of thermal expansion of the one or more of dam structures may be smaller than the coefficient of thermal expansion of the underfill.