公开(公告)号：US07164414B2

公开(公告)日：2007-01-16

申请号：US09906617

申请日：2001-07-18

申请人： Yukio Tanaka

发明人： Yukio Tanaka

IPC分类号： G09G5/00

CPC分类号： G09G3/3648 ,  G09G3/3688 ,  H03K17/145 ,  H03K17/687 ,  H03K17/6872 ,  H03K17/693

摘要： A variation in threshold may be suppressed by structuring an analog switch by a MOS transistor and forming a signal synchronized to a clock by making the clock which is a common signal in continuity or discontinuity. An object of the present invention is to reduce the variation in the signal synchronized to the clock by the variation in threshold of the MOS transistor in a circuit which is synchronized to the clock.

摘要翻译： 可以通过由MOS晶体管构造模拟开关并通过使作为公共信号的时钟连续性或不连续性而形成与时钟同步的信号来抑制阈值的变化。 本发明的目的是通过与时钟同步的电路中的MOS晶体管的阈值变化来减少与时钟同步的信号的变化。

公开(公告)号：US20060238483A1

公开(公告)日：2006-10-26

申请号：US11448258

申请日：2006-06-07

申请人： Yukio Tanaka ,  Keisuke Hayashi

发明人： Yukio Tanaka ,  Keisuke Hayashi

IPC分类号： G09G3/36

CPC分类号： G11C19/00 ,  G09G3/20 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0408 ,  G09G2310/0224 ,  G09G2310/027 ,  G09G2310/0281 ,  G11C19/28 ,  H01L27/12 ,  H01L27/1214

摘要： There is provided a driving circuit which is simple and has a small occupied area. A shift register circuit of the present invention includes a plurality of register circuits. Each of the register circuits includes a clocked inverter circuit and an inverter circuit. Both are connected in series with each other so that an output signal of the clocked inverter circuit becomes an input signal of the inverter circuit. Further, the register circuit includes a signal line by which an output signal of the inverter circuit is transmitted. Since a number of elements are connected to the signal line and parasitic capacitance is large, it has a high load. The shift register circuit of the present invention uses the fact that since the parasitic capacitance of the signal line is large, it has a high load.

公开(公告)号：US07078606B2

公开(公告)日：2006-07-18

申请号：US10893997

申请日：2004-07-20

申请人： Yukio Tanaka

发明人： Yukio Tanaka

IPC分类号： G01D13/02

CPC分类号： G10D13/065

摘要： A high hat stand includes a cymbal receiving plate journaled to a main mounting body. An adjustable bolt, for adjusting the pivot orientation around the journal of the receiving plate with respect to the mounting body, passes through the receiving plate so that as a nut is tightened on the bolt the receiving plate is tilted with respect to the mounting body. A biasing spring may also be interposed between the receiving plate and the mounting body. A cushion may be disposed between the plate and the cymbal.

摘要翻译： 高帽架包括一个挂在主安装体上的钹接收板。 用于调节围绕接收板的轴颈相对于安装体的枢轴定向的可调节螺栓穿过接收板，使得当螺母紧固在螺栓上时，接收板相对于安装体倾斜。 偏置弹簧也可以插入在接收板和安装体之间。 垫子可以设置在板和钹之间。

公开(公告)号：US20060131945A1

公开(公告)日：2006-06-22

申请号：US11259076

申请日：2005-10-27

申请人： Yukio Tanaka ,  Kazuhito Kashima ,  Ritsuro Okano

发明人： Yukio Tanaka ,  Kazuhito Kashima ,  Ritsuro Okano

IPC分类号： B60N2/02

CPC分类号： B60N2/0232 ,  B60N2/045 ,  B60N2/1695 ,  B60N2/181 ,  B60N2/1842 ,  B60N2/1853 ,  B60N2/2209 ,  B60N2/2222

摘要： A vehicular seat has a seat cushion supported on a floor portion of a vehicle body panel, a seat back divided into a seat back upper and a seat back lower and controlled to be reclined, a seat back upper frame supporting the seat back upper and fixed to a rear portion of the vehicle body panel, a seat back lower frame supporting the seat back lower and rotatably connected to the seat back upper frame, a seat cushion frame supporting the seat cushion and a driving unit fixed to the floor portion and connected to the seat cushion frame so as to activate the seat cushion frame to tilt upwards and forwards. The seat cushion frame and the seat back lower frame are rotatably connected to each other so that the seat back lower is displaced forwards as the seat cushion frame is activated to tilt.

摘要翻译： 车辆座椅具有支撑在车体面板的地板部分上的座垫，分为座椅靠背上部和座椅靠背的座椅靠背并被控制成倾斜，座椅靠背上部框架支撑座椅靠背上部并固定 到车身面板的后部，座椅靠背下框架，其将座椅靠背下支撑并可旋转地连接到座椅靠背上框架，座垫框架支撑座垫，以及驱动单元，固定到地板部分并连接到 座垫框架，以便启动座垫框架向上和向前倾斜。 座垫框架和座椅靠背下框架彼此可旋转地连接，使得当座垫框架被启动以倾斜时，座椅靠背下部向前移位。

公开(公告)号：US20060093458A1

公开(公告)日：2006-05-04

申请号：US10974820

申请日：2004-10-28

申请人： Yukio Tanaka

发明人： Yukio Tanaka

IPC分类号： F16B39/02

CPC分类号： F16B39/12 ,  F16B9/026 ,  G10D13/065

摘要： A locking nut assembly for hi-hat clutch comprises a main body having a bolt hole, a locking nut is disposed in the main body, the locking nut a central threaded opening for receiving a threaded stem of the hi-hat clutch, and a key bolt. The locking nut further having a threaded aperture. The key bolt passes through the bolt hole of said main body, and is threaded into the threaded aperture of the locking nut, whereby the key bolt is selectively tightened to force the threaded portion of the locking nut into engagement with the threaded stem.

摘要翻译： 一种用于hi hat式离合器的锁紧螺母组件包括：具有螺栓孔的主体;锁定螺母设置在主体内;锁紧螺母为中心螺纹开口，用于容纳踩下式离合器的螺纹杆;以及键 螺栓。 锁定螺母还具有螺纹孔。 钥匙螺栓穿过所述主体的螺栓孔，并且螺纹连接到锁定螺母的螺纹孔中，由此选择性地拧紧钥匙螺栓以迫使锁紧螺母的螺纹部分与螺纹杆接合。

公开(公告)号：US20050150357A1

公开(公告)日：2005-07-14

申请号：US10893997

申请日：2004-07-20

申请人： Yukio Tanaka

发明人： Yukio Tanaka

IPC分类号： G10D13/02 ,  G10D13/06

CPC分类号： G10D13/065

摘要： A high hat stand includes a cymbal receiving plate journaled to a main mounting body. An adjustable bolt, for adjusting the pivot orientation around the journal of the receiving plate with respect to the mounting body, passes through the receiving plate so that as a nut is tightened on the bolt the receiving plate is tilted with respect to the mounting body. A biasing spring may also be interposed between the receiving plate and the mounting body. A cushion may be disposed between the plate and the cymbal.

摘要翻译： 高帽架包括一个挂在主安装体上的钹接收板。 用于调节围绕接收板的轴颈相对于安装体的枢轴定向的可调节螺栓穿过接收板，使得当螺母紧固在螺栓上时，接收板相对于安装体倾斜。 偏置弹簧也可以插入在接收板和安装体之间。 垫子可以设置在板和钹之间。

公开(公告)号：US06738005B2

公开(公告)日：2004-05-18

申请号：US10053656

申请日：2002-01-24

申请人： Jun Koyama ,  Mitsuaki Osame ,  Yukio Tanaka ,  Munehiro Azami ,  Naoko Yano ,  Shou Nagao

发明人： Jun Koyama ,  Mitsuaki Osame ,  Yukio Tanaka ,  Munehiro Azami ,  Naoko Yano ,  Shou Nagao

IPC分类号： H03M166

CPC分类号： H01L27/1214 ,  G09G3/20 ,  G09G3/2011 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2310/0218 ,  G09G2310/027 ,  G09G2310/0297 ,  H01L21/84 ,  H01L29/04 ,  H03K17/6872 ,  H03K17/693 ,  H03M1/682 ,  H03M1/765

摘要： A D/A conversion circuit with a small area is provided. In the D/A conversion circuit, according to a digital signal transmitted from address lines of an address decoder, one of four gradation voltage lines is selected. A circuit including two N-channel TFTs is connected in series to a circuit including two P-channel TFT, and a circuit including the circuits connected in series to each other is connected in parallel to each of the gradation voltage lines. Further, an arrangement of the circuit including the two N-channel TFTs and the circuit including the two P-channel TFTs is reversed for every gradation voltage line. By this, the crossings of wiring lines in the D/A conversion circuit becomes small and the area can be made small.

摘要翻译： 提供具有小面积的D / A转换电路。 在D / A转换电路中，根据从地址解码器的地址线发送的数字信号，选择四个灰度电压线中的一个。 包括两个N沟道TFT的电路串联连接到包括两个P沟道TFT的电路，并且包括彼此串联连接的电路的电路并联连接到每个灰度电压线。 此外，包括两个N沟道TFT的电路和包括两个P沟道TFT的电路的布置对于每个灰度电压线都是反向的。 由此，D / A转换电路中的布线的交叉变小，可以使面积变小。

公开(公告)号：US06476790B1

公开(公告)日：2002-11-05

申请号：US09639973

申请日：2000-08-16

申请人： Yukio Tanaka

发明人： Yukio Tanaka

IPC分类号： G09G336

CPC分类号： G09G3/3688 ,  G09G3/3633 ,  G09G2310/027 ,  G09G2310/0283

摘要： To provide a driver circuit that is simple and possessing a small surface area. The driver circuit comprises a shift register circuit and a plurality of latch circuits. The shift register circuit is composed of a plurality of register circuits having a clocked inverter circuit and an inverter circuit connected in series. The plurality of digital data latch circuits has a first N-channel Tr and a second N-channel Tr of which the sources or the drains are connected in series, a P-channel Tr, and a data holding circuit. The clocked inverter circuit and the inverter circuit generate a timing signal on the basis of a clock signal and a start pulse to thereby feed the timing signal to the register circuit neighboring a register circuit and to a gate electrode of the first N-channel Tr and the P-channel Tr feeds a first electric voltage to the data holding circuit in accordance with a Res signal inputted to the gate electrode. The second N-channel Tr then takes in digital data on the basis of the timing signal to thereby output the digital data to the source or the drain of the first N-channel Tr. The timing signal outputted from the register circuit neighboring a register circuit is fed to the gate electrode of the first N-channel Tr.

摘要翻译： 提供简单且具有小表面积的驱动电路。 驱动器电路包括移位寄存器电路和多个锁存电路。 移位寄存器电路由具有时钟反相器电路和串联连接的反相器电路的多个寄存器电路组成。 多个数字数据锁存电路具有其源极或漏极串联连接的第一N沟道Tr和第二N沟道Tr，P沟道Tr和数据保持电路。 时钟反相器电路和反相器电路基于时钟信号和起始脉冲产生定时信号，从而将定时信号馈送到与寄存器电路相邻的寄存器电路和第一N沟道Tr的栅电极， P沟道Tr根据输入到栅电极的Res信号向数据保持电路馈送第一电压。 第二N信道Tr然后基于定时信号接收数字数据，从而将数字数据输出到第一N信道Tr的源或漏极。 从与寄存器电路相邻的寄存器电路输出的定时信号被馈送到第一N沟道Tr的栅电极。

公开(公告)号：US06362948B1

公开(公告)日：2002-03-26

申请号：US09350065

申请日：1999-07-08

申请人： Nobushige Moriwaki ,  Kazuhiro Yoshida ,  Kenichi Watanabe ,  Akio Shobu ,  Osamu Yamaoka ,  Yukio Tanaka

发明人： Nobushige Moriwaki ,  Kazuhiro Yoshida ,  Kenichi Watanabe ,  Akio Shobu ,  Osamu Yamaoka ,  Yukio Tanaka

IPC分类号： H01G220

CPC分类号： H01G4/232 ,  H01G4/228

摘要： A first metallic terminal plate is joined to a first side-face of an electronic chip formed by lamination of lamination-capacitors as plural electronic elements, and a second terminal plate to the second side-face of the chip. The first and second metallic terminal plates comprises first terminal plate portions joined to the first and second side-faces, respectively, and the second terminal plate portions bent along the lower edges of the first terminal plate portions toward the opposed side-faces, respectively and elongated from the range under the electronic chip to be out of the range in the width direction.

摘要翻译： 第一金属端子板与通过叠层电容器形成的电子芯片的第一侧面接合，作为多个电子元件，以及第二端子板连接到芯片的第二侧面。 第一和第二金属端子板分别包括接合到第一和第二侧面的第一端子板部分，并且第二端子板部分分别沿着第一端子板部分的下边缘朝着相对的侧面弯曲，并且 从电子芯片下方的范围延伸出宽度方向的范围。

公开(公告)号：US5742122A

公开(公告)日：1998-04-21

申请号：US614274

申请日：1996-03-12

申请人： Kimio Amemiya ,  Yukio Tanaka ,  Hitoshi Teshirogi

发明人： Kimio Amemiya ,  Yukio Tanaka ,  Hitoshi Teshirogi

IPC分类号： H01J11/12 ,  H01J11/14 ,  H01J11/22 ,  H01J11/24 ,  H01J11/26 ,  H01J11/28 ,  H01J11/34 ,  H01J11/36 ,  H01J11/38 ,  H01J11/40 ,  H01J11/42 ,  H01J11/44 ,  H01J11/48 ,  H01J11/50 ,  H01J17/49 ,  H01J1/62

CPC分类号： H01J11/12 ,  H01J11/38

摘要： A surface discharge type plasma display panel has a dielectric layer facing to a discharge gas space and a pair of sustaining electrodes embedded in the dielectric layer and disposed apart from each other by a discharge gap on one of the substrates spaced parallel to each other at the discharge gas space. The dielectric layer includes a pair of first thickness portions formed on far ends of the electrodes from the discharge gap respectively which are larger than a second thickness portion on facing near ends of the facing electrodes. The dielectric layer is provided with a depth from its surface to the substrate larger than that on the second thickness portion between adjacent the electrodes. This plasma display panel prevents any useless expansion of the surface discharge over the sustaining electrodes. The discharge current is reduced and the electrical load on the deriving circuit for the surface discharge PDP decreases to save a power consumption and further the emission efficiency of the surface discharge type PDP is improved.

摘要翻译： 表面放电型等离子体显示面板具有面向放电气体空间的电介质层和嵌入电介质层中的一对保持电极，并且通过放电间隙彼此间隔地彼此平行地间隔开， 放电气体空间。 电介质层包括一对第一厚度部分，分别形成在距离放电间隙的电极的远端上，其大于面对相对电极的近端的第二厚度部分。 电介质层的表面与基板之间的深度比相邻电极之间的第二厚度部分的深度大。 该等离子体显示面板防止在维持电极上的表面放电的任何无用的膨胀。 放电电流降低，表面放电PDP的导出电路的电负载减小，节约了电力消耗，进一步提高了表面放电型PDP的发光效率。