公开(公告)号：US20230138958A1

公开(公告)日：2023-05-04

申请号：US17585549

申请日：2022-01-27

申请人： SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY CHINESE ACADEMY OF SCIENCES

发明人： Xing Wei ,  Rong Wang Dai ,  Zi Wen Wang ,  Zhong Ying Xue ,  Meng Chen ,  Hong Tao Xu

IPC分类号： H01L21/324 ,  H01L21/02 ,  H01L21/311

摘要： The present disclosure relates to a method for treating a wafer surface. By controlling the gas composition at each stage of the treatment process, and corresponding processes of heating and annealing, and cooling and thinning by oxidation, the final wafer is enabled to have a surface roughness of less than 5 Å. This effectively reduces the cost of the final treatment process and has good application prospects.

公开(公告)号：US11640986B2

公开(公告)日：2023-05-02

申请号：US17363645

申请日：2021-06-30

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yu-Chang Lin ,  Tien-Shun Chang ,  Szu-Ying Chen ,  Chun-Feng Nieh ,  Sen-Hong Syue ,  Huicheng Chang

IPC分类号： H01L29/76 ,  H01L29/66 ,  H01L27/092 ,  H01L29/78 ,  H01L21/8238 ,  H01L21/265 ,  H01L21/324

摘要： A semiconductor device, and a method of manufacturing, is provided. A dummy gate is formed on a semiconductor substrate. An interlayer dielectric (ILD) is formed over the semiconductor fin. A dopant is implanted into the ILD. The dummy gate is removed and an anneal is performed on the ILD. The implantation and the anneal lead to an enhancement of channel resistance by a reduction in interlayer dielectric thickness and to an enlargement of critical dimensions of a metal gate.

公开(公告)号：US11631807B2

公开(公告)日：2023-04-18

申请号：US17403753

申请日：2021-08-16

申请人： Integrated Silicon Solution, (Cayman) Inc.

发明人： Kuk-Hwan Kim ,  Dafna Beery ,  Marcin Gajek ,  Michail Tzoufras ,  Kadriye Deniz Bozdag ,  Eric Ryan ,  Satoru Araki ,  Andy Walker

IPC分类号： H01L43/12 ,  H01L27/22 ,  H01L43/02 ,  H01L21/285 ,  H01L21/02 ,  H01L21/308 ,  H01L43/08 ,  H01L43/10 ,  H01L21/324

摘要： Aspects of the present technology are directed toward Integrated Circuits (IC) including a plurality of trenches disposed in a substrate about a set of silicide regions. The trenches can extend down into the substrate below the set of silicide regions. The silicide regions can be formed by implanting metal ions into portions of a substrate exposed by a mask layer with narrow pitch openings. The trenches can be formed by selectively etching the substrate utilizing the set of silicide regions as a trench mask. An semiconductor material with various degree of crystallinity can be grown from the silicide regions, in openings that extend through subsequently formed layers down to the silicide regions.

公开(公告)号：US20230098442A1

公开(公告)日：2023-03-30

申请号：US18074713

申请日：2022-12-05

申请人： Mattson Technology, Inc. ,  Beijing E-Town Semiconductor Technology Co., Ltd.

发明人： Rolf Bremensdorfer ,  Johannes Keppler ,  Michael X. Yang ,  Thorsten Hülsmann

IPC分类号： H01L21/67 ,  H01L21/324 ,  H01L21/687

摘要： Support plates for localized heating in thermal processing systems to uniformly heat workpieces are provided. In one example implementation, localized heating is achieved by modifying a heat transmittance of a support plate such that one or more portions of the support plate proximate the areas that cause cold spots transmit more heat than the rest of the support plate. For example, the one or more portions (e.g., arears proximate to one or more support pins) of the support plate have a higher heat transmittance (e.g., a higher optical transmission) than the rest of the support plate. In another example implementation, localized heating is achieved by heating a workpiece via a coherent light source through a transmissive support structure (e.g., one or more support pins, or a ring support) in addition to heating the workpiece globally by light from heat sources.

公开(公告)号：US11610974B2

公开(公告)日：2023-03-21

申请号：US17247803

申请日：2020-12-23

申请人： Acorn Semi, LLC

发明人： Walter A. Harrison ,  Paul A. Clifton ,  Andreas Goebel ,  R. Stockton Gaines

IPC分类号： H01L29/47 ,  H01L21/285 ,  H01L29/04 ,  H01L21/283 ,  H01L29/45 ,  H01L21/324 ,  H01L29/161

摘要： Techniques for reducing the specific contact resistance of metal-semiconductor (group IV) junctions by interposing a monolayer of group V or group III atoms at the interface between the metal and the semiconductor, or interposing a bi-layer made of one monolayer of each, or interposing multiple such bi-layers. The resulting low specific resistance metal-group IV semiconductor junctions find application as a low resistance electrode in semiconductor devices including electronic devices (e.g., transistors, diodes, etc.) and optoelectronic devices (e.g., lasers, solar cells, photodetectors, etc.) and/or as a metal source and/or drain region (or a portion thereof) in a field effect transistor (FET). The monolayers of group III and group V atoms are predominantly ordered layers of atoms formed on the surface of the group IV semiconductor and chemically bonded to the surface atoms of the group IV semiconductor.

公开(公告)号：US20230084734A1

公开(公告)日：2023-03-16

申请号：US17990873

申请日：2022-11-21

申请人： STANDARD LIFTERS, INC.

发明人： Scott M. Breen ,  Joel T. Pyper

IPC分类号： H01L27/06 ,  H01L29/45 ,  H01L21/324 ,  H01L21/8249 ,  H01L29/732

摘要： A modular guided keeper base, guided keeper assembly, and related method includes a modular guided keeper base that mounts to a die member. The guided keeper base has an integrated stop for guide pin retention. The guided keeper base can also accommodate a variety of bushings within the base. The guided keeper base is attached to a die member using a mounting flange(s). Mounting fasteners pass through the fastener holes in the mounting flanges and are anchored in the die member to securely retain the guided keeper assembly in place. A retainer ring is mounted in an associated groove in the base over the heads of the mounting fasteners to prevent unintentional unfastening of the fasteners from the die member.

公开(公告)号：US20230067115A1

公开(公告)日：2023-03-02

申请号：US17459821

申请日：2021-08-27

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Sheng-chun YANG ,  Po-Chih HUANG ,  Chih-Lung CHENG ,  Yi-Ming LIN ,  Chen-Hao LIAO ,  Min-Cheng CHUNG

IPC分类号： H01L21/324 ,  H01L21/67

摘要： A system and method for generating a gas curtain over an access port of a processing chamber for a semiconductor substrate. A gas flow stabilizer and a gas flow receiver, each including a horizontal flow section and a vertical flow section cooperate to generate a gas curtain that impedes gas, e.g., oxygen, from outside the processing chamber, from flowing into the chamber, for example, when the access port is opened to add/or to remove a workpiece from the processing chamber.

公开(公告)号：US20230060301A1

公开(公告)日：2023-03-02

申请号：US17669339

申请日：2022-02-10

申请人： Kokusai Electric Corporation

发明人： Tomihiro AMANO

IPC分类号： H01L21/324 ,  C23C16/44 ,  C23C16/46

摘要： According to one aspect of the technique, there is provided a method of manufacturing a semiconductor device, including: (a) heating a substrate to a first temperature while supporting the substrate on a substrate support, and supplying a process gas into a process vessel accommodating the substrate support; (b) lowering a temperature of a low temperature structure provided in the process vessel to a second temperature lower than the first temperature by supplying an inert gas or air to a coolant flow path provided in the process vessel after (a) for a predetermined time, wherein defects occur when a cleaning gas is supplied to the low temperature structure at the first temperature; and (c) cleaning the low temperature structure by supplying the cleaning gas into the process vessel after (b)

公开(公告)号：US20230058186A1

公开(公告)日：2023-02-23

申请号：US17884090

申请日：2022-08-09

申请人： Tokyo Electron Limited

发明人： Robert D. Clark

IPC分类号： C23C16/455 ,  C23C16/56 ,  H01L21/225 ,  H01L29/06 ,  H01L21/02 ,  H01L21/324 ,  H01L29/45

摘要： A method of processing a substrate that includes: loading the substrate in a processing chamber, the substrate including a raised feature of a semiconductor; forming a conformal dopant layer on the raised feature by atomic layer deposition (ALD); forming a metal layer over the raised feature; thermally treating the dopant layer to form an ultra-shallow dopant region in the raised feature by diffusion of a dopant from the dopant layer into the raised feature; and thermally treating the metal layer to form an ohmic contact region in the raised feature by diffusion of a metal from the metal layer into the raised feature.

公开(公告)号：US11588016B2

公开(公告)日：2023-02-21

申请号：US17447873

申请日：2021-09-16

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Jae-gil Lee ,  Jin-myung Kim ,  Kwang-won Lee ,  Kyoung-deok Kim ,  Ho-cheol Jang

IPC分类号： H01L29/06 ,  H01L29/78 ,  H01L29/08 ,  H01L21/02 ,  H01L29/10 ,  H01L29/66 ,  H01L21/225 ,  H01L21/265 ,  H01L21/324

摘要： A semiconductor device having a super junction and a method of manufacturing the semiconductor device capable of obtaining a high breakdown voltage are provided, whereby charge balance of the super junction is further accurately controlled in the semiconductor device that is implemented by an N-type pillar and a P-type pillar. The semiconductor device includes a semiconductor substrate; and a blocking layer including a first conductive type pillar and a second conductive type pillar that extend in a vertical direction on the semiconductor substrate and that are alternately arrayed in a horizontal direction, wherein, in the blocking layer, a density profile of a first conductive type dopant may be uniform in the horizontal direction, and the density profile of the first conductive type dopant may vary in the vertical direction.