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    Semiconductor manufacturing platform with in-situ electrical bias and methods thereof
    1.
    发明授权
    Semiconductor manufacturing platform with in-situ electrical bias and methods thereof 有权

    公开(公告)号：US12211907B2

    公开(公告)日：2025-01-28

    申请号：US17397159

    申请日：2021-08-09

    Applicant: Tokyo Electron Limited

    Inventor： Dina H. Triyoso ,  Robert D. Clark ,  David Hurley ,  Ian Colgan

    IPC: H01L21/28

    Abstract: A method of fabricating a semiconductor device includes placing a semiconductor wafer into a first deposition chamber of a manufacturing platform, the semiconductor wafer comprising a first conductive layer, depositing a dielectric layer on the first conductive layer in the first deposition chamber, placing the semiconductor wafer in a second deposition chamber of the manufacturing platform, and depositing a second conductive layer on the dielectric layer in the second deposition chamber. The method further includes placing the semiconductor wafer into a processing chamber of an electric-field annealer of the manufacturing platform, and in the processing chamber, applying an electrical bias voltage across the dielectric layer by coupling the first conductive layer to a first potential and coupling the second conductive layer to a second potential, and annealing the semiconductor wafer while applying the electrical bias voltage.

    ULTRA-SHALLOW DOPANT AND OHMIC CONTACT REGIONS BY SOLID STATE DIFFUSION
    3.
    发明申请
    ULTRA-SHALLOW DOPANT AND OHMIC CONTACT REGIONS BY SOLID STATE DIFFUSION 有权

    公开(公告)号：US20230058186A1

    公开(公告)日：2023-02-23

    申请号：US17884090

    申请日：2022-08-09

    Applicant: Tokyo Electron Limited

    Inventor： Robert D. Clark

    IPC: C23C16/455 ,  C23C16/56 ,  H01L21/225 ,  H01L29/06 ,  H01L21/02 ,  H01L21/324 ,  H01L29/45

    Abstract: A method of processing a substrate that includes: loading the substrate in a processing chamber, the substrate including a raised feature of a semiconductor; forming a conformal dopant layer on the raised feature by atomic layer deposition (ALD); forming a metal layer over the raised feature; thermally treating the dopant layer to form an ultra-shallow dopant region in the raised feature by diffusion of a dopant from the dopant layer into the raised feature; and thermally treating the metal layer to form an ohmic contact region in the raised feature by diffusion of a metal from the metal layer into the raised feature.

    Atomic layer etching using a boron-containing gas and hydrogen fluoride gas
    4.
    发明授权
    Atomic layer etching using a boron-containing gas and hydrogen fluoride gas 有权

    公开(公告)号：US10283369B2

    公开(公告)日：2019-05-07

    申请号：US15671404

    申请日：2017-08-08

    Applicant: Tokyo Electron Limited

    Inventor： Robert D. Clark ,  Kandabara N. Tapily

    IPC: H01L21/311 ,  C01B7/19 ,  C01B35/02 ,  C01B35/06

    Abstract: Embodiments of the invention provide a method for atomic layer etching (ALE) of a substrate. According to one embodiment, the method includes providing a substrate, and exposing the substrate to hydrogen fluoride (HF) gas and a boron-containing gas to etch the substrate. According to another embodiment, the method includes providing a substrate containing a metal oxide film, exposing the substrate to HF gas to form a fluorinated surface layer on the metal oxide film, and exposing the substrate to a boron-containing gas to remove the fluorinated surface layer from the metal oxide film. The exposures may be repeated at least once to further etch the metal oxide film.

    Liquid phase atomic layer deposition
    5.
    发明授权
    Liquid phase atomic layer deposition 有权

    公开(公告)号：US10253414B2

    公开(公告)日：2019-04-09

    申请号：US14871619

    申请日：2015-09-30

    Applicant: Tokyo Electron Limited

    Inventor： Robert D. Clark

    IPC: B05D1/36 ,  B05D3/12 ,  C23C18/00 ,  B05D1/00 ,  B05D7/00 ,  B05D1/38

    Abstract: A processing system and method for depositing a film on a substrate by liquid phase ALD is disclosed in various embodiments. The method includes providing the substrate in a process chamber, spinning on the substrate a first reactant in a first liquid to form a self-limiting layer of the first reactant on the substrate, spinning on the substrate a second reactant in a second liquid, where the second reactant reacts with the self-limiting layer of the first reactant on the substrate to form a film on the substrate, and repeating the spinning steps at least once until the film has a desired thickness. Other embodiments of the invention further include rinsing the substrate to remove excess first and second reactants from the substrate, and heat-treating the substrate during and/or following the film deposition.

    Atomic Layer Deposition of Aluminum-doped High-k Films
    7.
    发明申请
    Atomic Layer Deposition of Aluminum-doped High-k Films 审中-公开
    铝掺杂高k膜的原子层沉积

    公开(公告)号：US20150255267A1

    公开(公告)日：2015-09-10

    申请号：US14642173

    申请日：2015-03-09

    Applicant: Tokyo Electron Limited

    Inventor： Kandabara N. Tapily ,  Robert D. Clark ,  Steven P. Consiglio ,  Cory Wajda ,  Gerrit J. Leusink

    IPC: H01L21/02

    CPC classification number: H01L21/0228 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02194 ,  H01L21/022 ,  H01L21/28185 ,  H01L21/28194 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545

    Abstract: Embodiments of the invention describe methods for forming a semiconductor device. According to one embodiment, the method includes depositing an aluminum-doped high-k film on a substrate by atomic layer deposition (ALD) that includes: a) pulsing a metal-containing precursor gas into a process chamber containing the substrate, b) pulsing an aluminum-containing precursor gas into the process chamber, where a) and b) are sequentially performed without an intervening oxidation step, and c) pulsing an oxygen-containing gas into the process chamber. The method can further include heat-treating the aluminum-doped high-k film to crystallize or increase the crystallization of the film.

    Abstract translation: 本发明的实施例描述了形成半导体器件的方法。 根据一个实施例，该方法包括通过原子层沉积（ALD）在衬底上沉积铝掺杂的高k膜，所述原子层沉积（ALD）包括：a）将含金属的前体气体脉冲到含有衬底的处理室中，b）脉冲 将含铝的前体气体进入处理室，其中a）和b）在没有中间氧化步骤的情况下顺序地进行，以及c）将含氧气体脉冲到处理室中。 该方法还可以包括热处理铝掺杂的高k膜以结晶或增加膜的结晶。

    SELECTIVE INHIBITION FOR SELECTIVE METAL DEPOSITION
    9.
    发明公开
    SELECTIVE INHIBITION FOR SELECTIVE METAL DEPOSITION 审中-公开

    公开(公告)号：US20230274932A1

    公开(公告)日：2023-08-31

    申请号：US18156142

    申请日：2023-01-18

    Applicant: Tokyo Electron Limited

    Inventor： Kai-Hung Yu ,  Robert D. Clark ,  Ryota Yonezawa ,  Hiroaki Niimi ,  Hidenao Suzuki ,  Kandabara Tapily ,  Takahiro Miyahara ,  Cory Wajda

    IPC: H01L21/02 ,  H01L21/768

    CPC classification number: H01L21/0228 ,  H01L21/76879

    Abstract: A method for processing a substrate includes treating the substrate with a small molecular inhibitor (SMI), the substrate including a recess formed in a dielectric layer and a first metal layer in the recess, the SMI covering a surface of the first metal layer. The method further includes, after treating the substrate with the SMI, treating the substrate with a large molecular inhibitor (LMI), the LMI covering sidewalls of the dielectric layer in the recess. The method further includes heating the substrate to remove the SMI from the first metal layer and to expose the first metal layer in the recess, where the LMI remains on the sidewalls after removing the SMI from the first metal layer. The method further includes depositing a second metal over the first metal layer in the recess, where the LMI covering the sidewalls prevents deposition of the second metal on the dielectric layer.

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