Signal detection circuit and signal detection method

    公开(公告)号:US10333583B2

    公开(公告)日:2019-06-25

    申请号:US15881692

    申请日:2018-01-26

    发明人: Takamitsu Hafuka

    摘要: A signal detection circuit includes: a correlation circuit including the first through nth correlators connected sequentially as the first through nth stage correlators and each computing a correlation value between a received signal and a spreading sequence while shifting the received signal to the next stage depending on the chip rate period of the spreading sequence; a first adder that adds k correlation values computed by k correlators so as to generate a first addition value; a second adder that adds r correlation values computed by r correlators so as to generate a second addition value; a subtractor that subtracts the first addition value from the second addition value so as to generate a subtraction value; and a synchronization detection unit that compares the subtraction value with a threshold value, so as to detect the synchronization timing of the spreading sequence and the received signal.

    NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE
    84.
    发明申请

    公开(公告)号:US20190180808A1

    公开(公告)日:2019-06-13

    申请号:US16266642

    申请日:2019-02-04

    发明人: Takashi YAMADA

    IPC分类号: G11C11/22

    CPC分类号: G11C11/2273 G11C11/221

    摘要: A non-volatile semiconductor storage device including a first potential retention line configured to retain a potential corresponding to data read from the memory cell, a second potential retention line configured to retain a reference potential read from the memory cell in which the reference potential is written after the data is read out, a sense amplifier configured to amplify a difference between the potential retained by the first potential retention line and the reference potential for reading out the data from the memory cell, a first offset adjustment circuit connected to the first potential retention line, for adjusting an offset for the potential, a second offset adjustment circuit connected to the second potential retention line, and an offset command signal supply circuit configured to supply a first offset command signal to the first offset adjustment circuit so as to control the offset.

    Semiconductor device and semiconductor device manufacturing method

    公开(公告)号:US10312284B2

    公开(公告)日:2019-06-04

    申请号:US15961919

    申请日:2018-04-25

    发明人: Hiroki Kasai

    摘要: A semiconductor device including a first semiconductor layer including a first region and a second region adjacent to the first region; a first insulator layer provided above the first semiconductor layer; an intermediate semiconductor layer, having an n-type conduction, provided above the first region of the first semiconductor layer and above the first insulator layer; a second insulator layer provided above the intermediate semiconductor layer; a second semiconductor layer provided above the first region of the first semiconductor layer and above the second insulator layer; a sensor formed in the second region of the first semiconductor layer; a contact electrode connected to the intermediate semiconductor layer; and a circuit element formed in the second semiconductor layer.

    METHOD FOR REWRITING DATA IN NONVOLATILE MEMORY AND SEMICONDUCTOR DEVICE

    公开(公告)号:US20190115080A1

    公开(公告)日:2019-04-18

    申请号:US16158250

    申请日:2018-10-11

    发明人: Tomomi WATANABE

    摘要: In the present invention, a vacant block which is unwritten is identified as a temporary storage block when a writing destination block has already data written. Then, data writing step writing an incoming data to be written into the temporarily storage block, managing step including assigning a pair of the writing destination block and the temporarily storage block an index number which corresponds to the pair, and generating a management table which indicates the index number associating with a physical address indicating a physical position of the temporarily storage block in the nonvolatile memory are performed. In the data writing step, the physical address which corresponds to the index number assigned to the writing destination block is obtained from the management table. The incoming data to be written is written into the temporary storage block indicated by the physical address.

    Semiconductor device with lead frame

    公开(公告)号:US10262929B2

    公开(公告)日:2019-04-16

    申请号:US15365525

    申请日:2016-11-30

    发明人: Yuuki Kodama

    摘要: A semiconductor device and a semiconductor device manufacturing method that may prevent positional displacement of an electronic component mounted on a lead frame. The semiconductor device includes a lead frame, and an electronic component that has a protruding or recessed structure at a bonding face that bonds to the lead frame and is bonded to the lead frame, in a state in which a portion of the lead frame is fitted together with the protruding or recessed structure.

    Semiconductor device and manufacturing method thereof

    公开(公告)号:US10256184B2

    公开(公告)日:2019-04-09

    申请号:US14484414

    申请日:2014-09-12

    发明人: Kazuhide Abe

    摘要: A semiconductor device has a semiconductor substrate, a first insulating film formed on a surface of the semiconductor substrate, a first recess formed in the first insulating film, a first barrier film formed on an inner surface of the first insulating film except a top peripheral region of the first trench, a first conductive film formed in the first trench, and a covering film formed on an upper surface and a top peripheral region of the first conductive film and an upper surface of the first barrier film. The first conductive film includes copper.

    Voltage supply circuit and semiconductor storage device

    公开(公告)号:US10249374B2

    公开(公告)日:2019-04-02

    申请号:US15623759

    申请日:2017-06-15

    发明人: Junya Ogawa

    IPC分类号: G11C7/00 G11C16/30

    摘要: A voltage supply circuit includes a step-down circuit configured to receive a power supply voltage, step down the power supply voltage to generate a step-down voltage having a constant value lower than a value of the power supply voltage, and a booster circuit configured to boost the step-down voltage to generate an output voltage, the output voltage having a value greater than the value of the power supply voltage.