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公开(公告)号:US11942399B2
公开(公告)日:2024-03-26
申请号:US18098668
申请日:2023-01-18
申请人: MEDIATEK INC.
发明人: Yi-Tao Tsai , Yun-Tai Hsiao
IPC分类号: H01L23/49
CPC分类号: H01L23/49
摘要: A semiconductor device includes a plurality of functional blocks, each being configured to provide at least one predetermined function. The functional blocks at least include a first functional block and a second functional block. The first functional block and the second functional block are coupled in serial with a predetermined current flowing therethrough.
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公开(公告)号:US20240097336A1
公开(公告)日:2024-03-21
申请号:US18462564
申请日:2023-09-07
申请人: MEDIATEK Inc.
发明人: Chung-Hsin CHIANG
CPC分类号: H01Q9/0407 , H01Q1/38 , H01Q1/48
摘要: An antenna device is provided, which includes a ground plate, a patterned radiating layer and a wall structure. The patterned radiating layer is arranged above the ground plate. The wall structure is formed above the ground plate. On a first reference plane substantially parallel with the ground plate, a projection of the wall structure overlaps a projection of the patterned radiating layer. With respect to a first reference axis substantially perpendicular to the ground plate, an upper surface of the wall structure is lower than the patterned radiating layer.
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公开(公告)号:US20240096861A1
公开(公告)日:2024-03-21
申请号:US18454220
申请日:2023-08-23
申请人: MEDIATEK INC.
发明人: Che-Hung KUO , Hsiao-Yun CHEN , Wen-Pin CHU , Chun-Hsiang HUANG
IPC分类号: H01L25/10 , H01L23/31 , H01L23/48 , H01L23/538 , H10B80/00
CPC分类号: H01L25/105 , H01L23/3128 , H01L23/481 , H01L23/5383 , H01L23/5385 , H01L28/90 , H10B80/00 , H01L24/16 , H01L2224/16225
摘要: A semiconductor package assembly is provided. The semiconductor package assembly includes first semiconductor die, a second semiconductor die and a memory package. The first semiconductor die and the second semiconductor die are stacked on each other. The first semiconductor die includes a first interface and a third interface. The first interface overlaps and is electrically connected to the second interface arranged on the second semiconductor die. The third interface is arranged on a first edge of the first semiconductor die. The memory package is disposed beside the first semiconductor die, wherein the memory package is electrically connected to the first semiconductor die by the third interface.
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公开(公告)号:US20240096860A1
公开(公告)日:2024-03-21
申请号:US18233863
申请日:2023-08-14
申请人: MEDIATEK INC.
发明人: Tai-Hao Peng , Yao-Tsung Huang
IPC分类号: H01L25/10 , H01L23/498 , H01L25/16
CPC分类号: H01L25/105 , H01L23/49816 , H01L25/165 , H01L24/48 , H01L2225/1017 , H01L2225/1041 , H01L2225/1058 , H01L2924/1205 , H01L2924/1436
摘要: A multi-die package on package includes a bottom package having a first device die and a second device die. A top package including a memory die is stacked on the bottom package.
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公开(公告)号:US20240095168A1
公开(公告)日:2024-03-21
申请号:US18451698
申请日:2023-08-17
申请人: MediaTek Inc.
发明人: Yu-Pin Chen , Jia-Ming Chen , Chien-Yuan Lai , Ya Ting Chang , Cheng-Tse Chen
IPC分类号: G06F12/0811 , G06F12/084
CPC分类号: G06F12/0811 , G06F12/084
摘要: A computing system performs shared cache allocation to allocate cache resources to groups of tasks. The computing system monitors the bandwidth at a memory hierarchy device that is at a next level to the cache in a memory hierarchy of the computing system. The computing system estimates a change in dynamic power from a corresponding change in the bandwidth before and after the cache resources are allocated. The allocation of the cache resources are adjusted according to an allocation policy that receives inputs including the estimated change in the dynamic power and a performance indication of task execution.
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公开(公告)号:US11935852B2
公开(公告)日:2024-03-19
申请号:US17580699
申请日:2022-01-21
申请人: MEDIATEK Inc.
发明人: Yan-Liang Ji
IPC分类号: H01L23/00
CPC分类号: H01L24/05 , H01L24/03 , H01L24/13 , H01L2224/0401 , H01L2224/05094 , H01L2224/13026
摘要: A semiconductor package includes a substrate, a first insulation layer, a conductive pad, a second insulation layer and a conductive trace. The first insulation layer is formed on the substrate and having a first through hole. The conductive pad is formed on the substrate through the first through hole. The second insulation layer has a first surface and a second through hole, wherein the second through hole extends to the conductive pad from the first surface. The conductive trace has a second surface and is connected to the conductive pad through the second through hole. The entire of the first surface is in the same level, and the entire of the second surface is in the same level.
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87.
公开(公告)号:US20240089157A1
公开(公告)日:2024-03-14
申请号:US18367435
申请日:2023-09-12
申请人: MediaTek Inc.
CPC分类号: H04L27/2602 , H04L1/0057 , H04L1/0071 , H04W84/12
摘要: Techniques pertaining to physical-layer (PHY) parameter designs enabling resource unit (RU) duplication and tone repetition for next-generation wireless local area networks (WLANs) are described. An apparatus (e.g., station (STA)) generates an RU or multi-RU (MRU). The apparatus then performs a wireless communication with the RU or MRU. In generating the RU or MRU, the apparatus codes a spatial stream using a binary convolutional coding (BCC) interleaver or a low-density parity-check (LDPC) tone mapper. In performing the wireless communication, the apparatus performs the wireless communication with RU duplication or tone repetition in a frequency domain.
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公开(公告)号:US20240088965A1
公开(公告)日:2024-03-14
申请号:US18242090
申请日:2023-09-05
申请人: MediaTek Inc.
CPC分类号: H04B7/0626 , G06N20/00 , H04B7/0617
摘要: Techniques pertaining to channeling state information (CSI) compression are described. A user equipment (UE) that is in wireless communication with a base station node acquires channel state information (CSI) at least associated with the wireless communication. The UE further compresses the CSI into CSI feedback for the base station node via an artificial intelligence (AI)/machine-learning (ML)-based encoder that implements at least one of convolutional projection, expandable kernels, or multi-head re-attention (MHRA).
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公开(公告)号:US20240088561A1
公开(公告)日:2024-03-14
申请号:US18457543
申请日:2023-08-29
申请人: MEDIATEK INC.
发明人: Yen-Ju LIN , Chung-Hsin CHIANG , Wun-Jian LIN , Shih-Huang YEH
摘要: An antenna structure is provided. The antenna structure includes a first metal layer and a second metal layer disposed over the first metal layer. The second metal layer forms a first antenna resonating element operating at a first band and has a first opening. The antenna structure also includes a third metal layer disposed over the second metal layer. The third metal layer forms a second antenna resonating element operating at a second band, which is different from the first band. The antenna structure further includes a first transmission line extending from the first metal layer to the second metal layer and a second transmission line extending from the first metal layer through the first opening to the third metal layer.
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公开(公告)号:US20240087207A1
公开(公告)日:2024-03-14
申请号:US17944415
申请日:2022-09-14
申请人: MediaTek Inc.
发明人: Po-Yu HUANG , Shih-Chin LIN , Jen-Jung CHENG , Tu-Hsiu LEE
CPC分类号: G06T15/005 , G06T1/20 , G06T7/50
摘要: Disclosed herein are system, method, and computer program product embodiments for reducing GPU load by programmatically controlling shading rates in computer graphics. GPU load may be reduced by applying different shading rates to different screen regions. By reading the depth buffer of previous frames and performing image processing, thresholds may be calculated that control the shading rates. The approach may be run on any platform that supports VRS hardware and primitive- or image-based VRS. The approach may be applied on a graphics driver installed on a client device, in a firmware layer between hardware and a driver, in a software layer between a driver and an application, or in hardware on the client device. The approach is flexible and adaptable and calculates and sets the variable rate shading based on the graphics generated by an application without requiring the application developer to manually set variable rate shading.
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