LDPC (low density parity check) coded signal decoding using parallel and simultaneous bit node and check node processing
    81.
    发明授权
    LDPC (low density parity check) coded signal decoding using parallel and simultaneous bit node and check node processing 有权
    LDPC(低密度奇偶校验)编码信号解码使用并行和同时的比特节点和校验节点处理

    公开(公告)号:US07958428B2

    公开(公告)日:2011-06-07

    申请号:US11846761

    申请日:2007-08-29

    IPC分类号: H03M13/00

    摘要: LDPC (Low Density Parity Check) coded signal decoding using parallel and simultaneous bit node and check node processing. This novel approach to decoding of LDPC coded signals may be described as being LDPC bit-check parallel decoding. In some alternative embodiment, the approach to decoding LDPC coded signals may be modified to LDPC symbol-check parallel decoding or LDPC hybrid-check parallel decoding. A novel approach is presented by which the edge messages with respect to the bit nodes and the edge messages with respect to the check nodes may be updated simultaneously and in parallel to one another. Appropriately constructed executing orders direct the sequence of simultaneous operation of updating the edge messages at both nodes types (e.g., edge and check). For various types of LDPC coded signals, including parallel-block LDPC coded signals, this approach can perform decoding processing in almost half of the time as provided by previous decoding approaches.

    摘要翻译: LDPC(低密度奇偶校验)编码信号解码使用并行和同时的比特节点和校验节点处理。 这种LDPC编码信号的解码方法可以被描述为LDPC比特检验并行解码。 在一些替代实施例中,解码LDPC编码信号的方法可以被修改为LDPC符号校验并行解码或LDPC混合校验并行解码。 提出了一种新颖的方法,通过该方法可以相对于校验节点相对于比特节点和边缘消息的边缘消息可以同时并且彼此并行地更新。 适当构造的执行命令指示在两种节点类型(例如,边缘和检查)上更新边缘消息的同时操作的顺序。 对于包括并行块LDPC编码信号的各种类型的LDPC编码信号,该方法可以在几乎一半的时间内执行由先前的解码方法提供的解码处理。

    Asymmetrical MIMO wireless communications
    82.
    发明授权
    Asymmetrical MIMO wireless communications 有权
    不对称MIMO无线通信

    公开(公告)号:US07746886B2

    公开(公告)日:2010-06-29

    申请号:US10979368

    申请日:2004-11-01

    IPC分类号: H04W76/00

    CPC分类号: H04B7/0613 H04B7/0413

    摘要: A method for asymmetrical MIMO wireless communication begins by determining a number of transmission antennas for the asymmetrical MIMO wireless communication. The method continues by determining a number of reception antennas for the asymmetrical MIMO wireless communication. The method continues by, when the number of transmission antennas exceeds the number of reception antennas, using spatial time block coding for the asymmetrical MIMO wireless communication. The method continues by, when the number of transmission antennas does not exceed the number of reception antennas, using spatial multiplexing for the asymmetrical MIMO wireless communication.

    摘要翻译: 一种用于非对称MIMO无线通信的方法是通过确定用于非对称MIMO无线通信的多个发送天线来开始的。 该方法通过确定用于非对称MIMO无线通信的接收天线的数量来继续。 当发送天线的数量超过接收天线的数量时,该方法继续使用用于非对称MIMO无线通信的空间时间块编码。 当发送天线的数量不超过接收天线的数量时,该方法继续使用用于非对称MIMO无线通信的空间复用。

    Iterative metric updating when decoding LDPC (low density parity check) coded signals and LDPC coded modulation signals
    83.
    发明授权
    Iterative metric updating when decoding LDPC (low density parity check) coded signals and LDPC coded modulation signals 有权
    解码LDPC(低密度奇偶校验)编码信号和LDPC编码调制信号时的迭代度量更新

    公开(公告)号:US07600180B2

    公开(公告)日:2009-10-06

    申请号:US11648958

    申请日:2007-01-03

    IPC分类号: G06F11/00

    摘要: Iterative metric updating when decoding LDPC (Low Density Parity Check) coded signals and LDPC coded modulation signals. A novel approach is presented for updating the bit metrics employed when performing iterative decoding of LDPC coded signals. This bit metric updating is also applicable to decoding of signals that have been generated using combined LDPC coding and modulation encoding to generate LDPC coded modulation signals. In addition, the bit metric updating is also extendible to decoding of LDPC variable code rate and/or variable modulation signals whose code rate and/or modulation may vary as frequently as on a symbol by symbol basis. By ensuring that the bit metrics are updated during the various iterations of the iterative decoding processing, a higher performance can be achieved than when the bit metrics remain as fixed values during the iterative decoding processing.

    摘要翻译: 解码LDPC(低密度奇偶校验)编码信号和LDPC编码调制信号时的迭代度量更新。 提出了一种新颖的方法来更新在执行LDPC编码信号的迭代解码时采用的比特量度。 该比特度量更新也适用于使用组合LDPC编码和调制编码生成的信号的解码,以生成LDPC编码调制信号。 此外,比特度量更新也可扩展到LDPC码可变码率和/或可变调制信号的解码,其码率和/或调制可以像逐个符号一样频繁地变化。 通过确保在迭代解码处理的各种迭代期间更新比特度量,可以比在迭代解码处理期间比特度量保持为固定值时更高的性能。

    Sub-matrix-based implementation of LDPC (Low Density Parity Check) decoder
    84.
    发明授权
    Sub-matrix-based implementation of LDPC (Low Density Parity Check) decoder 失效
    LDPC(低密度奇偶校验)解码器的基于子矩阵的实现

    公开(公告)号:US07530002B2

    公开(公告)日:2009-05-05

    申请号:US11360267

    申请日:2006-02-23

    IPC分类号: H03M13/00

    摘要: Sub-matrix-based implementation of LDPC (Low Density Parity Check) decoder. A novel approach is presented by which an LDPC coded signal is decoded by processing 1 sub-matrix at a time. A low density parity check matrix corresponding to the LDPC code includes rows and columns of sub-matrices. For example, when performing bit node processing, 1 or more sub-matrices in a column are processed; when performing check node processing, 1 or more sub-matrices in a row are processed. If desired, when performing bit node processing, the sub-matrices in each column are successively processed together (e.g., all column 1 sub-matrices, all column 2 sub-matrices, etc.). Analogously, when performing check node processing, the sub-matrices in each row can be successively processed together (e.g., all row 1 sub-matrices, all row 2 sub-matrices in row 2, etc.).

    摘要翻译: LDPC(低密度奇偶校验)解码器的基于子矩阵的实现。 提出了一种新颖的方法,通过该方法通过一次处理1个子矩阵对LDPC编码信号进行解码。 对应于LDPC码的低密度奇偶校验矩阵包括子矩阵的行和列。 例如,当执行位节点处理时,处理列中的一个或多个子矩阵; 当执行校验节点处理时,处理一行中的一个或多个子矩阵。 如果需要,当执行位节点处理时,每列中的子矩阵被连续处理(例如,所有列1个子矩阵,全部2个子矩阵等)。 类似地,当执行校验节点处理时,可以一起连续地处理每行中的子矩阵(例如,所有行1子矩阵,行2中的所有行2子矩阵等)。

    Decoding LDPC (low density parity check) code and graphs using multiplication (or addition in log-domain) on both sides of bipartite graph
    85.
    发明授权
    Decoding LDPC (low density parity check) code and graphs using multiplication (or addition in log-domain) on both sides of bipartite graph 有权
    使用二分图两边的乘法(或对数域加法)对LDPC(低密度奇偶校验)码和图进行解码

    公开(公告)号:US07464317B2

    公开(公告)日:2008-12-09

    申请号:US11807388

    申请日:2007-05-29

    IPC分类号: H03M13/00

    摘要: Decoding LDPC (Low Density Parity Check) code and graphs using multiplication (or addition in log-domain) on both sides of bipartite graph. Decoding of LDPC coded signals is presented whereby edge messages may be updated using only multiplication (or log domain addition). By appropriate modification of the various calculations that need to be performed when updating edge messages, the calculations may be reduced to only performing product of terms functions. When implementing such functionality in hardware within a communication device that is operable to decode LDPC coded signals, this reduction in processing complexity greatly eases the actual hardware's complexity as well. A significant savings in processing resources, memory, memory management concerns, and other performance driving parameters may be made.

    摘要翻译: 使用二分图两边的乘法(或对数域中的加法)解码LDPC(低密度奇偶校验)码和图。 呈现LDPC编码信号的解码,由此可以仅使用乘法(或对数域加法)来更新边缘消息。 通过适当修改在更新边缘消息时需要执行的各种计算,可以将计算减少到仅执行术语函数的乘积。 当在可操作来解码LDPC编码信号的通信设备中的硬件中实现这种功能时,处理复杂度的这种降低也极大地减轻了实际硬件的复杂性。 可以显着节省处理资源,存储器,存储器管理问题和其他性能驱动参数。

    Efficient design to implement min**/min**- or max**/max**- functions in LDPC (low density parity check) decoders
    86.
    发明授权
    Efficient design to implement min**/min**- or max**/max**- functions in LDPC (low density parity check) decoders 失效
    高效设计实现LDPC(低密度奇偶校验)解码器中的min ** / min ** - 或max ** / max ** - 函数

    公开(公告)号:US07447985B2

    公开(公告)日:2008-11-04

    申请号:US11172165

    申请日:2005-06-30

    IPC分类号: G06F11/00 H03M13/00

    摘要: Efficient design to implement min**/min**− or max**/max**− functions in LDPC (Low Density Parity Check) decoders. When compared to prior art approaches, the novel and efficient implementation presented herein allows for the use of substantially less hardware and surface area within an actual communication device implemented to perform these calculations. In certain embodiments, the min** processing (and/or max** processing) is implemented to assist in the computationally intensive calculations required to decoded LDPC coded signals. In one instance, this is operable to assist in check node processing when decoding LDPC coded signals. However, the efficient principles and architectures presented herein may be implemented within other communication device types to decode other types of coded signals as well. For example, the processing presented herein may perform calculations within a variety of decoders including LDPC decoders, turbo decoders, TTCM decoders, and/or other decoder types without departing from the scope and spirit of the invention.

    摘要翻译: 高效设计实现LDPC(低密度奇偶校验)解码器中的min ** / min ** - 或max ** / max ** - 函数。 当与现有技术方法相比时,本文提出的新颖且有效的实现允许在实现为执行这些计算的实际通信设备中使用实质上更少的硬件和表面积。 在某些实施例中,实现最小**处理(和/或最大**处理)以帮助解码LDPC编码信号所需的计算密集计算。 在一种情况下,这可用于在解码LDPC编码信号时辅助校验节点处理。 然而,本文呈现的有效原理和架构可以在其他通信设备类型内实现,以解码其他类型的编码信​​号。 例如,在不脱离本发明的范围和精神的情况下,这里呈现的处理可以在包括LDPC解码器,turbo解码器,TTCM解码器和/或其他解码器类型的各种解码器中执行计算。

    System correcting random and/or burst errors using RS (Reed-Solomon) code, turbo/LDPC (Low Density Parity Check) code and convolutional interleave
    87.
    发明授权
    System correcting random and/or burst errors using RS (Reed-Solomon) code, turbo/LDPC (Low Density Parity Check) code and convolutional interleave 有权
    使用RS(Reed-Solomon)码,turbo / LDPC(低密度奇偶校验)码和卷积交错的系统校正随机和/或突发错误

    公开(公告)号:US07447981B2

    公开(公告)日:2008-11-04

    申请号:US11292134

    申请日:2005-12-01

    IPC分类号: H03M13/00 G06F11/00

    摘要: System correcting random and/or burst errors using RS (Reed-Solomon) code, turbo/LDPC (Low Density Parity Check) code and convolutional interleave. A novel approach is presented that combines different coding types within a communication system to perform various types of error correction. This combination of accommodating different coding types may be employed at either end of a communication channel (e.g., at a transmitter end when performing encoding and/or at a receiver end when performing decoding). By combining different coding types within a communication system, the error correcting capabilities of the overall system is significantly improved. The appropriate combination of turbo code and/or LDPC code along with RS code allows for error correction or various error types including random error and burst error (or impulse noise).

    摘要翻译: 使用RS(Reed-Solomon)码,turbo / LDPC(低密度奇偶校验)码和卷积交织来校正随机和/或突发错误的系统。 提出了一种组合通信系统中的不同编码类型以执行各种类型的纠错的新方法。 可以在通信信道的任一端(例如,当执行编码时在发射机端和/或在执行解码时在接收机端)采用适应不同编码类型的组合。 通过在通信系统中组合不同的编码类型,整体系统的纠错能力得到显着改善。 turbo码和/或LDPC码以及RS码的适当组合允许纠错或包括随机误差和突发错误(或脉冲噪声)的各种错误类型。

    Parallel concatenated code with soft-in-soft-out interactive turbo decoder
    88.
    发明授权
    Parallel concatenated code with soft-in-soft-out interactive turbo decoder 失效
    软和软交互式turbo解码器的并行级联代码

    公开(公告)号:US07409006B2

    公开(公告)日:2008-08-05

    申请号:US11481365

    申请日:2006-07-05

    IPC分类号: H04L27/00

    摘要: A method for parallel concatenated (Turbo) encoding and decoding. Turbo encoders receive a sequence of input data tuples and encode them. The input sequence may correspond to a sequence of an original data source, or to an already coded data sequence such as provided by a Reed-Solomon encoder. A turbo encoder generally comprises two or more encoders separated by one or more interleavers. The input data tuples may be interleaved using a modulo scheme in which the interleaving is according to some method (such as block or random interleaving) with the added stipulation that the input tuples may be interleaved only to interleaved positions having the same modulo-N (where N is an integer) as they have in the input data sequence. If all the input tuples are encoded by all encoders then output tuples can be chosen sequentially from the encoders and no tuples will be missed. If the input tuples comprise multiple bits, the bits may be interleaved independently to interleaved positions having the same modulo-N and the same bit position. This may improve the robustness of the code. A first encoder may have no interleaver or all encoders may have interleavers, whether the input tuple bits are interleaved independently or not. Modulo type interleaving also allows decoding in parallel.

    摘要翻译: 一种并行级联(Turbo)编码和解码的方法。 Turbo编码器接收一系列输入数据元组并进行编码。 输入序列可以对应于原始数据源的序列,或者对应于已由Reed-Solomon编码器提供的已经编码的数据序列。 turbo编码器通常包括由一个或多个交织器分离的两个或更多个编码器。 输入数据元组可以使用其中交织根据某些方法(例如块或随机交织)的加法规则进行交织,其中输入元组可以只交织到具有相同模N的交织位置 其中N是整数),因为它们在输入数据序列中具有。 如果所有的输入元组都是由所有的编码器编码的,那么输出元组可以从编码器顺序选择,也不会丢失元组。 如果输入元组包含多个比特,那么这些比特可以与具有相同模N和相同比特位置的交织位置独立交织。 这可以提高代码的鲁棒性。 第一编码器可以不具有交织器,或者所有编码器可以具有交织器,无论输入元组位是否独立交错。 模式类型交织也允许并行解码。

    IPHD (iterative parallel hybrid decoding) of various MLC (multi-level code) signals
    90.
    发明授权
    IPHD (iterative parallel hybrid decoding) of various MLC (multi-level code) signals 失效
    各种MLC(多级代码)信号的IPHD(迭代并行混合解码)

    公开(公告)号:US07383487B2

    公开(公告)日:2008-06-03

    申请号:US11017157

    申请日:2004-12-20

    IPC分类号: H03M13/03 H03M13/00

    摘要: IPHD (Iterative Parallel Hybrid Decoding) of various MLC (Multi-Level Code) signals. Various embodiments are provided by which IPHD may be performed on MLC LDPC (Multi-Level Code Low Density Parity Check) coded modulation signals mapped using a plurality of mappings. This IPHD may also be performed on MLC LDPC coded modulation signals mapped using only a singe mapping as well. In addition, various embodiments are provided by which IPHD may be performed on ML TC (Multi-Level Turbo Code) signals. These principles of IPHD, shown with respect to various embodiments IPHD of MLC LDPC coded modulation signals as well as the IPHD of ML TC signals, may be extended to performing IPHD of other signal types as well. Generally speaking, based on the degree of the MLC signal, a corresponding number of parallel paths operate in cooperation to decode the various levels of the MLC signal.

    摘要翻译: 各种MLC(多级码)信号的IPHD(迭代并行混合解码)。 提供了各种实施例,通过该实施例可以对使用多个映射映射的MLC LDPC(多级码低密度奇偶校验)编码的调制信号执行IPHD。 也可以对仅使用单个映射映射的MLC LDPC编码调制信号执行该IPHD。 此外,提供了可以在ML TC(多级Turbo码)信号上执行IPHD的各种实施例。 关于各种实施方案所示的IPHD的这些原理,MLC LDPC编码调制信号以及ML TC信号的IPHD也可以扩展到执行其他信号类型的IPHD。 一般而言,基于MLC信号的程度,相应数量的并行路径协同工作来解码MLC信号的各种级别。