公开(公告)号：US20130314139A1

公开(公告)日：2013-11-28

申请号：US11649876

申请日：2007-01-04

申请人： Atsushi Umezaki

发明人： Atsushi Umezaki

IPC分类号： H03K3/356

CPC分类号： H01L27/124 ,  G02F1/13624 ,  G09G3/20 ,  G09G3/325 ,  G09G3/3258 ,  G09G3/3266 ,  G09G3/3674 ,  G09G3/3696 ,  G09G2300/0408 ,  G09G2300/0809 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2310/0297 ,  G09G2310/08 ,  G09G2330/021 ,  G11C19/28 ,  H01L27/1214 ,  H03K3/356 ,  H03K3/356104 ,  H03K19/00369

摘要： An object is to provide a semiconductor device which can suppress characteristic deterioration in each transistor without destabilizing operation. In a non-selection period, a transistor is turned on at regular intervals, so that a power supply potential is supplied to an output terminal of a shift register circuit. A power supply potential is supplied to the output terminal of the shift register circuit through the transistor. Since the transistor is not always on in a non-selection period, a shift of the threshold voltage of the transistor is suppressed. In addition, a power supply potential is supplied to the output terminal of the shift register circuit through the transistor at regular intervals. Therefore, the shift register circuit can suppress noise which is generated in the output terminal.

摘要翻译： 本发明的目的是提供一种能够抑制每个晶体管的特性劣化而不会发生不稳定操作的半导体器件。 在非选择期间，晶体管以规则的间隔导通，使得电源电位被提供给移位寄存器电路的输出端。 电源电位通过晶体管提供给移位寄存器电路的输出端。 由于在非选择期间晶体管不总是导通，所以抑制了晶体管的阈值电压的偏移。 此外，电源电位以规则的间隔通过晶体管提供给移位寄存器电路的输出端。 因此，移位寄存器电路可以抑制在输出端子中产生的噪声。

公开(公告)号：US08520159B2

公开(公告)日：2013-08-27

申请号：US13174895

申请日：2011-07-01

申请人： Atsushi Umezaki ,  Hiroyuki Miyake

发明人： Atsushi Umezaki ,  Hiroyuki Miyake

IPC分类号： G02F1/136 ,  G02F1/1343

CPC分类号： G02F1/1368 ,  G02F1/136286 ,  G09G3/20 ,  G09G3/2022 ,  G09G3/3233 ,  G09G3/3266 ,  G09G3/3275 ,  G09G3/342 ,  G09G3/3426 ,  G09G3/3677 ,  G09G3/3685 ,  G09G2300/043 ,  G09G2300/0852 ,  G09G2310/0248 ,  G09G2310/0262 ,  G09G2310/027 ,  G09G2310/0275 ,  G09G2310/0286 ,  G09G2310/0297 ,  G09G2320/0233 ,  G09G2320/043 ,  G09G2330/021 ,  G09G2340/02 ,  G09G2352/00 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1251 ,  H01L27/1255 ,  H01L27/156 ,  H01L27/3232 ,  H01L27/3276 ,  H01L29/42384 ,  H01L2924/0002 ,  H01L2924/00

摘要： An object of the invention is to provide a circuit technique which enables reduction in power consumption and high definition of a display device. A switch controlled by a start signal is provided to a gate electrode of a transistor, which is connected to a gate electrode of a bootstrap transistor. When the start signal is input, a potential is supplied to the gate electrode of the transistor through the switch, and the transistor is turned off. The transistor is turned off, so that leakage of a charge from the gate electrode of the bootstrap transistor can be prevented. Accordingly, time for storing a charge in the gate electrode of the bootstrap transistor can be shortened, and high-speed operation can be performed.

摘要翻译： 本发明的目的是提供一种能够降低显示装置的功耗和高清晰度的电路技术。 将由启动信号控制的开关提供给晶体管的栅电极，该晶体管连接到自举晶体管的栅电极。 当输入起始信号时，通过开关将电位提供给晶体管的栅电极，晶体管截止。 晶体管截止，从而可以防止电荷从自举晶体管的栅电极泄漏。 因此，可以缩短在自举晶体管的栅电极中存储电荷的时间，并且可以执行高速操作。

公开(公告)号：US08456396B2

公开(公告)日：2013-06-04

申请号：US12977556

申请日：2010-12-23

申请人： Atsushi Umezaki

发明人： Atsushi Umezaki

IPC分类号： G09G3/36

CPC分类号： G02F1/136286 ,  G02F1/13306 ,  G02F1/133753 ,  G02F1/13452 ,  G02F1/136213 ,  G02F1/1368 ,  G02F1/1393 ,  G02F2001/133622 ,  G02F2202/103 ,  G09G3/342 ,  G09G3/3655 ,  G09G3/3674 ,  G09G3/3677 ,  G09G3/3685 ,  G09G2300/0426 ,  G09G2300/0452 ,  G09G2310/024 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0252 ,  G09G2330/021 ,  G11C19/28 ,  H01L21/67167 ,  H01L27/06 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/15 ,  H01L27/156 ,  H01L27/3211 ,  H01L27/3213 ,  H01L27/3216 ,  H01L27/3248 ,  H01L27/3258 ,  H01L27/3262 ,  H01L27/3265 ,  H01L27/3276 ,  H01L29/247 ,  H01L29/78693 ,  H01L51/5246 ,  H01L51/56 ,  H01L2251/5307 ,  H01L2251/5315 ,  H01L2251/5323

摘要： A first transistor, a second transistor, a third transistor, a fourth transistor are provided. In the first transistor, a first terminal is electrically connected to a first wiring; a second terminal is electrically connected to a gate terminal of the second transistor; a gate terminal is electrically connected to a fifth wiring. In the second transistor, a first terminal is electrically connected to a third wiring; a second terminal is electrically connected to a sixth wiring. In the third transistor, a first terminal is electrically connected to a second wiring; a second terminal is electrically connected to the gate terminal of the second transistor; a gate terminal is electrically connected to a fourth wiring. In the fourth transistor, a first terminal is electrically connected to the second wiring; a second terminal is electrically connected to the sixth wiring; a gate terminal is connected to the fourth wiring.

公开(公告)号：US20130082760A1

公开(公告)日：2013-04-04

申请号：US13606440

申请日：2012-09-07

申请人： Atsushi Umezaki

发明人： Atsushi Umezaki

IPC分类号： H03K17/687

CPC分类号： H01L27/1255 ,  G09G3/14 ,  G09G3/32 ,  G09G3/36 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2330/021 ,  G11C19/00 ,  H01L29/7869 ,  H03B1/00 ,  H03K3/00 ,  H03K17/6871

摘要： Provided is a semiconductor device exemplified by an inverter circuit and a shift register circuit, which is characterized by a reduced number of transistors. The semiconductor device includes a first transistor, a second transistor, and a capacitor.One of a source and a drain of the first transistor is electrically connected to a first wiring, and the other thereof is electrically connected to a second wiring. One of a source and a drain of the second transistor is electrically connected to the first wiring, a gate of the second transistor is electrically connected to a gate of the first transistor, and the other of the source and the drain of the second transistor is electrically connected to one electrode of the capacitor, while the other electrode of the capacitor is electrically connected to a third wiring. The first and second transistors have the same conductivity type.

公开(公告)号：US08164555B2

公开(公告)日：2012-04-24

申请号：US12051992

申请日：2008-03-20

申请人： Hiroyuki Miyake ,  Atsushi Umezaki

发明人： Hiroyuki Miyake ,  Atsushi Umezaki

IPC分类号： G09G3/36 ,  G09G3/30

CPC分类号： G09G3/3677 ,  G09G2300/0417 ,  G09G2310/0267 ,  G09G2320/043 ,  G09G2320/048

摘要： To provide a display device which can ensure high reliability of a driver circuit even when a threshold voltage of a TFT shifts. The display device includes a power supply control circuit which can apply a forward bias voltage or a reverse bias voltage to a gate of a transistor included in an output circuit, a monitor transistor which is formed to monitor the amount of change of a threshold voltage of the transistor included in the output circuit, and a threshold control circuit which controls the power supply control circuit so as to apply the reverse bias voltage to the gate of the transistor in order to compensate the threshold voltage of the transistor included in the output circuit.

摘要翻译： 提供即使当TFT的阈值电压移动时也能够确保驱动电路的高可靠性的显示装置。 显示装置包括电源控制电路，其可以向包括在输出电路中的晶体管的栅极施加正向偏置电压或反向偏置电压，监视晶体管形成为监视阈值电压的变化量 包括在输出电路中的晶体管，以及阈值控制电路，其控制电源控制电路以将反向偏置电压施加到晶体管的栅极，以便补偿包括在输出电路中的晶体管的阈值电压。

公开(公告)号：US20120056860A1

公开(公告)日：2012-03-08

申请号：US13289100

申请日：2011-11-04

申请人： Atsushi Umezaki ,  Hiroyuki Miyake

发明人： Atsushi Umezaki ,  Hiroyuki Miyake

IPC分类号： G09G5/00 ,  G09G3/20

CPC分类号： H01L27/124 ,  G09G3/2092 ,  G09G3/3266 ,  G09G3/3674 ,  G09G3/3677 ,  G09G2300/0809 ,  G09G2310/0205 ,  G09G2310/0248 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2310/0291 ,  G09G2310/061 ,  G09G2320/0646 ,  G09G2320/0666 ,  G11C19/28 ,  H01L27/0207 ,  H01L27/1222 ,  H01L27/1225

摘要： To suppress fluctuation in the threshold voltage of a transistor, to reduce the number of connections of a display panel and a driver IC, to achieve reduction in power consumption of a display device, and to achieve increase in size and high definition of the display device. A gate electrode of a transistor which easily deteriorates is connected to a wiring to which a high potential is supplied through a first switching transistor and a wiring to which a low potential is supplied through a second switching transistor; a clock signal is input to a gate electrode of the first switching transistor; and an inverted clock signal is input to a gate electrode of the second switching transistor. Thus, the high potential and the low potential are alternately applied to the gate electrode of the transistor which easily deteriorates.

摘要翻译： 为了抑制晶体管的阈值电压的波动，为了减少显示面板和驱动器IC的连接数量，为了实现显示装置的功耗的降低，并且实现显示装置的尺寸和高清晰度的增加 。 容易恶化的晶体管的栅电极通过第一开关晶体管和通过第二开关晶体管供给低电位的布线而连接到提供高电位的布线; 时钟信号被输入到第一开关晶体管的栅电极; 并且反相时钟信号被输入到第二开关晶体管的栅电极。 因此，高电位和低电位交替施加到容易劣化的晶体管的栅电极。

公开(公告)号：US20110175862A1

公开(公告)日：2011-07-21

申请号：US13006668

申请日：2011-01-14

申请人： Atsushi Umezaki ,  Ryo Arasawa

发明人： Atsushi Umezaki ,  Ryo Arasawa

IPC分类号： G09G5/00

CPC分类号： G09G3/3233 ,  G09G2300/0861

摘要： Each of a plurality of pixels includes a transistor, a capacitor, and a display element. One terminal of the capacitor is electrically connected to a first line. The other terminal of the capacitor is electrically connected to a gate of the transistor. In a first period, a first terminal of the transistor is electrically connected to the gate of the transistor and the gate of the transistor is electrically connected to a second line. In a second period, the first terminal of the transistor is electrically connected to the gate of the transistor and a second terminal of the transistor is electrically connected to a third line. In a third period, the first terminal of the transistor is electrically connected to the first line and the second terminal of the transistor is electrically connected to the display element.

摘要翻译： 多个像素中的每一个包括晶体管，电容器和显示元件。 电容器的一个端子电连接到第一线。 电容器的另一个端子电连接到晶体管的栅极。 在第一时段中，晶体管的第一端电连接到晶体管的栅极，并且晶体管的栅极电连接到第二线。 在第二时段中，晶体管的第一端电连接到晶体管的栅极，晶体管的第二端电连接到第三线。 在第三时段中，晶体管的第一端电连接到第一线，并且晶体管的第二端电连接到显示元件。

公开(公告)号：US07978274B2

公开(公告)日：2011-07-12

申请号：US11853215

申请日：2007-09-11

申请人： Atsushi Umezaki ,  Hiroyuki Miyake

发明人： Atsushi Umezaki ,  Hiroyuki Miyake

IPC分类号： G02F1/136 ,  G02F1/1343

CPC分类号： G02F1/1368 ,  G02F1/136286 ,  G09G3/20 ,  G09G3/2022 ,  G09G3/3233 ,  G09G3/3266 ,  G09G3/3275 ,  G09G3/342 ,  G09G3/3426 ,  G09G3/3677 ,  G09G3/3685 ,  G09G2300/043 ,  G09G2300/0852 ,  G09G2310/0248 ,  G09G2310/0262 ,  G09G2310/027 ,  G09G2310/0275 ,  G09G2310/0286 ,  G09G2310/0297 ,  G09G2320/0233 ,  G09G2320/043 ,  G09G2330/021 ,  G09G2340/02 ,  G09G2352/00 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1251 ,  H01L27/1255 ,  H01L27/156 ,  H01L27/3232 ,  H01L27/3276 ,  H01L29/42384 ,  H01L2924/0002 ,  H01L2924/00

摘要： An object of the invention is to provide a circuit technique which enables reduction in power consumption and high definition of a display device. A switch controlled by a start signal is provided to a gate electrode of a transistor, which is connected to a gate electrode of a bootstrap transistor. When the start signal is input, a potential is supplied to the gate electrode of the transistor through the switch, and the transistor is turned off. The transistor is turned off, so that leakage of a charge from the gate electrode of the bootstrap transistor can be prevented. Accordingly, time for storing a charge in the gate electrode of the bootstrap transistor can be shortened, and high-speed operation can be performed.

摘要翻译： 本发明的目的是提供一种能够降低显示装置的功耗和高清晰度的电路技术。 将由启动信号控制的开关提供给晶体管的栅电极，该晶体管连接到自举晶体管的栅电极。 当输入起始信号时，通过开关将电位提供给晶体管的栅电极，晶体管截止。 晶体管截止，从而可以防止电荷从自举晶体管的栅电极泄漏。 因此，可以缩短在自举晶体管的栅电极中存储电荷的时间，并且可以执行高速操作。

公开(公告)号：US07964876B2

公开(公告)日：2011-06-21

申请号：US12694514

申请日：2010-01-27

申请人： Atsushi Umezaki

发明人： Atsushi Umezaki

IPC分类号： G09G3/36

CPC分类号： H01L27/124 ,  G02F1/133345 ,  G02F1/134309 ,  G02F1/13454 ,  G02F1/13624 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2202/103 ,  G09G3/3266 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0417 ,  G09G2300/0426 ,  G09G2320/043 ,  G09G2330/021 ,  G09G2330/023 ,  G11C19/28 ,  H01L27/105 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1222 ,  H01L27/1251 ,  H01L27/1255 ,  H01L27/13 ,  H01L27/3262 ,  H01L27/3276 ,  H01L29/42384 ,  H01L29/78663 ,  H01L29/78678 ,  H01L29/78696

摘要： By applying an AC pulse to a gate of a transistor which easily deteriorates, a shift in threshold voltage of the transistor is suppressed. However, in a case where amorphous silicon is used for a semiconductor layer of a transistor, the occurrence of a shift in threshold voltage naturally becomes a problem for a transistor which constitutes a part of circuit that generates an AC pulse. A shift in threshold voltage of a transistor which easily deteriorates and a shift in threshold voltage of a turned-on transistor are suppressed by signal input to a gate electrode of the transistor which easily deteriorates through the turned-on transistor. In other words, a structure for applying an AC pulse to a gate electrode of a transistor which easily deteriorates through a transistor to a gate electrode of which a high potential (VDD) is applied, is included.

摘要翻译： 通过将AC脉冲施加到容易劣化的晶体管的栅极，抑制了晶体管的阈值电压偏移。 然而，在非晶硅用于晶体管的半导体层的情况下，阈值电压偏移的发生自然成为构成产生AC脉冲的电路的一部分的晶体管的问题。 容易劣化的晶体管的阈值电压偏移和导通晶体管的阈值电压偏移被信号输入到通过导通晶体管容易劣化的晶体管的栅电极而被抑制。 换句话说，包括将AC脉冲施加到通过晶体管容易劣化到施加了高电位（VDD）的栅电极的晶体管的栅电极的结构。

公开(公告)号：US07830340B2

公开(公告)日：2010-11-09

申请号：US11287472

申请日：2005-11-28

申请人： Atsushi Umezaki

发明人： Atsushi Umezaki

IPC分类号： G09G3/30

CPC分类号： G09G3/3258 ,  G09G3/3291 ,  G09G2300/0842 ,  G09G2300/0852 ,  G09G2300/0876 ,  G09G2310/0251 ,  G09G2320/043 ,  G09G2330/021

摘要： It is an object to provide a display device having a simple structure of a driver circuit for inputting a video signal to a pixel, high display quality of the intermediate gradation and low power consumption, and a driving method thereof.Each of a plurality of pixels has a light emitting element and a capacitor. One electrode of the light emitting element is connected to the other electrode of the capacitor and one electrode of the light emitting element is applied to a voltage which is equal to or higher than a threshold voltage of the light emitting element and a potential of one electrode of the capacitor is changed. Therefore, a potential of one electrode of the light emitting element is changed and the light emitting element emits light.

摘要翻译： 本发明的目的是提供一种显示装置，其具有用于向像素输入视频信号的驱动电路的简单结构，中间灰度的高显示质量和低功耗，以及其驱动方法。 多个像素中的每一个具有发光元件和电容器。 发光元件的一个电极连接到电容器的另一个电极，并且发光元件的一个电极被施加到等于或高于发光元件的阈值电压的电压和一个电极的电位 的电容变化。 因此，发光元件的一个电极的电位改变，并且发光元件发光。