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公开(公告)号:US07217654B2
公开(公告)日:2007-05-15
申请号:US10969429
申请日:2004-10-21
IPC分类号: H01L21/4763
CPC分类号: H01L21/02063 , H01L21/31116 , H01L21/31138 , H01L21/76807 , H01L21/76808 , H01L21/76811 , H01L21/76825 , H01L21/76828 , H01L21/76831
摘要: A method of manufacturing a semiconductor device having a damascene structure contains a process of forming a first interlayer insulating film (6) and a second interlayer insulating film (4) formed of a low dielectric-constant film on a substrate, forming via holes (9) by using a first resist pattern (1a) formed on the second interlayer insulating film, conducting an organic peeling treatment using organic peeling liquid containing amine components and then forming a second resist pattern (1b) on the second interlayer insulating film. After the wet treatment, before a second antireflection coating (2b) is coated so as to be located below the second resist pattern is coated, at least one of an annealing treatment, a plasma treatment, a UV treatment and an organic solvent treatment is carried out to remove amine components which inhibit the catalysis reaction of acid occurring in the resist at the light exposure, thereby preventing degradation of the resolution of the second resist pattern (1b).
摘要翻译: 一种制造具有镶嵌结构的半导体器件的方法包括在衬底上形成第一层间绝缘膜(6)和由低介电常数膜形成的第二层间绝缘膜(4)的工艺,形成通孔(9 )通过使用形成在第二层间绝缘膜上的第一抗蚀剂图案(1a),使用含有胺成分的有机剥离液进行有机剥离处理,然后在第二层间绝缘膜上形成第二抗蚀剂图案(1b)。 在湿处理之后,涂覆第二抗反射涂层(2b)以便位于第二抗蚀图案下方的涂层,退火处理,等离子体处理,UV处理和有机溶剂处理中的至少一个是 进行以除去抑制在曝光时在抗蚀剂中发生的酸的催化反应的胺成分,从而防止第二抗蚀剂图案(1b)的分辨率的劣化。
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公开(公告)号:US20070096331A1
公开(公告)日:2007-05-03
申请号:US11640349
申请日:2006-12-18
IPC分类号: H01L23/48
CPC分类号: H01L21/02063 , H01L21/31116 , H01L21/31138 , H01L21/76807 , H01L21/76808 , H01L21/76811 , H01L21/76825 , H01L21/76828 , H01L21/76831
摘要: A method of manufacturing a semiconductor device having a damascene structure contains a process of forming a first interlayer insulating film and a second interlayer insulating film formed of a low dielectric constant film on a substrate, forming via holes by using a first resist pattern formed on the second interlayer insulating film, conducting an organic peeling treatment using organic peeling liquid containing amine components and then forming a second resist pattern on the second interlayer insulating film. After the wet treatment before a second antireflection coating is coated so as to be located below the second resist pattern is coated, at least one of an annealing treatment, a plasma treatment, a UV treatment and an organic solvent treatment is carried out to remove amine components which inhibit the catalysis reaction of acid occurring in the resist at the light exposure, thereby preventing degradation of the resolution of the second resist pattern.
摘要翻译: 一种制造具有镶嵌结构的半导体器件的方法包括在基板上形成第一层间绝缘膜和由低介电常数膜形成的第二层间绝缘膜的工艺,通过使用形成在第一层上绝缘膜上的第一抗蚀剂图案形成通孔 第二层间绝缘膜,使用含有胺成分的有机剥离液进行有机剥离处理,然后在第二层间绝缘膜上形成第二抗蚀剂图案。 在第二抗反射涂层涂布第二抗蚀剂图案之下的湿处理之后,涂覆第二抗蚀图案,进行退火处理,等离子体处理,UV处理和有机溶剂处理中的至少一种以除去胺 抑制在曝光时在抗蚀剂中发生的酸的催化反应的成分,从而防止第二抗蚀剂图案的分辨率的劣化。
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公开(公告)号:US20070032070A1
公开(公告)日:2007-02-08
申请号:US11542212
申请日:2006-10-04
申请人: Tatsuya Usami , Noboru Morita , Koichi Ohto
发明人: Tatsuya Usami , Noboru Morita , Koichi Ohto
IPC分类号: H01L21/4763
CPC分类号: H01L21/76834 , H01L21/76804 , H01L21/76826 , H01L21/76831 , H01L21/76843 , H01L23/5226 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要: A technology for inhibiting the dielectric breakdown occurred in a semiconductor device is provided. A semiconductor device includes a semiconductor substrate (not shown), an interlayer insulating film 102 formed on the semiconductor substrate and a multiple-layered insulating film 140 provided on the interlayer insulating film 102. The semiconductor device also includes an electric conductor that extends through the multiple-layered insulating film 140 and includes a Cu film 120 and a barrier metal film 118. The barrier metal film 118 is covers side surfaces and a bottom surface of the Cu film 120. An insulating film 116 is disposed between the multiple-layered insulating film 140 and the electric conductor (i.e., Cu film 120 and barrier metal film 118).
摘要翻译: 提供了一种用于抑制在半导体器件中发生的绝缘击穿的技术。 半导体器件包括半导体衬底(未示出),形成在半导体衬底上的层间绝缘膜102和设置在层间绝缘膜102上的多层绝缘膜140.半导体器件还包括延伸穿过 多层绝缘膜140,并且包括Cu膜120和阻挡金属膜118.阻挡金属膜118覆盖Cu膜120的侧表面和底表面。绝缘膜116设置在多层绝缘体 膜140和导电体(即Cu膜120和阻挡金属膜118)。
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公开(公告)号:US20070013069A1
公开(公告)日:2007-01-18
申请号:US10558367
申请日:2004-05-28
申请人: Munehiro Tada , Yoshihiro Hayashi , Yoshimichi Harada , Fuminori Ito , Hiroto Ohtake , Tatsuya Usami
发明人: Munehiro Tada , Yoshihiro Hayashi , Yoshimichi Harada , Fuminori Ito , Hiroto Ohtake , Tatsuya Usami
CPC分类号: H01L23/53295 , H01L21/76802 , H01L21/76807 , H01L21/76831 , H01L21/76832 , H01L21/76835 , H01L23/53238 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要: A multilayer wiring structure for connecting a semiconductor device is disclosed which is obtained by forming metal wirings on a substrate in which the semiconductor device is formed. The wiring structure free from such conventional problems that insulation between wirings next to each other is damaged or insulation resistance between wirings next to each other is deteriorated by generation of leakage current when fine metal wirings are formed in a porous insulating film. A method for producing such a wiring structure is also disclosed. In the metal wiring structure on the substrate in which the semiconductor device is formed, a insulating barrier layer (413) containing an organic matter is formed between an interlayer insulating film and a metal wiring. This insulating barrier layer reduces leakage current between wirings next to each other, thereby improving insulation reliability.
摘要翻译: 公开了一种用于连接半导体器件的多层布线结构,其通过在其中形成半导体器件的基板上形成金属布线而获得。 布线结构没有这样的常规问题,即在多孔绝缘膜中形成细金属布线时,通过产生漏电流而使彼此相邻的布线之间的绝缘损坏或彼此相邻的布线之间的绝缘电阻恶化。 还公开了一种用于制造这种布线结构的方法。 在形成了半导体器件的基板上的金属布线结构中,在层间绝缘膜和金属布线之间形成含有有机物质的绝缘阻挡层(413)。 该绝缘阻挡层减少彼此相邻的布线之间的漏电流,从而提高绝缘可靠性。
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公开(公告)号:US20060255466A1
公开(公告)日:2006-11-16
申请号:US11477011
申请日:2006-06-28
申请人: Sadayuki Ohnishi , Kouichi Ohto , Tatsuya Usami , Noboru Morita , Kouji Arita , Ryouhei Kitao , Youichi Sasaki
发明人: Sadayuki Ohnishi , Kouichi Ohto , Tatsuya Usami , Noboru Morita , Kouji Arita , Ryouhei Kitao , Youichi Sasaki
IPC分类号: H01L23/52
CPC分类号: H01L21/02126 , C23C16/401 , H01L21/02137 , H01L21/02211 , H01L21/02274 , H01L21/02282 , H01L21/02304 , H01L21/02362 , H01L21/3122 , H01L21/31633 , H01L21/76801 , H01L2924/0002 , H01L2924/00
摘要: An insulating film used for an interlayer insulating film of a semiconductor device and having a low dielectric constant. The insulating film comprises a carbon containing silicon oxide (SiOCH) film which has Si—CH2 bond therein. The proportion of Si—CH2 bond (1360 cm−1) to Si—CH3 bond (1270 cm−1) in the insulating film is preferably in a range from 0.03 to 0.05 measured as a peak height ratio of FTIR spectrum. The insulating film according to the present invention has higher ashing tolerance and improved adhesion to SiO2 film, when compared with the conventional SiOCH film which only has CH3 group.
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公开(公告)号:US07132732B2
公开(公告)日:2006-11-07
申请号:US10767786
申请日:2004-01-29
申请人: Koichi Ohto , Tatsuya Usami , Noboru Morita , Sadayuki Ohnishi , Koji Arita , Ryohei Kitao , Yoichi Sasaki
发明人: Koichi Ohto , Tatsuya Usami , Noboru Morita , Sadayuki Ohnishi , Koji Arita , Ryohei Kitao , Yoichi Sasaki
CPC分类号: H01L23/53228 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor device has a semiconductor substrate, and a multi-layered wiring arrangement provided thereon. The multi-layered wring arrangement includes at least one insulating layer structure having a metal wiring pattern formed therein. The insulating layer structure includes a first SiOCH layer, a second SiOCH layer formed on the first SiOCH layer, and a silicon dioxide (SiO2) layer formed on the second SiOCH layer. The second SiOCH layer features a carbon (C) density lower than that of the first SiOCH layer, a hydrogen (H) density lower than that of the first SiOCH layer, and an oxygen (O) density higher than that of the first SiOCH layer.
摘要翻译: 半导体器件具有半导体衬底和设置在其上的多层布线装置。 多层绞合装置包括其中形成有金属布线图案的至少一个绝缘层结构。 绝缘层结构包括第一SiOCH层,形成在第一SiOCH层上的第二SiOCH层和形成在第二SiOCH层上的二氧化硅(SiO 2)层。 第二SiOCH层的碳(C)密度低于第一SiOCH层的碳(C)密度,氢(H)密度低于第一SiOCH层的密度,氧(O)密度高于第一SiOCH层 。
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公开(公告)号:US20060216946A1
公开(公告)日:2006-09-28
申请号:US11156735
申请日:2005-06-21
IPC分类号: H01L21/473
CPC分类号: H01L21/31144 , H01L21/02164 , H01L21/02271 , H01L21/02274 , H01L21/31612
摘要: An intermediate film 222 in a three-layered resist film 225 is formed by the chemical vapor deposition process at a temperature not higher than 300° C., using Si(OR1)(OR2)(OR3)(OR4) , where each of R1, R2, R3 and R4 independently represents a carbon-containing group or a hydrogen atom, excluding the case where all of R1 to R4 are hydrogen atoms.
摘要翻译: 在三层抗蚀剂膜225中的中间膜222通过化学气相沉积工艺在不高于300℃的温度下,使用Si(OR 2)(OR 2) (OR 3)(OR 4),其中R 1,R 2,R 2, R 3和R 4独立地代表含碳基团或氢原子,不包括所有R 1至R“ SUB> 4 SUB>是氢原子。
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公开(公告)号:US20060211235A1
公开(公告)日:2006-09-21
申请号:US11362110
申请日:2006-02-27
申请人: Tatsuya Usami
发明人: Tatsuya Usami
IPC分类号: H01L21/4763
CPC分类号: H01L21/7682 , H01L21/76825 , H01L21/76829 , H01L21/76852 , H01L21/76885 , H01L21/76889 , H01L23/5222 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要: An object of this invention is to effectively reduce a connection resistance between a plug and an interconnect, and a dielectric constant of an insulating film. A semiconductor device 100 has a semiconductor substrate (not shown); a first interconnect 108 made of a copper-containing metal which is formed over the semiconductor substrate; a conductive first plug 114 formed over the first interconnect 108 and connected to the first interconnect 108; a Cu silicide layer 111 over the first interconnect 108 in an area other than the area where the first plug 114 is formed; a Cu silicide layer 117 over the first plug 114; and a first porous MSQ film 105 formed over an area from the side surface of the first interconnect 108 to the side surface of the first plug 114 and covering the side surface of the first interconnect 108, the upper portion of the first interconnect 108 and the side surface of the first plug 114.
摘要翻译: 本发明的目的是有效地降低插头和互连件之间的连接电阻以及绝缘膜的介电常数。 半导体器件100具有半导体衬底(未示出); 由半导体衬底上形成的含铜金属制成的第一互连件108; 形成在第一互连108上并连接到第一互连108的导电第一插头114; 在除了形成第一插塞114的区域之外的区域上的第一互连108上的Cu硅化物层111; 第一插头114上的Cu硅化物层117; 以及第一多孔MSQ膜105,其形成在从第一互连108的侧表面到第一插塞114的侧表面的区域上并且覆盖第一互连108的侧表面,第一互连108的上部和 第一插头114的侧表面。
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公开(公告)号:US20060166488A1
公开(公告)日:2006-07-27
申请号:US11386234
申请日:2006-03-22
申请人: Tatsuya Usami , Noboru Morita
发明人: Tatsuya Usami , Noboru Morita
IPC分类号: H01L21/4763
CPC分类号: H01L21/76829 , H01L21/3148 , H01L21/76802 , H01L21/76828 , H01L21/76832 , H01L23/5222 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要: An object of the present invention is to improve the inter-layer adhesiveness of the diffusion barrier film while maintaining the lower dielectric constant of the diffusion barrier film. A diffusion barrier film for a copper interconnect comprises an insulating material containing silicon, carbon, hydrogen and nitrogen as constituent elements, and also containing Si—H bond, Si—C bond and methylene bond (—CH2—). The insulating material involves I2/I1 of not lower than 0.067 and I3/I1 of not higher than 0.0067 appeared in an infrared absorption spectrum; where I1 is defined as an absorption area of the infrared absorption band having a peak near 810 cm−1, I2 is defined as an absorption area of the infrared absorption band having a peak near 2,120 cm−1 and I3 is defined as an absorption area of the infrared absorption band having a peak near 1,250 cm−1.
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公开(公告)号:US07045895B2
公开(公告)日:2006-05-16
申请号:US10763847
申请日:2004-01-23
申请人: Tatsuya Usami , Noboru Morita
发明人: Tatsuya Usami , Noboru Morita
IPC分类号: H01L23/52
CPC分类号: H01L21/76829 , H01L21/3148 , H01L21/76802 , H01L21/76828 , H01L21/76832 , H01L23/5222 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要: An object of the present invention is to improve the inter-layer adhesiveness of the diffusion barrier film while maintaining the lower dielectric constant of the diffusion barrier film. A diffusion barrier film for a copper interconnect comprises an insulating material containing silicon, carbon, hydrogen and nitrogen as constituent elements, and also containing Si—H bond, Si—C bond and methylene bond (—CH2—). The insulating material involves I2/I1 of not lower than 0.067 and I3/I1 of not higher than 0.0067 appeared in an infrared absorption spectrum; where I1 is defined as an absorption area of the infrared absorption band having a peak near 810 cm−1, I2 is defined as an absorption area of the infrared absorption band having a peak near 2,120 cm−1 and I3 is defined as an absorption area of the infrared absorption band having a peak near 1,250 cm−1.
摘要翻译: 本发明的目的是提高扩散阻挡膜的层间粘附性,同时保持扩散阻挡膜的较低介电常数。 用于铜互连的扩散阻挡膜包括含有硅,碳,氢和氮作为构成元素的绝缘材料,并且还含有Si-H键,Si-C键和亚甲基键(-CH 2 O 2) - )。 绝缘材料涉及不低于0.067和1/3的不低于0.067和1/3的1/2/1 / 高于0.0067出现红外吸收光谱; 其中I 1> 1被定义为具有在810cm -1附近的峰值的红外吸收带的吸收区域,I 2 2定义为 在2,120cm -1和1 3 3附近具有峰值的红外吸收带的吸收面积被定义为具有接近1250cm -1的峰的红外吸收带的吸收面积, SUP> -1 SUP>。
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