公开(公告)号：US20110047125A1

公开(公告)日：2011-02-24

申请号：US12916003

申请日：2010-10-29

申请人： Yasuhide Matsumoto ,  Yuji Wada

发明人： Yasuhide Matsumoto ,  Yuji Wada

IPC分类号： G06F17/30

CPC分类号： H04L41/0893 ,  H04L41/5003

摘要： A configuration item management method includes receiving, from a logical-physical configuration database that manages a correspondence relationship between a logical configuration item database that manages a configuration item including an operation policy of an operation target device for each user and a physical configuration item database that is a physical implementation of the logical configuration item database, an input of a relevant operation policy of a user who changes the operation policy, generating a change policy by which the operation policy of the user received at the receiving is changed, and evaluating an influence that is given to an operation policy of another user by the change policy of the user generated at the generating, to determine whether to execute the change policy and to output the influence to the operation policy of the other user.

摘要翻译： 一种配置项目管理方法，包括从管理管理包含每个用户的操作对象设备的操作策略的配置项的逻辑配置项数据库与物理配置项数据库之间的对应关系的逻辑物理配置数据库， 是逻辑配置项数据库的物理实现，改变操作策略的用户的相关操作策略的输入，生成用户在接收时接收的操作策略被改变的改变策略，并且评估影响 通过在生成时生成的用户的变更策略来赋予另一用户的操作策略，确定是否执行变更策略，并将影响输出到其他用户的操作策略。

公开(公告)号：US08984337B2

公开(公告)日：2015-03-17

申请号：US12977583

申请日：2010-12-23

申请人： Masataka Sonoda ,  Yuji Wada

发明人： Masataka Sonoda ,  Yuji Wada

IPC分类号： G06F11/00 ,  G06F11/07

CPC分类号： G06F11/0709 ,  G06F11/079 ,  H04L41/065

摘要： An apparatus for selecting a candidate for a failure component causing errors from a plurality of components included in a network system, the apparatus includes a processor for executing a procedure. The procedure includes determining a relation class of a relation among the plurality of components on the basis of configuration information of the network system, each of the relations being classified into one of the relation classes in accordance with a direction of an error propagation, determining an investigation range for each component having an error on the basis of investigation information including an error type of an error occurred in the each component and an investigation direction corresponding to the relation class, the investigation range being a set of the components to be investigated, and selecting a component on the basis of an appearance frequency of each component in the investigation ranges as the candidate.

摘要翻译： 一种用于从包括在网络系统中的多个组件导出错误的故障组件的候选者的选择装置，该装置包括用于执行过程的处理器。 该过程包括基于网络系统的配置信息来确定多个组件之间的关系的关系类别，每个关系根据错误传播的方向被分类为关系类别之一，确定 基于包括每个组件中发生的错误的错误类型的调查信息和与关系类别相对应的调查方向的每个组件具有错误的调查范围，调查范围是要被调查的组件的集合，以及 根据调查范围内的各个部件的出现频率来选择部件作为候补。

公开(公告)号：US20130008286A1

公开(公告)日：2013-01-10

申请号：US13634881

申请日：2011-03-17

申请人： Katsuhiro Yamada ,  Shuji Inoue ,  Hiderou Nomoto ,  Tomohisa Yamauchi ,  Yuji Wada ,  Yasunori Tsukahara

发明人： Katsuhiro Yamada ,  Shuji Inoue ,  Hiderou Nomoto ,  Tomohisa Yamauchi ,  Yuji Wada ,  Yasunori Tsukahara

IPC分类号： B22F9/18 ,  B82Y40/00

CPC分类号： B22F9/24 ,  B22F9/305 ,  B22F2301/15 ,  B22F2303/01 ,  B82Y40/00 ,  Y10S977/896 ,  B22F2998/00 ,  B22F1/0018 ,  B22F2999/00 ,  B22F2202/11

摘要： A method for producing nickel nanoparticles is described, including a first step of heating a mixture of a nickel carboxylate with 1-12 carbon atoms in its moiety excluding —COOH and a primary amine to obtain a complexed reaction solution with a nickel complex foiiiied therein, and a second step of heating the complexed reaction solution by a microwave to obtain a Ni-nanoparticle slurry. In the first step, the heating is preferably conducted at a temperature of 105-175° C. for 15 minutes or longer. In the second step, the heating is preferably conducted at a temperature of 180° C. or higher.

摘要翻译： 描述了一种制备镍纳米颗粒的方法，其包括第一步骤，在除了-COOH之外的部分中加热具有1-12个碳原子的羧酸镍的混合物和伯胺以获得其中所形成的镍络合物的络合反应溶液， 以及通过微波加热配合的反应溶液以获得Ni-纳米颗粒浆料的第二步骤。 在第一步骤中，加热优选在105-175℃的温度下进行15分钟或更长时间。 在第二步骤中，加热优选在180℃以上的温度下进行。

公开(公告)号：US20120207398A1

公开(公告)日：2012-08-16

申请号：US13347982

申请日：2012-01-11

申请人： Kazuhiro SHIMAUCHI ,  Yuji Wada ,  Hiroshi Ikeda ,  Daisuke Tahara

发明人： Kazuhiro SHIMAUCHI ,  Yuji Wada ,  Hiroshi Ikeda ,  Daisuke Tahara

IPC分类号： G06K9/36

CPC分类号： G06T9/007 ,  G06T9/004 ,  H04N19/103 ,  H04N19/119 ,  H04N19/122 ,  H04N19/126 ,  H04N19/14 ,  H04N19/176 ,  H04N19/46 ,  H04N19/61 ,  H04N19/70

摘要： An image coding device including: an edge detecting section configured to perform edge detection using an image signal of a reference image for a coding object block; a transform block setting section configured to set transform blocks by dividing the coding object block such that a boundary between the blocks after division does not include an edge on a basis of a result of the edge detection; and a coding processing section configured to generate coded data by performing processing including an orthogonal transform of each of the transform blocks.

摘要翻译： 一种图像编码装置，包括：边缘检测部，被配置为使用编码对象块的参考图像的图像信号进行边缘检测; 变换块设置部分，被配置为通过划分编码对象块来设置变换块，使得除法之后的块之间的边界基于边缘检测的结果不包括边缘; 以及编码处理部，被配置为通过执行包括每个变换块的正交变换的处理来生成编码数据。

公开(公告)号：US20070218572A1

公开(公告)日：2007-09-20

申请号：US11750371

申请日：2007-05-18

申请人： Yuji Wada ,  Susumu Kasukabe ,  Takehiko Hasebe ,  Yasunori Narizuka ,  Akira Yabushita ,  Terutaka Mori ,  Akio Hasebe ,  Yasuhiro Motoyama ,  Teruo Shoji ,  Masakazu Sueyoshi

发明人： Yuji Wada ,  Susumu Kasukabe ,  Takehiko Hasebe ,  Yasunori Narizuka ,  Akira Yabushita ,  Terutaka Mori ,  Akio Hasebe ,  Yasuhiro Motoyama ,  Teruo Shoji ,  Masakazu Sueyoshi

IPC分类号： H01L21/66

CPC分类号： G01R1/07314 ,  G01R31/2872 ,  Y10T29/41 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49169 ,  Y10T29/49798

摘要： The fabrication of a semiconductor integrated circuit device involves testing using a pushing mechanism that is constructed by forming, over the upper surface of a thin film probe, a reinforcing material having a linear expansion coefficient (thermal expansion coefficient) almost equal to that of a wafer to be tested; forming a groove in the reinforcing material above a contact terminal; placing an elastomer in the groove so that a predetermined amount projects out of the groove; and disposing a pusher and another elastomer to sandwich the pusher between the elastomers. With the use of such a probe, it is possible to improve the throughput of wafer-level electrical testing of a semiconductor integrated circuit.

摘要翻译： 半导体集成电路器件的制造包括使用推压机构进行测试，所述推压机构通过在薄膜探针的上表面上形成具有几乎等于晶片的线性膨胀系数（热膨胀系数）的增强材料而构成 待测 在接触端子上方的增强材料中形成凹槽; 将弹性体放置在所述槽中，使得预定量突出到所述凹槽中; 并且设置推进器和另一种弹性体以将推进器夹在弹性体之间。 通过使用这样的探针，可以提高半导体集成电路的晶片级电气测试的吞吐量。

公开(公告)号：US07198962B2

公开(公告)日：2007-04-03

申请号：US10411283

申请日：2003-04-11

申请人： Ryuji Kohno ,  Tetsuo Kumazawa ,  Makoto Kitano ,  Akihiko Ariga ,  Yuji Wada ,  Naoto Ban ,  Shuji Shibuya ,  Yasuhiro Motoyama ,  Kunio Matsumoto ,  Susumu Kasukabe ,  Terutaka Mori ,  Hidetaka Shigi ,  Takayoshi Watanabe

发明人： Ryuji Kohno ,  Tetsuo Kumazawa ,  Makoto Kitano ,  Akihiko Ariga ,  Yuji Wada ,  Naoto Ban ,  Shuji Shibuya ,  Yasuhiro Motoyama ,  Kunio Matsumoto ,  Susumu Kasukabe ,  Terutaka Mori ,  Hidetaka Shigi ,  Takayoshi Watanabe

IPC分类号： G01R31/26 ,  H01L21/66 ,  H01L21/00 ,  H01L21/48

CPC分类号： G01R3/00 ,  G01R1/0735

摘要： Dispersion of load may be kept within an allowance even when a plurality of probes in a large area are pressed in batch by pressing the probes provided in a membrane to a wafer by applying a pressure load to a plurality of places of a plane of pressure members on the side opposite from the wafer in a probe test step/burn-in test step which is one of semiconductor device manufacturing steps. It is then possible to provide semiconductor devices and a manufacturing method thereof which enhance the reliability and productivity of the semiconductor devices by probing a large number of integrated circuits or a large size integrated circuit in the same time.

摘要翻译： 即使当大量区域中的多个探针通过将设置在膜中的探针压迫到晶片而将压力负载施加到压力构件的平面的多个位置时，负载的分散也可以保持在容许范围内 在作为半导体器件制造步骤之一的探针测试步骤/老化测试步骤中与晶片相对的一侧。 因此，可以提供通过同时探测大量集成电路或大尺寸集成电路来提高半导体器件的可靠性和生产率的半导体器件及其制造方法。

公开(公告)号：US07053926B2

公开(公告)日：2006-05-30

申请号：US09953175

申请日：2001-09-17

申请人： Yuji Wada ,  Kazuhiro Yamanaka ,  Mitsuru Higuchi

发明人： Yuji Wada ,  Kazuhiro Yamanaka ,  Mitsuru Higuchi

IPC分类号： H04N7/18

CPC分类号： H04N7/183

摘要： When a first-stage operation or first operation of a freeze switch is performed, a still image is stored in image memory and is displayed on a monitor. When an electronic variable power switch is operated in this state, a still image electronically enlarged is formed on the basis of a signal of the above-described image memory. Then, when a second-stage operation or second operation of the freeze switch is performed, the above-described enlarged still image is recorded in a recording device. Owing to this, it is possible to display and record an arbitrary still image that is enlarged and is positioned on optimum conditions. Moreover, by single operation of an electronic variable power switch, an enlarged still image can be formed and can be also recorded simultaneously. Furthermore, even if continuous recording operation is prohibited, the next recording operation can be performed by operating the electronic variable power switch.

公开(公告)号：US06988272B1

公开(公告)日：2006-01-17

申请号：US09407307

申请日：1999-09-29

申请人： Tadashige Iwao ,  Makoto Okada ,  Yuji Wada

发明人： Tadashige Iwao ,  Makoto Okada ,  Yuji Wada

IPC分类号： G06F9/46

CPC分类号： G06Q10/10 ,  G06Q40/04

摘要： An object collaboration apparatus is driven by a message action relation, and can dynamically build a collaboration between objects using a bidding system. A task initiator object circulates a requesting message, indicating the service content that the task initiator object wants to request, on a shared communication channel 504, and this requesting message is received by each service object. If an action that is a reaction to the message is listed in a reaction table 703 stored by the service objects, the service objects create and return a bidding message, which includes a bidding value, for example the CPU load ratio, with the bidding portion 707. An arbitrating portion of the initiator object receives all bidding messages in a certain period of time, and, in consideration of parameters such as the bidding value and the communication time between objects, determines and awards the bid to the bid-winning object. Then, it sends out the requested processing information together with the bid awarding message. The bid-winning object processes the requested task with an action execution portion 704.

摘要翻译： 对象协作装置由消息动作关系驱动，并且可以使用出价系统动态地建立对象之间的协作。 任务发起者对象在共享通信信道504上循环指示该任务发起者对象想要请求的服务内容的请求消息，并且该请求消息被每个服务对象接收。 如果对服务对象存储的反应表703中列出了对消息的反应的动作，则服务对象创建并返回包括投标价值（例如CPU负载率）的投标消息与投标部分 707.启动器对象的仲裁部分在一定时间段内接收所有招标信息，考虑到投标价值和对象之间的通信时间等参数，确定并对投标对象进行投标。 然后，发出请求的处理信息和投标授标信息。 中标对象用动作执行部分704来处理所请求的任务。

公开(公告)号：US20050193274A1

公开(公告)日：2005-09-01

申请号：US11107896

申请日：2005-04-18

申请人： Hideyuki Aoki ,  Takeshi Wada ,  Masaaki Namba ,  Noboru Uchida ,  Shigeki Katsumi ,  Yuji Wada ,  Masaaki Mochiduki

发明人： Hideyuki Aoki ,  Takeshi Wada ,  Masaaki Namba ,  Noboru Uchida ,  Shigeki Katsumi ,  Yuji Wada ,  Masaaki Mochiduki

IPC分类号： G01R31/28 ,  G06F12/16 ,  G11C29/56 ,  G06F11/00

CPC分类号： G11C29/56

摘要： A memory test system can screen objects of tests accurately at low cost in quasi-operating conditions by utilizing a personal computer. The system utilizes a PC tester comprising a measurement PC unit that carries a memory module to be used as reference; a signal distribution unit for distributing the signal taken out from the measurement PC unit; a plurality of PFBs mounted with respective objected products to be observed simultaneously by using the signals distributed by the signal distribution unit; a display panel for displaying the current status of the test that is being conducted; a power source for producing the operating voltage of the system; and a control PC for controlling the selection of test parameters and various analytical operations. The PC tester is adapted to take out the signal from the chip set LSI on the PC mother board in the measurement PC unit to the individual memories on the memory module or the memory module per se and test them in quasi-operating conditions.

摘要翻译： 记忆测试系统可以通过使用个人计算机在准操作条件下以低成本准确地屏蔽测试对象。 该系统利用包括测量PC单元的PC测试器，该单元携带用作参考的存储器模块; 信号分配单元，用于分配从测量PC单元取出的信号; 通过使用由信号分配单元分配的信号同时观察安装有相应对象产品的多个PFB; 用于显示正在进行的测试的当前状态的显示面板; 用于产生系统的工作电压的电源; 以及用于控制测试参数和各种分析操作的选择的控制PC。 PC测试器适于将测量PC单元中的PC母板上的芯片组LSI的信号从存储器模块或存储器模块本身的各个存储器中取出，并在准工作条件下进行测试。

公开(公告)号：US06566150B2

公开(公告)日：2003-05-20

申请号：US10171695

申请日：2002-06-17

申请人： Ryuji Kohno ,  Tetsuo Kumazawa ,  Makoto Kitano ,  Akihiko Ariga ,  Yuji Wada ,  Naoto Ban ,  Shuji Shibuya ,  Yasuhiro Motoyama ,  Kunio Matsumoto ,  Susumu Kasukabe ,  Terutaka Mori ,  Hidetaka Shigi ,  Takayoshi Watanabe

发明人： Ryuji Kohno ,  Tetsuo Kumazawa ,  Makoto Kitano ,  Akihiko Ariga ,  Yuji Wada ,  Naoto Ban ,  Shuji Shibuya ,  Yasuhiro Motoyama ,  Kunio Matsumoto ,  Susumu Kasukabe ,  Terutaka Mori ,  Hidetaka Shigi ,  Takayoshi Watanabe

IPC分类号： G01R3126

CPC分类号： G01R3/00 ,  G01R1/0735

摘要： Dispersion of load may be kept within an allowance even when a plurality of probes in a large area are pressed in batch by pressing the probes provided in a membrane to a wafer by applying a pressure load to a plurality of places of a plane of pressure members on the side opposite from the wafer in a probe test step/burn-in test step which is one of semiconductor device manufacturing steps. It is then possible to provide semiconductor devices and a manufacturing method thereof which enhance the reliability and productivity of the semiconductor devices by probing a large number of integrated circuits or a large size integrated circuit in the same time.