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    Semiconductor device manufacturing method
    81.
    发明申请
    Semiconductor device manufacturing method 审中-公开
    半导体器件制造方法

    公开(公告)号：US20050208427A1

    公开(公告)日：2005-09-22

    申请号：US11030042

    申请日：2005-01-07

    申请人： Katsuya Hayano ,  Norio Hasegawa

    发明人： Katsuya Hayano ,  Norio Hasegawa

    IPC分类号： G03F1/30 ,  G03F1/32 ,  G03F1/56 ,  G03F1/68 ,  G03F7/00 ,  G03F7/20 ,  H01L21/027 ,  H01L21/30 ,  H01L21/768

    CPC分类号： G03F7/70466 ,  G03F1/30 ,  G03F1/50 ,  G03F7/70283

    摘要： A semiconductor device manufacturing method which shortens the turnaround time for semiconductor devices. In this method, shading material of resist film lies over a main surface of mask blanks and light-transmitting patterns are made as openings in the shading material. A planarizing film is formed so as to cover the shading material and phase shifters of resist film are formed on the flat top surface of the planarizing film. For exposure, pattern is used. Multiple exposure with two or more exposure areas is made in one chip area, where the exposure areas have patterns equal in shape, size, and arrangement, and phase shifters arranged alternately, so that a line pattern is transferred onto a positive type photoresist film of a semiconductor wafer.

    摘要翻译： 一种缩短半导体器件的周转时间的半导体器件制造方法。 在该方法中，抗蚀剂膜的遮光材料位于掩模坯料的主表面上，并且在遮光材料中形成透光图案作为开口。 形成平坦化膜以覆盖遮光材料，并且在平坦化膜的平坦顶表面上形成抗蚀剂膜的移相器。 对于曝光，使用图案。 在一个芯片区域中进行具有两个或更多个曝光区域的多次曝光，其中曝光区域具有在形状，尺寸和布置上相等的图案，并且移相器交替布置，使得线图案被转印到正型光致抗蚀剂膜上 半导体晶片。

    Fabrication method of semiconductor integrated circuit device and mask
    82.
    发明授权
    Fabrication method of semiconductor integrated circuit device and mask 失效
    半导体集成电路器件和掩模的制造方法

    公开(公告)号：US06939649B2

    公开(公告)日：2005-09-06

    申请号：US10259397

    申请日：2002-09-30

    申请人： Shoji Hotta ,  Norio Hasegawa ,  Toshihiko Tanaka

    发明人： Shoji Hotta ,  Norio Hasegawa ,  Toshihiko Tanaka

    IPC分类号： G03F1/29 ,  G03F1/54 ,  G03F1/68 ,  G03F7/20 ,  H01L21/027 ,  G03F9/00 ,  G03C5/00

    CPC分类号： G03F1/29

    摘要： A method of fabrication of a semiconductor integrated circuit device uses a mark having, on a first main surface of a mask substrate, a first light transmitting region, a second light transmitting region disposed at the periphery of the first light transmitting region and permitting inversion of the phase of light transmitted through the second light transmitting region relative to light transmitted through the first light transmitting region, and a light shielding region disposed at the periphery of the second light transmitting region. The second light transmitting region is formed from a first film deposited over the first main surface of the mask substrate, said light shielding region is formed by a second film deposited over the first main surface of the mask substrate via said first film, and at least one of said first film and second is formed from a resist film.

    摘要翻译： 半导体集成电路器件的制造方法使用在掩模衬底的第一主表面上具有第一透光区域，设置在第一透光区域的周围的第二透光区域并允许反转 透射通过第二透光区域的光相对于透过第一透光区域的光的相位，以及设置在第二透光区域周边的遮光区域。 第二透光区域由沉积在掩模基板的第一主表面上的第一膜形成，所述遮光区域由通过所述第一膜沉积在掩模基板的第一主表面上的第二膜形成，并且至少 所述第一膜和第二膜中的一个由抗蚀剂膜形成。

    Method of manufacturing an electronic device and a semiconductor integrated circuit device
    83.
    发明授权
    Method of manufacturing an electronic device and a semiconductor integrated circuit device 失效
    制造电子装置和半导体集成电路装置的方法

    公开(公告)号：US06893785B2

    公开(公告)日：2005-05-17

    申请号：US10684391

    申请日：2003-10-15

    申请人： Toshihiko Tanaka ,  Norio Hasegawa

    发明人： Toshihiko Tanaka ,  Norio Hasegawa

    IPC分类号： G03F1/00 ,  G03F1/32 ,  G03F1/68 ,  G03F7/20 ,  G03F9/00 ,  H01L21/027 ,  G03C5/00

    CPC分类号： G03F7/70466 ,  G03F1/32 ,  G03F1/70 ,  G03F7/70125

    摘要： A method of manufacturing an electronic device, such as a high-speed semiconductor integrated circuit device, provides improved dimensional accuracy in transferring fine patterns. Photolithography for gate patterns and wiring patterns is carried out by exposing a halftone phase-shift mask having shade areas made of resist with an oblique illumination system, and photolithography for contact hole patterns is carried out by using a photomask having a metal shade film with metal alignment wafer marks.

    摘要翻译： 诸如高速半导体集成电路器件的电子器件的制造方法在转印精细图案方面提供了改进的尺寸精度。 用于栅极图案和布线图案的光刻通过使用具有由抗蚀剂制成的阴影区域的半色调相移掩模与倾斜照明系统进行曝光，并且通过使用具有金属阴影膜与金属的光掩模进行用于接触孔图案的光刻 对准晶片标记。

    Electron device manufacturing method, a pattern forming method, and a photomask used for those methods
    86.
    发明授权
    Electron device manufacturing method, a pattern forming method, and a photomask used for those methods 有权
    电子器件制造方法，图案形成方法和用于这些方法的光掩模

    公开(公告)号：US06750000B2

    公开(公告)日：2004-06-15

    申请号：US10671666

    申请日：2003-09-29

    申请人： Toshihiko Tanaka ,  Norio Hasegawa ,  Hiroshi Shiraishi ,  Hidetoshi Satoh

    发明人： Toshihiko Tanaka ,  Norio Hasegawa ,  Hiroshi Shiraishi ,  Hidetoshi Satoh

    IPC分类号： G03F700

    CPC分类号： G03F1/30

    摘要： A method of manufacturing an electron device provided with minute structure such as a semiconductor integrated circuit using projection exposure technique and phase shift mask technique, maintaining a high yield is disclosed. In an electron device manufacturing method according to the invention, a desired electron device is manufactured by printing a light shielding film pattern on a photosensitive film provided on the surface of a workpiece by a projection tool using a mask where a phase shifter having predetermined thickness is partially formed on the flat surface of a transparent plate and a light shielding film having a predetermined pattern and made of non-metal is partially provided with the film covering the end of the shifter and developing the photosensitive film. Further, concretely, the above pattern is printed using a mask where the light shielding film made of non-metal is partially extended on the surface of the shifter and the transparent plate including the end of the shifter by the projection tool. According to the electron device manufacturing method according to the invention, an electron device provided with minute structure can be precisely manufactured maintaining a high yield.

    摘要翻译： 公开了一种制造具有微小结构的电子器件的方法，例如使用投影曝光技术和相移掩模技术的半导体集成电路，保持高产率。 在根据本发明的电子器件制造方法中，通过使用具有预定厚度的移相器的掩模通过投影工具在设置在工件表面上的感光膜上印刷遮光膜图案来制造所需的电子器件 部分地形成在透明板的平坦表面上和具有预定图案并由非金属制成的遮光膜部分地设置有覆盖移位器的端部并显影感光膜的膜。 此外，具体地，使用由非金属制成的遮光膜在移位器的表面上部分地延伸的掩模和通过投影工具包括移位器的端部的透明板来打印上述图案。 根据本发明的电子器件制造方法，可以精确地制造具有微小结构的电子器件，保持高产率。

    Method for manufacturing semiconductor integrated circuit device, optical mask used therefor, method for manufacturing the same, and mask blanks used therefor
    88.
    发明授权
    Method for manufacturing semiconductor integrated circuit device, optical mask used therefor, method for manufacturing the same, and mask blanks used therefor 有权
    用于制造半导体集成电路器件的方法，用于其的光学掩模，其制造方法和用于其的掩模毛坯

    公开(公告)号：US06677107B1

    公开(公告)日：2004-01-13

    申请号：US09646036

    申请日：2000-09-13

    申请人： Norio Hasegawa ,  Tsuneo Terasawa ,  Toshihiko Tanaka

    发明人： Norio Hasegawa ,  Tsuneo Terasawa ,  Toshihiko Tanaka

    IPC分类号： G03C500

    CPC分类号： G03F1/56 ,  G03F1/44 ,  G03F1/62 ,  G03F7/70983

    摘要： In order to suppress or prevent the occurrence of foreign matter in the manufacture of a semiconductor integrated circuit device by the use of a photo mask constituted in such a manner that a resist film is made to function as a light screening film, inspection or exposure treatment is carried out, when the photo mask 1PA1 has been mounted on a predetermined apparatus such as, e.g., an inspection equipment or aligner, in the state in which a mounting portion 2 of the predetermined apparatus is contacted with that region of a major surface of a mask substrate 1a of the photo mask 1PA1 in which a light shielding pattern 1b and a mask pattern 1mr, each formed of a resist film, on the major surface of the mask substrate 1a do not exist.

    摘要翻译： 为了通过使用以使抗蚀剂膜作为遮光膜的方式构成的光掩模来抑制或防止在制造半导体集成电路器件时发生异物，检查或曝光处理 当在预定设备的安装部分2与主要表面的区域接触的状态下，当光掩模1PA1已经安装在诸如检查设备或对准器的预定设备上时， 在掩模基板1a的主表面上不存在其中由抗蚀剂膜形成的遮光图案1b和掩模图案1mr的光掩模1PA1的掩模基板1a。