Scramble transmission apparatus and signal processing apparatus
    81.
    发明授权
    Scramble transmission apparatus and signal processing apparatus 失效
    扰频发送装置和信号处理装置

    公开(公告)号:US5515437A

    公开(公告)日:1996-05-07

    申请号:US291420

    申请日:1994-08-16

    IPC分类号: H04N7/167

    CPC分类号: H04N7/1675

    摘要: The occurrence of malfunction on the reproduction side is avoided by preventing a scrambled signal from being coincided with a reserved word in the signal when a scramble process is carried out in order to release a transmission signal to specific users. The scramble process includes at least one of methods of (1) bit-inverting specified codes of the transmission signal code by code, (2) limiting bits to be scrambled from a specified position in the transmission signal, and (3) limiting codes to be scrambled to specific codes.

    摘要翻译: 通过在执行加扰处理时为了向特定用户释放发送信号,通过防止加扰信号与信号中的保留字一致来避免再现侧出现故障。 加密处理包括以下方法中的至少一种:(1)通过代码对发送信号码的指定代码进行比特反转,(2)限制要从发送信号中的指定位置加扰的比特,以及(3)限制代码 被加扰到具体代码。

    Method and apparatus for cutting plate-shaped brittle material

    公开(公告)号:US5398857A

    公开(公告)日:1995-03-21

    申请号:US84069

    申请日:1993-06-30

    摘要: To assure that a plate-shaped brittle material is exactly cut into two plate pieces, a jig having a thread-shaped projection secured thereto in conformity with a predetermined pattern positionally coincident with a cut groove formed in the plate-shaped brittle material, an elastic member located on the cut groove side of the plate-shaped brittle material, and a plate-shaped brittle material to be cut into two plate pieces are placed on a table of a press machine one above another, and subsequently, a predetermined intensity of pressing power is applied to the jig from above by operating a pressing machine. Alternatively, a jig having a thread-shaped projection secured thereto, an elastic member located on the opposite side relative to the cut groove side of the plate-shaped brittle material, and a plate-shaped brittle material to be cut into two plate pieces may be placed on the press table one above another. Otherwise, a pair of jigs each having a thread-shaped projection secured thereto, a pair of elastic members one of which is located on the cut groove side of a plate-shaped brittle material and other one of which is located on the opposite side relative to the cut groove side of the plate-shaped brittle material, and a plate-shaped brittle material to be cut into two plate pieces may be placed on the press table one above another.

    Film formation apparatus and method for using same
    83.
    发明授权
    Film formation apparatus and method for using same 有权
    成膜装置及其使用方法

    公开(公告)号:US08349401B2

    公开(公告)日:2013-01-08

    申请号:US12684283

    申请日:2010-01-08

    IPC分类号: B05D7/22 C23C16/00

    CPC分类号: C23C16/4405

    摘要: A method for using a film formation apparatus includes performing a main cleaning process and a post cleaning process in this order inside a reaction chamber. The main cleaning process is arranged to supply a cleaning gas containing fluorine into the reaction chamber while exhausting gas from inside the reaction chamber, thereby etching a film formation by-product containing silicon. The post cleaning process is arranged to remove a silicon-containing fluoride generated by the main cleaning process and remaining inside the reaction chamber and to alternately repeat, a plurality of times, supplying an oxidizing gas into the reaction chamber to transform the silicon-containing fluoride into an intermediate product by oxidization, and supplying hydrogen fluoride gas into the reaction chamber while exhausting gas from inside the reaction chamber to remove the intermediate product by a reaction between the hydrogen fluoride gas and the intermediate product.

    摘要翻译: 使用成膜装置的方法包括在反应室内依次进行主清洗处理和后清洗处理。 主要的清洗过程是在从反应室内部排出气体的同时,向反应室内供给含有氟的清洗气体,从而蚀刻含有硅的成膜副产物。 后清洗处理被设置为除去由主要清洗过程产生的含氟氟化物,并保留在反应室内,并交替重复多次,将氧化气体供应到反应室中以将含硅氟化物 通过氧化进入中间产物,并且在从反应室内排出气体的同时将氟化氢气体供应到反应室中,以通过氟化氢气体和中间产物之间的反应除去中间产物。

    Heat exchanger of plate fin and tube type
    84.
    发明授权
    Heat exchanger of plate fin and tube type 有权
    板翅和管型热交换器

    公开(公告)号:US08162041B2

    公开(公告)日:2012-04-24

    申请号:US12503141

    申请日:2009-07-15

    IPC分类号: F28F1/32

    CPC分类号: F28F1/325 F28F1/32

    摘要: A heat exchanger including plate fins stacked at respective intervals relative to one another, and heat exchanger tubes penetrating the fins in. The heat exchanger exchanges heat between first and second fluids flowing, respectively, inside and outside the heat exchanger tubes. Each of the fins includes a substantially planar main body and cut-raised portions extending from the main body and disposed at an upstream side of flow of the second fluid. Each of the cut-raised portions corresponds to a respective heat exchanger tube and includes first and second opposed side ends connected to the main body of the fin. The first side end is nearer to the corresponding heat exchanger tube than is the second side end, the first side end is longer than the second side end, and the first side end is disposed at a downstream side of the flow of the second fluid, facing the corresponding heat exchanger tube.

    摘要翻译: 一种热交换器,其包括相对于彼此以相应间隔堆叠的板状翅片以及穿透翅片的热交换器管。热交换器在分别在热交换器管内和外部流动的第一和第二流体之间交换热量。 每个翅片包括基本平坦的主体和从主体延伸并设置在第二流体的流动的上游侧的切割部分。 每个切起部分对应于相应的热交换器管,并且包括连接到翅片的主体的第一和第二相对的侧端。 第一侧端部比第二侧端部更靠近相应的热交换器管,第一侧端部比第二侧端部长,第一侧端部配置在第二流体的流动的下游侧, 面对相应的热交换器管。

    Page buffer circuit for electrically rewritable non-volatile semiconductor memory device and control method
    85.
    发明授权
    Page buffer circuit for electrically rewritable non-volatile semiconductor memory device and control method 有权
    用于电可重写非易失性半导体存储器件的页面缓冲电路和控制方法

    公开(公告)号:US08081522B2

    公开(公告)日:2011-12-20

    申请号:US12613993

    申请日:2009-11-06

    申请人: Hiroki Murakami

    发明人: Hiroki Murakami

    IPC分类号: G11C7/10

    CPC分类号: G11C16/06 G11C16/04

    摘要: Within a page buffer 14 which is coupled to a non-volatile memory cell array 10 and temporally stores data as the data with a predetermined page unit is written in and read out to/from the memory cell array 10, at least one latch circuit 14v-1 including a bit line selector 14s, a page buffer unit circuit 14u including two latch L1, L2, and a latch L3 is set up for a plurality of bit lines. The bit line selector 14s selects one bit line and couples it to the page buffer unit circuit 14u. The latch L1 temporally stores the data which are read out from the memory cell of the selected bit line, and then outputs the data through the latch L2 or L3. On the other hand, the latch L1 temporally stores the programming data inputted through the latch L2 or L3, and after that outputs it to the memory cell of the selected bit line for programming.

    摘要翻译: 在与非易失性存储单元阵列10耦合并在时间上存储具有预定页单元的数据的数据的页缓冲器14中写入存储单元阵列10并从存储单元阵列10读出的至少一个锁存电路14v -1,包括位线选择器14s,为多个位线设置包括两个锁存器L1,L2和锁存器L3的寻呼缓冲器单元电路14u。 位线选择器14s选择一个位线并将其耦合到页缓冲器单元电路14u。 锁存器L1暂时存储从所选位线的存储单元读出的数据,然后通过锁存器L2或L3输出数据。 另一方面,锁存器L1暂时存储通过锁存器L2或L3输入的编程数据,然后将其输出到所选位线的存储单元进行编程。

    Semiconductor memory device and method of forming the same
    86.
    发明授权
    Semiconductor memory device and method of forming the same 失效
    半导体存储器件及其形成方法

    公开(公告)号:US07613022B2

    公开(公告)日:2009-11-03

    申请号:US11819174

    申请日:2007-06-26

    申请人: Hiroki Murakami

    发明人: Hiroki Murakami

    IPC分类号: G11C5/06

    摘要: Example embodiments provide a semiconductor memory device and method of forming a semiconductor memory device that may equalize load due to a coupling capacitance between a line and a component signal when the line intersects the component signal in a memory cell array. A line may intersect a memory cell region between a transmitting point (A) and a receiving point (B) of a signal. A line between the transmitting point (A) and the receiving point (B) may be bent at two portions of each of bit lines. Because areas where the line and the bit lines extend parallel to each other may be equal in dimension at each bit line, coupling capacitances between the line and the bit lines may be equalized. The read characteristic may not be affected by the coupling capacitances.

    摘要翻译: 示例性实施例提供一种形成半导体存储器件的半导体存储器件和方法,该半导体存储器件可以在线与元件信号在存储单元阵列中相交时由于线与元件信号之间的耦合电容而使负载均衡。 线可以与信号的发送点(A)和接收点(B)之间的存储单元区域相交。 发送点(A)和接收点(B)之间的线可以在每个位线的两个部分处弯曲。 因为线和位线彼此平行延伸的区域在每个位线处的尺寸可以相等,所以线和位线之间的耦合电容可以相等。 读取特性可能不受耦合电容的影响。

    Semiconductor device and control method of the same
    87.
    发明授权
    Semiconductor device and control method of the same 有权
    半导体器件及其控制方法相同

    公开(公告)号:US07573743B2

    公开(公告)日:2009-08-11

    申请号:US11514391

    申请日:2006-08-30

    IPC分类号: G11C11/34

    摘要: A semiconductor device includes: a first sector (12) having data that are all to be erased and having flash memory cells; a second sector (14) having data that are all to be retained and having flash memory cells; a sector select circuit (16) selecting a pair of sectors from among sectors during erasing the data in the first sector, said pair of sectors being the first sector and the second sector; and an SRAM array (storage) (30) retaining the data of the second sector. The present invention can provide a semiconductor device in which a reduced number of sector select circuits is used so that the area of memory cell array can be reduced and provide a method of controlling the semiconductor device.

    摘要翻译: 一种半导体器件包括:具有全部要被擦除并具有闪存单元的数据的第一扇区(12); 具有全部要保留并具有闪存单元的数据的第二扇区(14); 扇区选择电路(16)在擦除第一扇区中的数据期间从扇区中选择一对扇区,所述一对扇区是第一扇区和第二扇区; 以及保持第二扇区的数据的SRAM阵列(存储)(30)。 本发明可以提供一种半导体器件,其中使用了减少数量的扇区选择电路,使得可以减小存储单元阵列的面积并提供一种控制半导体器件的方法。