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    Multi battery pack system, control method thereof, and battery pack using the same
    81.
    发明授权
    Multi battery pack system, control method thereof, and battery pack using the same 有权
    多电池组系统，其控制方法和使用其的电池组

    公开(公告)号：US08018205B2

    公开(公告)日：2011-09-13

    申请号：US12796134

    申请日：2010-06-08

    Applicant: Eguchi Yasuhito ,  Tanina Shoji ,  Dal-Hoon Lee ,  Sang-Hoon Lee ,  Jee-Ho Kim

    Inventor： Eguchi Yasuhito ,  Tanina Shoji ,  Dal-Hoon Lee ,  Sang-Hoon Lee ,  Jee-Ho Kim

    IPC: H02J7/00 ,  H02J7/24

    CPC classification number: H01M10/441 ,  H01M10/0445 ,  H01M10/46 ,  H01M10/482 ,  H01M2010/4271 ,  H01M2010/4278

    Abstract: A multi battery pack system is composed of a plurality of battery packs. The master battery pack receives a total voltage from each slave battery pack and calculates a target total voltage using its total voltage and total voltages of all slave battery pack whenever a predetermined time period passes, sends the calculated target total voltage to each slave battery pack, compares the target total voltage with its total voltage, and then connects or disconnects its cell group and output terminals according to the comparison result. The slave battery packs include at least one slave battery pack, which sends its total voltage according to a request of the master battery pack, receives a target total voltage from the master battery pack, compares the target total voltage with its total voltage, and then connects or disconnects its cell group and output terminals according to the comparison result.

    Abstract translation: 多电池组系统由多个电池组组成。 主电池组从每个从电池组接收总电压，并且在预定时间段过去时，使用其所有从属电池组的总电压和总电压来计算目标总电压，将计算出的目标总电压发送到每个从属电池组， 将目标总电压与其总电压进行比较，然后根据比较结果连接或断开其单元组和输出端子。 从电池组包括至少一个从电池组，其根据主电池组的请求发送其总电压，从主电池组接收目标总电压，将目标总电压与其总电压进行比较，然后 根据比较结果连接或断开其单元组和输出端子。

    Optical sheet and display device having the same
    82.
    发明授权
    Optical sheet and display device having the same 有权
    具有相同的光学片和显示装置

    公开(公告)号：US07990490B2

    公开(公告)日：2011-08-02

    申请号：US12315808

    申请日：2008-12-04

    Applicant: Sang-Hoon Lee ,  Byung-Yun Joo ,  Min-Young Song ,  Jin-Sung Choi ,  Seung-Hwan Chung ,  Dong-Kwan Kim

    Inventor： Sang-Hoon Lee ,  Byung-Yun Joo ,  Min-Young Song ,  Jin-Sung Choi ,  Seung-Hwan Chung ,  Dong-Kwan Kim

    IPC: G02F1/1335 ,  G02B5/02 ,  F21V5/04 ,  F21V7/04

    CPC classification number: G02B6/0053 ,  G02B3/005 ,  G02B3/0056 ,  G02F1/133606 ,  G02F2001/133607

    Abstract: An optical sheet includes a base layer, a light-condensing layer and a plurality of light-reflecting portions. The base layer includes a first surface and a second surface. The light-condensing layer includes a plurality of light-condensing portions with a first pitch. The light-condensing portions are formed along a first direction of the second surface. The light-reflecting portions are formed in the first surface to be spaced apart from each other along the -first direction in correspondence with a plurality of grooves, each groove formed between two light-condensing portions. An interval distance between a center of the light-condensing portion and an edge of the light-reflecting portion increases when moving toward the edge of the first surface from a center of the first surface along the first direction. Therefore, the number of the optical sheets used for the display device may be reduced.

    Abstract translation: 光学片包括基底层，聚光层和多个光反射部分。 基层包括第一表面和第二表面。 聚光层包括具有第一间距的多个聚光部分。 聚光部分沿着第二表面的第一方向形成。 光反射部分形成在第一表面中，以与多个凹槽相对应地沿着第一方向彼此间隔开，每个凹槽形成在两个聚光部分之间。 当沿着第一方向从第一表面的中心向第一表面的边缘移动时，聚光部分的中心和光反射部分的边缘之间的间隔距离增加。 因此，可以减少用于显示装置的光学片的数量。

    Single crystal silicon carbaide nanowire, method of preparation thereof, and filter comprising the same
    84.
    发明申请
    Single crystal silicon carbaide nanowire, method of preparation thereof, and filter comprising the same 有权
    单晶碳化硅纳米线，其制备方法和包含该纳米线的过滤器

    公开(公告)号：US20100293910A1

    公开(公告)日：2010-11-25

    申请号：US11919809

    申请日：2007-08-16

    Applicant: Sung Churl Choi ,  Sang-Hoon Lee ,  Jin-Seok Lee ,  Yun-Ki Byeun

    Inventor： Sung Churl Choi ,  Sang-Hoon Lee ,  Jin-Seok Lee ,  Yun-Ki Byeun

    IPC: C01B31/36 ,  D02G3/02 ,  C30B1/10 ,  B01D39/20

    CPC classification number: B01D39/2041 ,  B01D2239/025 ,  Y10T428/298

    Abstract: Single-crystal silicon carbide nanowires and a method for producing the nanowires are provided. The single-crystal silicon carbide nanowires have a very high aspect ratio and can be used for the fabrication of nanoelectronic devices, including electron gun emitters and MEMS probe tips, for use in a variety of displays and analyzers. Further provided is a filter comprising the nanowires. The filter is applied to systems for filtering vehicle engine exhaust gases to achieve improved filtering performance and increased lifetime.

    Abstract translation: 提供单晶碳化硅纳米线和制造纳米线的方法。 单晶碳化硅纳米线具有非常高的纵横比，可用于制造用于各种显示器和分析仪的纳米电子器件，包括电子枪发射器和MEMS探针尖端。 还提供了包含纳米线的过滤器。 该过滤器适用于过滤车辆发动机废气的系统，以实现改进的过滤性能和更长的使用寿命。

    Method and apparatus for encoding interlaced macroblock texture information
    85.
    再颁专利
    Method and apparatus for encoding interlaced macroblock texture information 有权
    用于编码隔行扫描宏块纹理信息的方法和装置

    公开(公告)号：USRE41951E1

    公开(公告)日：2010-11-23

    申请号：US12131723

    申请日：2008-06-02

    Applicant: Sang-Hoon Lee

    Inventor： Sang-Hoon Lee

    IPC: H04N7/12

    CPC classification number: H04N19/649 ,  H04N19/16 ,  H04N19/20 ,  H04N19/51 ,  H04N19/563 ,  H04N19/593 ,  H04N19/61

    Abstract: A method for padding interlaced texture information on a reference VOP to perform a motion estimation detects whether said each texture macroblock of the reference VOP is a boundary block or not. After the undefined texture pixels of the boundary block are extrapolated from the defined texture pixels thereof by using a horizontal repetitive padding, a transparent row padding and a transparent field padding sequentially, an undefined adjacent block is expanded based on the extrapolated boundary block.

    Abstract translation: 用于在参考VOP上填补隔行纹理信息以执行运动估计的方法检测参考VOP的所述每个纹理宏块是否是边界块。 在通过使用水平重复填充，透明行填充和透明字段填充之后，从定义的纹理像素外推边界块的未定义纹理像素之后，基于外推边界块来扩展未定义的相邻块。

    Test interface device, test system and optical interface memory device
    88.
    发明申请
    Test interface device, test system and optical interface memory device 有权
    测试接口设备，测试系统和光接口存储设备

    公开(公告)号：US20100150549A1

    公开(公告)日：2010-06-17

    申请号：US12592817

    申请日：2009-12-03

    Applicant: Sang-Hoon Lee ,  Eun-Jo Byun ,  Cheol-Jong Woo ,  Se-Jang Oh

    Inventor： Sang-Hoon Lee ,  Eun-Jo Byun ,  Cheol-Jong Woo ,  Se-Jang Oh

    IPC: H04B10/08

    CPC classification number: G11C29/56 ,  G11C29/32 ,  G11C2029/2602 ,  G11C2029/5602

    Abstract: A test interface device includes a serializer, an optical transmitter, an optical receiver, and a deserializer. The serializer receives parallel test signals from automatic test equipment, and serializes the parallel test signals into a serial test signal. The optical transmitter converts the serial test signal into an optical test signal. The optical receiver receives the optical test signal from the optical transmitter, and converts the optical test signal into the serial test signal. The deserializer deserializes the serial test signal into the parallel test signals, and transmits the parallel test signals to a device under test. As a result, signal transfer speed may be improved and optical resource usage may be reduced.

    Abstract translation: 测试接口设备包括串行器，光发送器，光接收器和解串器。 串行器从自动测试设备接收并行测试信号，将并行测试信号串行化为串行测试信号。 光发射机将串行测试信号转换为光学测试信号。 光接收机从光发射机接收光测试信号，并将光测试信号转换为串行测试信号。 解串器将串行测试信号反序列化为并行测试信号，并将并行测试信号发送到被测设备。 结果，可以提高信号传送速度，并且可以减少光学资源的使用。

    Deflection yoke for cathode ray tube
    89.
    发明授权
    Deflection yoke for cathode ray tube 失效
    阴极射线管偏转磁轭

    公开(公告)号：US07629754B2

    公开(公告)日：2009-12-08

    申请号：US11348738

    申请日：2006-02-06

    Applicant: Do-Nyun Kim ,  Ran-Ji Lee ,  Je-Wook Nam ,  Chang-Ryon Byon ,  Hoo-Deuk Kim ,  Moon-Jin Kim ,  Sang-Hoon Lee

    Inventor： Do-Nyun Kim ,  Ran-Ji Lee ,  Je-Wook Nam ,  Chang-Ryon Byon ,  Hoo-Deuk Kim ,  Moon-Jin Kim ,  Sang-Hoon Lee

    IPC: G09G1/04

    CPC classification number: H01J29/701

    Abstract: A deflection yoke for a cathode ray tube improves assembly and productivity and enables effective control of magnetic field corrections during device processing. The deflection yoke includes a horizontal deflection coil located next to the outer circumference of a funnel to generate a horizontal magnetic field, and a vertical deflection coil installed at the outer circumference of the funnel to generate a vertical deflection magnetic field. The vertical deflection coil is insulated from the horizontal deflection coil. A ferrite core is located close to the vertical deflection coil to reduce the loss in the magnetic force generated from the horizontal and vertical deflection coils, and to enhance their magnetic efficiency. A correction unit is spaced apart from the horizontal deflection coil by a predetermined distance to correct a geometric distortion of the vertical and the horizontal deflection magnetic fields that is generated due to the vertical and horizontal deflection coils.

    Abstract translation: 用于阴极射线管的偏转线圈提高组装和生产率，并且能够在器件处理期间有效地控制磁场校正。 偏转线圈包括位于漏斗的外圆周旁边以产生水平磁场的水平偏转线圈和安装在漏斗的外圆周处以产生垂直偏转磁场的垂直偏转线圈。 垂直偏转线圈与水平偏转线圈绝缘。 铁氧体磁心位于靠近垂直偏转线圈的位置，以减少由水平和垂直偏转线圈产生的磁力的损失，并提高其磁效率。 校正单元与水平偏转线圈间隔预定距离，以校正由于垂直和水平偏转线圈而产生的垂直和水平偏转磁场的几何失真。

    Parallel testing of semiconductor devices using a dividing voltage supply unit
    90.
    发明授权
    Parallel testing of semiconductor devices using a dividing voltage supply unit 失效
    使用分压电源单元对半导体器件进行并联测试

    公开(公告)号：US07626413B2

    公开(公告)日：2009-12-01

    申请号：US12185697

    申请日：2008-08-04

    Applicant: Sang-Hoon Lee ,  Joon-Su Ji ,  Jung-Bae Ahn

    Inventor： Sang-Hoon Lee ,  Joon-Su Ji ,  Jung-Bae Ahn

    IPC: G01R31/02

    CPC classification number: G01R31/31926 ,  G01R31/31721 ,  G11C29/56 ,  G11C29/56008 ,  G11C2029/2602 ,  G11C2029/5602

    Abstract: Provided is a method of performing a parallel test on semiconductor devices, the method including coupling a power signal line to a set of at least two semiconductor devices through a switching device, performing at least one part of a parallel test on the set of semiconductor devices, and disconnecting a semiconductor device from the set in response to determining that the semiconductor device is defective as a result of the at least one part of the parallel test.

    Abstract translation: 提供了一种对半导体器件进行并行测试的方法，该方法包括通过开关器件将功率信号线耦合到至少两个半导体器件的集合，在该组半导体器件上进行至少一部分并行测试 并且响应于由于所述并行测试的所述至少一部分的结果确定所述半导体器件有缺陷而将半导体器件与所述组件断开连接。

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