公开(公告)号：US08988259B2

公开(公告)日：2015-03-24

申请号：US13770064

申请日：2013-02-19

Applicant: Avinash Gutta ,  Alan Gillespie ,  Roderick McLachlan

Inventor： Avinash Gutta ,  Alan Gillespie ,  Roderick McLachlan

IPC: H03M1/00 ,  H03K3/356 ,  H03M1/66 ,  H03K17/00

CPC classification number: H03K3/356139 ,  H03K17/00 ,  H03K17/16 ,  H03M1/66

Abstract: A data converter can include a resistor network, a switch network connected to the resistor network and having a plurality of switch circuits, each with an NMOS and a PMOS switch transistor, and a voltage generator to generate a drive voltage for driving a gate of at least one of the NMOS or PMOS switch transistors of at least one of the switch circuits. The voltage generator can include first and second pairs of transistors, each pair having connected control terminals and being connected to a second NMOS or PMOS transistor, a first or second resistor, and the other pair of transistors. The first and second resistors can have substantially equal resistance values. A ratio of width-to-length ratios of the second NMOS to PMOS transistors can be substantially equal to such a ratio of the switch circuit NMOS to PMOS transistors.

Abstract translation: 数据转换器可以包括电阻器网络，连接到电阻器网络的开关网络，并且具有多个开关电路，每个开关电路各自具有NMOS和PMOS开关晶体管，以及电压发生器，用于产生用于驱动栅极的驱动电压 至少一个开关电路的NMOS或PMOS开关晶体管中的至少一个。 电压发生器可以包括第一和第二对晶体管，每对晶体管具有连接的控制端子，并且连接到第二NMOS或PMOS晶体管，第一或第二电阻器以及另一对晶体管。 第一和第二电阻器可具有基本相等的电阻值。 第二NMOS与PMOS晶体管的宽比比可以与开关电路NMOS与PMOS晶体管的这一比例基本相等。

公开(公告)号：US20110127880A1

公开(公告)日：2011-06-02

申请号：US12629629

申请日：2009-12-02

Applicant: Mark J. Murphy ,  Alan Gillespie ,  Eoin Edward English ,  Donal Geraghty ,  Dennis A. Dempsey

Inventor： Mark J. Murphy ,  Alan Gillespie ,  Eoin Edward English ,  Donal Geraghty ,  Dennis A. Dempsey

IPC: H01L41/09

CPC classification number: H01L41/042

Abstract: A device and method are provided to drive piezoelectric elements in haptic applications. In one embodiment, a pattern generator provides user programmable PWM waveforms to a driver. The load of the driver is an inductor in series with the piezoelectric element. The filtration of the inductor in series with the capacitance of the piezoelectric element suppresses the high-frequency components of the PWM pulse train, and recovers a value commensurate with the duty cycle of the PWM pulse train. The resulting waveform across the piezoelectric element is converted to physical motion, thereby creating a haptic effect on a user interface. Advantageously, there is reduced power loss, reduced switching induced noise, and a more haptic rich environment.

Abstract translation: 提供了一种在触觉应用中驱动压电元件的装置和方法。 在一个实施例中，模式发生器向驱动器提供用户可编程的PWM波形。 驱动器的负载是与压电元件串联的电感器。 与压电元件的电容串联的电感器的过滤抑制了PWM脉冲串的高频分量，并且恢复与PWM脉冲串的占空比相当的值。 将压电元件的结果波形转换为物理运动，从而在用户界面上产生触觉效果。 有利地，减少了功率损耗，降低了开关感应噪声，并且更有触觉丰富的环境。

公开(公告)号：US20070096965A1

公开(公告)日：2007-05-03

申请号：US11266041

申请日：2005-11-03

Applicant: Alan Gillespie ,  Roderick McLachlan ,  Teng-Hee Lee

Inventor： Alan Gillespie ,  Roderick McLachlan ,  Teng-Hee Lee

IPC: H03M1/66

CPC classification number: H03M1/0607 ,  H03M1/785

Abstract: A digital to analog converter comprising: a digital to analog conversion core adapted to receive at least one reference voltage and a digital word to be converted, and to output an analog voltage as a function of the digital word and the at least one reference voltage; a sensing circuit for sensing a difference between a first ground voltage associated with an output of the digital to analog converter and a ground reference voltage occurring at the digital to analog converter; and a compensation circuit for applying a compensation voltage to the at least one reference voltage used by the conversion core of the digital to analog converter.

公开(公告)号：US09113284B2

公开(公告)日：2015-08-18

申请号：US13585697

申请日：2012-08-14

Applicant: John Hillan ,  Alan Gillespie

Inventor： John Hillan ,  Alan Gillespie

IPC: H04B5/00 ,  H04W8/00 ,  G06K7/00 ,  H04L29/06

CPC classification number: H04W8/005 ,  G06K7/0008 ,  H04L69/28

Abstract: Aspects disclosed herein relate to improving mechanisms for managing logical connection establishment between NFCC and a DH. In one example, with a NFC device a NFCC may be configured to receive a core initialization command, from a DH, as part of an initialization and activation procedure. The NFCC may be configured to transmit a core initialization response to the DH without information associated with a static RF connection. Thereafter, the NFC device may detect one or more remote NFC endpoints. The NFCC may further be operable to determine a maximum payload size and an initial number of credits for the static RF connection based, at least in part, on at least one of a RF interface or a RF protocol used by a remote NFC endpoint chosen for communications, and transmit the determined maximum payload size and the initial number of credits to the DH to establish a logical connection.

Abstract translation: 本文公开的方面涉及用于管理NFCC和DH之间的逻辑连接建立的改进机制。 在一个示例中，利用NFC设备，NFCC可以被配置为从初始化和激活过程的一部分接收来自DH的核心初始化命令。 NFCC可以被配置为向DH发送核心初始化响应，而不需要与静态RF连接相关联的信息。 此后，NFC设备可以检测一个或多个远程NFC端点。 至少部分地基于由远程NFC端点使用的RF接口或RF协议中的至少一个来选择用于静态RF连接的NF CC的最大有效载荷大小和初始数量 通信，并将所确定的最大有效负载大小和初始信用数量发送到DH以建立逻辑连接。

公开(公告)号：US20130052950A1

公开(公告)日：2013-02-28

申请号：US13585697

申请日：2012-08-14

Applicant: John Hillan ,  Alan Gillespie

Inventor： John Hillan ,  Alan Gillespie

IPC: H04B5/00

CPC classification number: H04W8/005 ,  G06K7/0008 ,  H04L69/28

Abstract: Aspects disclosed herein relate to improving mechanisms for managing logical connection establishment between NFCC and a DH. In one example, with a NFC device a NFCC may be configured to receive a core initialization command, from a DH, as part of an initialization and activation procedure. The NFCC may be configured to transmit a core initialization response to the DH without information associated with a static RF connection. Thereafter, the NFC device may detect one or more remote NFC endpoints. The NFCC may further be operable to determine a maximum payload size and an initial number of credits for the static RF connection based, at least in part, on at least one of a RF interface or a RF protocol used by a remote NFC endpoint chosen for communications, and transmit the determined maximum payload size and the initial number of credits to the DH to establish a logical connection.

Abstract translation: 本文公开的方面涉及用于管理NFCC和DH之间的逻辑连接建立的改进机制。 在一个示例中，利用NFC设备，NFCC可以被配置为从初始化和激活过程的一部分接收来自DH的核心初始化命令。 NFCC可以被配置为向DH发送核心初始化响应，而不需要与静态RF连接相关联的信息。 此后，NFC设备可以检测一个或多个远程NFC端点。 至少部分地基于由远程NFC端点使用的RF接口或RF协议中的至少一个来选择用于静态RF连接的NF CC的最大有效载荷大小和初始数量 通信，并将所确定的最大有效负载大小和初始信用数量发送到DH以建立逻辑连接。

公开(公告)号：US08305200B2

公开(公告)日：2012-11-06

申请号：US12629629

申请日：2009-12-02

Applicant: Mark J. Murphy ,  Alan Gillespie ,  Eoin Edward English ,  Donal Geraghty ,  Dennis A. Dempsey

Inventor： Mark J. Murphy ,  Alan Gillespie ,  Eoin Edward English ,  Donal Geraghty ,  Dennis A. Dempsey

IPC: H04B3/36

CPC classification number: H01L41/042

Abstract: A device and method are provided to drive piezoelectric elements in haptic applications. In one embodiment, a pattern generator provides user programmable PWM waveforms to a driver. The load of the driver is an inductor in series with the piezoelectric element. The filtration of the inductor in series with the capacitance of the piezoelectric element suppresses the high-frequency components of the PWM pulse train, and recovers a value commensurate with the duty cycle of the PWM pulse train. The resulting waveform across the piezoelectric element is converted to physical motion, thereby creating a haptic effect on a user interface. Advantageously, there is reduced power loss, reduced switching induced noise, and a more haptic rich environment.

Abstract translation: 提供了一种在触觉应用中驱动压电元件的装置和方法。 在一个实施例中，模式发生器向驱动器提供用户可编程的PWM波形。 驱动器的负载是与压电元件串联的电感器。 与压电元件的电容串联的电感器的过滤抑制了PWM脉冲串的高频分量，并且恢复与PWM脉冲串的占空比相当的值。 将压电元件的结果波形转换为物理运动，从而在用户界面上产生触觉效果。 有利地，减少了功率损耗，降低了开关感应噪声，并且更有触觉丰富的环境。

公开(公告)号：US06215816B1

公开(公告)日：2001-04-10

申请号：US09034251

申请日：1998-03-04

Applicant: Alan Gillespie ,  Michael Harwood

Inventor： Alan Gillespie ,  Michael Harwood

IPC: H04B138

CPC classification number: H04L49/351 ,  H04L12/40136 ,  H04L12/44 ,  H04L49/40 ,  H04L69/18

Abstract: A single chip dual function 10 Base-T/100 Base-X physical layer interface device (PHY) compatible with existing 5 V parts is provided. The PHY includes a media-independent interface (MII) and connects to an unshielded twisted pair cable via an isolation transformer and a single RJ45 connector. The PHY includes built-in auto-negotiation circuitry that allows for automatic selection of half/full duplex 10 Base-T and 100 Base-TX, while auto-polarity correction circuitry ensures immunity to receive pair reversal in the 10 Base-T mode of operation. The PHY includes internal PLL circuitry that uses a single 20 MHz clock or crystal, but that is suitable for either speed mode. The PHY includes low-power and power down modes. The 10 Base-T portions of the PHY include smart squelch for improved receive noise immunity. The PHY includes high jitter tolerance clock recovery circuitry and transmit jabber detection circuitry. The 10 Base-T portions of the PHY include on board transmit waveshaping. The 100 Base-X portions of the PHY include synthesized rise time control for reduced electromagnetic interference (EMI). The PHY includes a programmable transmit voltage amplitude for 100 Base-X MLT-3 waveform generation and integrated adaptive equalization circuitry and baseline wander correction (DC restoration) circuitry for the 100 Base-X receiver.

Abstract translation: 提供了与现有5 V部件兼容的单芯片双功能10 Base-T / 100 Base-X物理层接口设备（PHY）。 PHY包括一个媒体独立接口（MII），并通过隔离变压器和一个RJ45连接器连接到非屏蔽双绞线。 PHY包括内置的自动协商电路，允许自动选择半双工10 Base-T和100 Base-TX，而自动极性校正电路确保在10 Base-T模式下的接收对反转的抗扰度 操作。 PHY包括使用单个20 MHz时钟或晶振的内部PLL电路，但适用于任一速度模式。 PHY包括低功耗和掉电模式。 PHY的10个Base-T部分包括用于提高接收噪声抗扰度的智能静噪。 PHY包括高抖动容限时钟恢复电路和发送jabber检测电路。 PHY的10个Base-T部分包括板载发射波形整形。 PHY的100个Base-X部分包括用于降低电磁干扰（EMI）的合成上升时间控制。 PHY为100 Base-X接收机提供100 Base-X MLT-3波形生成和集成自适应均衡电路和基线漂移校正（DC恢复）电路的可编程发射电压幅度。

公开(公告)号：US07248192B2

公开(公告)日：2007-07-24

申请号：US11266041

申请日：2005-11-03

Applicant: Alan Gillespie ,  Roderick C. McLachlan ,  Teng-Hee Lee

Inventor： Alan Gillespie ,  Roderick C. McLachlan ,  Teng-Hee Lee

IPC: H03M1/06

CPC classification number: H03M1/0607 ,  H03M1/785

Abstract: A digital to analog converter comprising: a digital to analog conversion core adapted to receive at least one reference voltage and a digital word to be converted, and to output an analog voltage as a function of the digital word and the at least one reference voltage; a sensing circuit for sensing a difference between a first ground voltage associated with an output of the digital to analog converter and a ground reference voltage occurring at the digital to analog converter; and a compensation circuit for applying a compensation voltage to the at least one reference voltage used by the conversion core of the digital to analog converter.

Abstract translation: 一种数模转换器，包括：数模转换核心，适于接收至少一个参考电压和要转换的数字字，并输出模拟电压作为数字字和至少一个参考电压的函数; 感测电路，用于感测与数模转换器的输出相关联的第一接地电压与数模转换器之间出现的接地参考电压之间的差异; 以及补偿电路，用于将补偿电压施加到由数模转换器的转换核心使用的至少一个参考电压。

公开(公告)号：US20070090875A1

公开(公告)日：2007-04-26

申请号：US11256714

申请日：2005-10-24

Applicant: Roderick McLachlan ,  Alan Gillespie ,  Teng-Hee Lee

Inventor： Roderick McLachlan ,  Alan Gillespie ,  Teng-Hee Lee

IPC: H03F1/36

CPC classification number: H03F3/45475 ,  H03F1/34 ,  H03F2203/45522 ,  H03M1/687 ,  H03M1/785 ,  H03M1/808

Abstract: A feedback circuit for an operational amplifier is provided, the circuit comprising a first impedance element in a current flow path between an output of the operational amplifier and a first node, wherein a plurality of impedance elements are, in response to a control signal, selectively connectable either between the first node and a first input of the operational amplifier, or between the first node and a further node, and the further node and the first input of the operational amplifier are at the same potential such that a voltage at the first node is independent of the control signal.

Abstract translation: 提供了一种用于运算放大器的反馈电路，该电路包括在运算放大器的输出与第一节点之间的电流流动路径中的第一阻抗元件，其中多个阻抗元件响应于控制信号而选择性地 可以在第一节点和运算放大器的第一输入端之间或者在第一节点和另一节点之间连接，并且运算放大器的另一节点和第一输入端处于相同的电位，使得第一节点处的电压 独立于控制信号。