公开(公告)号：US07682980B2

公开(公告)日：2010-03-23

申请号：US11627016

申请日：2007-01-25

申请人： Helene Del Puppo ,  Frank Lin ,  Chris Lee ,  Vahid Vahedi ,  Thomas A. Kamp ,  Alan J. Miller ,  Saurabh Ullal ,  Harmeet Singh

发明人： Helene Del Puppo ,  Frank Lin ,  Chris Lee ,  Vahid Vahedi ,  Thomas A. Kamp ,  Alan J. Miller ,  Saurabh Ullal ,  Harmeet Singh

IPC分类号： H01L21/302

CPC分类号： H01L21/32137

摘要： A method for etching a polysilicon gate structure in a plasma etch chamber is provided. The method initiates with defining a pattern protecting a polysilicon film to be etched. Then, a plasma is generated. Next, substantially all of the polysilicon film that is unprotected is etched. Then, a silicon containing gas is introduced and a remainder of the polysilicon film is etched while introducing a silicon containing gas. An etch chamber configured to introduce a silicon containing gas during an etch process is also provided.

摘要翻译： 提供了一种在等离子体蚀刻室中蚀刻多晶硅栅极结构的方法。 该方法开始于限定保护待蚀刻的多晶硅膜的图案。 然后，产生等离子体。 接下来，蚀刻大部分未被保护的多晶硅膜。 然后，引入含硅气体，并且在引入含硅气体的同时蚀刻剩余的多晶硅膜。 还提供了一种被配置为在蚀刻工艺期间引入含硅气体的蚀刻室。

公开(公告)号：US06939811B2

公开(公告)日：2005-09-06

申请号：US10256251

申请日：2002-09-25

申请人： Tom A. Kamp ,  Alan J. Miller ,  Vijayakumar C. Venugopal

发明人： Tom A. Kamp ,  Alan J. Miller ,  Vijayakumar C. Venugopal

IPC分类号： H01L21/00 ,  H01L21/3065 ,  H01L21/302

CPC分类号： H01L21/67253 ,  H01J37/321 ,  H01J37/32963 ,  H01L21/3065 ,  H01L21/67069

摘要： An apparatus and method for etching a feature in a wafer with improved depth control and reproducibility is described. The feature is etched at a first etching rate and then at a second etching rate, which is slower than the first etching rate. An optical end point device is used to determine the etching depth and etching is stopped so that the feature has the desired depth. Two different etching rates provides high throughput with good depth control and reproducibility. The apparatus includes an etching tool in which a chuck holds the wafer to be etched. An optical end point device is positioned to measure the feature etch depth. An electronic controller communicates with the optical end point device and the etching tool to control the tool to reduce the etch rate part way through etching the feature and to stop the etching tool, so that that the feature is etched to the desired depth.

摘要翻译： 描述了一种用于蚀刻具有改进的深度控制和再现性的晶片中的特征的装置和方法。 以第一蚀刻速率蚀刻该特征，然后以比第一蚀刻速率慢的第二蚀刻速率蚀刻该特征。 使用光学终点装置来确定蚀刻深度并停止蚀刻，使得特征具有期望的深度。 两种不同的蚀刻速率提供了高吞吐量，具有良好的深度控制和重现性。 该装置包括蚀刻工具，其中卡盘夹持待蚀刻的晶片。 定位光学终点装置以测量特征蚀刻深度。 电子控制器与光学终点装置和蚀刻工具通信以控制工具，以通过蚀刻特征来减少蚀刻速率，并停止蚀刻工具，使得该特征被蚀刻到期望的深度。

公开(公告)号：US07605063B2

公开(公告)日：2009-10-20

申请号：US11431104

申请日：2006-05-10

申请人： Robert P. Chebi ,  Jaroslaw W. Winniczek ,  Alan J. Miller ,  Gladys S. Lo

发明人： Robert P. Chebi ,  Jaroslaw W. Winniczek ,  Alan J. Miller ,  Gladys S. Lo

IPC分类号： H01L21/26 ,  B44C1/22 ,  C03C15/00

CPC分类号： H01L21/31138 ,  H01J37/321 ,  H01J2237/3342

摘要： Methods of processing a substrate so as to protect an active area include positioning a substrate in an inductively coupled plasma processing chamber, supplying process gas to the chamber, generating plasma from the process gas and processing the substrate so as to protect the active area by maintaining a plasma potential of about 5 to 15 volts at the substrate surface and/or passivating the active area by using a siliane-free process gas including at least one additive effective to form a protective layer on the active area of the substrate wherein the protective layer includes at least one element from the additive which is already present in the active area.

摘要翻译： 处理衬底以保护有源区域的方法包括将衬底定位在电感耦合等离子体处理室中，将工艺气体供应到腔室，从处理气体产生等离子体并处理衬底，以通过保持来保护有源区域 在衬底表面上具有约5至15伏特的等离子体电位和/或通过使用包含至少一种在衬底的有源区上形成保护层的至少一种添加剂的无硅衬底工艺气体来钝化活性区域，其中保护层 包括已经存在于活性区域中的来自添加剂的至少一种元素。

公开(公告)号：US07186661B2

公开(公告)日：2007-03-06

申请号：US10607612

申请日：2003-06-27

申请人： Helene Del Puppo ,  Frank Lin ,  Chris Lee ,  Vahid Vahedi ,  Thomas A. Kamp ,  Alan J. Miller ,  Saurabh Ullal ,  Harmeet Singh

发明人： Helene Del Puppo ,  Frank Lin ,  Chris Lee ,  Vahid Vahedi ,  Thomas A. Kamp ,  Alan J. Miller ,  Saurabh Ullal ,  Harmeet Singh

IPC分类号： H01L21/302

CPC分类号： H01L21/3065 ,  H01L21/28035 ,  H01L21/28044 ,  H01L21/32137 ,  H01L21/823842 ,  H01L29/7833

摘要： A method for etching a polysilicon gate structure in a plasma etch chamber is provided. The method initiates with defining a pattern protecting a polysilicon film to be etched. Then, a plasma is generated. Next, substantially all of the polysilicon film that is unprotected is etched. Then, a silicon containing gas is introduced and a remainder of the polysilicon film is etched while introducing a silicon containing gas. An etch chamber configured to introduce a silicon containing gas during an etch process is also provided.

摘要翻译： 提供了一种在等离子体蚀刻室中蚀刻多晶硅栅极结构的方法。 该方法开始于限定保护待蚀刻的多晶硅膜的图案。 然后，产生等离子体。 接下来，蚀刻大部分未被保护的多晶硅膜。 然后，引入含硅气体，并且在引入含硅气体的同时蚀刻剩余的多晶硅膜。 还提供了一种被配置为在蚀刻工艺期间引入含硅气体的蚀刻室。

公开(公告)号：US06649996B2

公开(公告)日：2003-11-18

申请号：US09795944

申请日：2001-02-27

申请人： Alan J. Miller ,  Fandayani Soesilo

发明人： Alan J. Miller ,  Fandayani Soesilo

IPC分类号： H01L2900

CPC分类号： H01L27/10861 ,  H01L21/30604 ,  H01L21/308 ,  H01L21/32 ,  H01L21/76229 ,  H01L21/76232

摘要： A method or process for etching a trench in an IC structure is disclosed. The IC structure might be comprised of a plurality of different component materials arranged proximate to one another, all of which need to be etched down to a target level. A first etching chemistry is applied which preferentially etches a one type of component material. A second etching chemistry is applied which preferentially etches another type of component material. The method or process toggles back and forth between the etching chemistries until the target level is reached. The toggling techniques serves to maintain the profiles of the different component materials. One component material might also be embedded, as a collar or otherwise, around another component material. The toggling technique can serve to modulate the height, level, or shape of one material relative to another material. The toggling steps can be performed in situ or ex situ. The toggling technique can be used with different mask materials, including a photoresist or a hardmask over the IC structure.

摘要翻译： 公开了一种用于蚀刻IC结构中的沟槽的方法或工艺。 IC结构可以由彼此靠近布置的多个不同的组件材料组成，所有这些组件材料都需要被蚀刻到目标水平。 应用优先蚀刻一种类型的组分材料的第一蚀刻化学品。 应用第二蚀刻化学品，其优先蚀刻另一种类型的组分材料。 该方法或工艺在蚀刻化学物质之间来回切换，直到达到目标水平。 切换技术用于维护不同组件材料的轮廓。 围绕另一种组分材料也可以将一种组分材料作为套环或其它材料嵌入。 切换技术可用于调制一种材料相对于另一种材料的高度，水平或形状。 切换步骤可以原位或非原位进行。 切换技术可以与不同的掩模材料一起使用，包括在IC结构上的光致抗蚀剂或硬掩模。

公开(公告)号：US06287974B1

公开(公告)日：2001-09-11

申请号：US09346563

申请日：1999-06-30

申请人： Alan J. Miller

发明人： Alan J. Miller

IPC分类号： H01L21302

CPC分类号： H01L21/3065 ,  H01L21/76229 ,  H01L21/76232

摘要： A method of etching a trench in a silicon layer is disclosed. The silicon layer being disposed below an oxide layer. The oxide layer being disposed below a nitride layer. The nitride layer being disposed below a photoresist mask. The etching taking place in a plasma processing chamber. The method includes flowing a first etchant source gas into the plasma processing chamber, forming a first plasma from the first etchant source gas and etching substantially through the nitride layer with the first plasma. The method further includes flowing a second etchant source gas into the plasma processing chamber, forming a second plasma from the second etchant source gas and etching through the oxide layer and a portion of the silicon layer with the second plasma wherein the etching with the second plasma is extended for a period of time after the pad oxide layer is etched through. The period of time being sufficiently long to form an effective top-rounded feature on a portion of the trench.

摘要翻译： 公开了一种在硅层中蚀刻沟槽的方法。 硅层设置在氧化物层的下方。 氧化物层设置在氮化物层的下方。 氮化物层设置在光致抗蚀剂掩模下方。 蚀刻发生在等离子体处理室中。 该方法包括将第一蚀刻剂源气体流入等离子体处理室，从第一蚀刻剂源气体形成第一等离子体，并用第一等离子体基本上蚀刻氮化物层。 该方法还包括将第二蚀刻剂源气体流入等离子体处理室，从第二蚀刻剂源气体形成第二等离子体，并用第二等离子体蚀刻通过氧化物层和硅层的一部分，其中用第二等离子体 在衬垫氧化层被蚀刻后延伸一段时间。 该时间段足够长以在沟槽的一部分上形成有效的顶部圆形特征。

公开(公告)号：US06218309B1

公开(公告)日：2001-04-17

申请号：US09410365

申请日：1999-09-30

申请人： Alan J. Miller ,  Vahid Vahedi

发明人： Alan J. Miller ,  Vahid Vahedi

IPC分类号： H01L21311

CPC分类号： H01L21/3065 ,  H01L21/76229 ,  H01L21/76232

摘要： A method of etching a trench in a silicon layer is disclosed. The silicon layer is disposed below a hard mask layer having a plurality of patterned openings. The etching takes place in a plasma processing chamber. The method includes flowing a first etchant source gas into the plasma processing chamber, forming a first plasma from the first etchant source gas and etching through a first portion of the silicon layer with the first plasma at a first etch rate. The first etch rate being sufficiently slow to form an effective top-rounded attribute in a portion of the trench. The method further includes flowing a second etchant source gas into the plasma processing chamber, forming a second plasma from the second etchant source gas and etching through a second portion of the silicon layer with the second plasma, wherein the etching with the second plasma extends the trench into the silicon layer without unduly damaging the top rounded attribute.

摘要翻译： 公开了一种在硅层中蚀刻沟槽的方法。 硅层设置在具有多个图案化开口的硬掩模层的下方。 蚀刻发生在等离子体处理室中。 该方法包括将第一蚀刻剂源气体流入等离子体处理室，从第一蚀刻剂源气体形成第一等离子体，并以第一蚀刻速率用第一等离子体蚀刻硅层的第一部分。 第一蚀刻速率足够慢以在沟槽的一部分中形成有效的顶圆属性。 该方法还包括使第二蚀刻剂源气体流入等离子体处理室，从第二蚀刻剂源气体形成第二等离子体，并用第二等离子体蚀刻硅层的第二部分，其中用第二等离子体进行的蚀刻将 沟槽进入硅层，而不会不适当地损坏顶部圆形属性。

公开(公告)号：US06432832B1

公开(公告)日：2002-08-13

申请号：US09346562

申请日：1999-06-30

申请人： Alan J. Miller ,  Yosias Melaku

发明人： Alan J. Miller ,  Yosias Melaku

IPC分类号： H01L2176

CPC分类号： H01L21/76232 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/76229 ,  Y10S438/978

摘要： A method of performing a shallow trench isolation etch in a silicon layer of a layer stack is disclosed. The layer stack includes a silicon layer being disposed below a pad oxide layer, the pad oxide being disposed below a nitride layer, and the nitride layer being disposed below a photoresist mask. The etching takes place in a plasma processing chamber. The method includes flowing a first etchant source gas into the plasma processing chamber, forming a first plasma from the first etchant source gas, and etching through the nitride layer with the first plasma. The method further includes flowing a second etchant source gas into the plasma processing chamber, forming a second plasma from the second etchant source gas, and substantially removing the photoresist mask with the second plasma, wherein a substantial portion of the photoresist mask is removed from above the nitride layer before the silicon layer. The method additionally includes flowing a third etchant source gas into the plasma processing chamber, forming a third plasma from the third etchant source gas, and etching through the pad oxide layer and substantially stopping on the silicon layer. The method also includes flowing a fourth etchant source gas into the plasma processing chamber, forming a fourth plasma from the fourth etchant source gas, and etching through the silicon layer with the fourth plasma, the etching forming a narrow feature and a wide feature in the silicon layer, and wherein a first profile angle of the narrow feature is substantially equal to a second profile angle of the wide feature.

摘要翻译： 公开了一种在层叠层的硅层中进行浅沟槽隔离蚀刻的方法。 所述层叠层包括设置在焊盘氧化物层下方的硅层，所述焊盘氧化物设置在氮化物层下方，并且所述氮化物层设置在光致抗蚀剂掩模下方。 蚀刻发生在等离子体处理室中。 该方法包括将第一蚀刻剂源气体流入等离子体处理室，从第一蚀刻剂源气体形成第一等离子体，并用第一等离子体蚀刻通过氮化物层。 该方法还包括使第二蚀刻剂源气体流入等离子体处理室，从第二蚀刻剂源气体形成第二等离子体，并用第二等离子体基本上去除光致抗蚀剂掩模，其中光致抗蚀剂掩模的大部分从上面去除 在硅层之前的氮化物层。 该方法还包括将第三蚀刻剂源气体流入等离子体处理室，从第三蚀刻剂源气体形成第三等离子体，以及蚀刻通过焊盘氧化物层并基本停止在硅层上。 该方法还包括将第四蚀刻剂源气体流入等离子体处理室，从第四蚀刻剂源气体形成第四等离子体，并用第四等离子体蚀刻穿过硅层，蚀刻形成窄特征，并且在 硅层，并且其中窄特征的第一轮廓角基本上等于宽特征的第二轮廓角。

公开(公告)号：US6162910A

公开(公告)日：2000-12-19

申请号：US201198

申请日：1998-11-30

申请人： John K. Jenkins ,  Alan J. Miller

发明人： John K. Jenkins ,  Alan J. Miller

IPC分类号： C07H19/01 ,  C07H1/00 ,  A61K31/715

CPC分类号： C07H19/01

摘要： Process for preparing a lipophilic oligosaccharide antibiotic containing a nitro group using oxidizing agents and catalysts such as cobalt, manganese and copper having an oxidation state of +2 are disclosed.

摘要翻译： 公开了使用氧化剂和氧化态为+2的催化剂例如钴，锰和铜制备含有硝基的亲脂寡糖抗生素的方法。

公开(公告)号：US08609548B2

公开(公告)日：2013-12-17

申请号：US13188174

申请日：2011-07-21

申请人： Qing Xu ,  Camelia Rusu ,  Jaroslaw W. Winniczek ,  Frank Y. Lin ,  Alan J. Miller

发明人： Qing Xu ,  Camelia Rusu ,  Jaroslaw W. Winniczek ,  Frank Y. Lin ,  Alan J. Miller

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L21/30655 ,  H01J37/32082 ,  H01J37/32449 ,  H01L21/76802 ,  H01L21/76898

摘要： A method for etching features into an etch layer in a plasma processing chamber, comprising a plurality of cycles is provided. Each cycle comprises a deposition phase and an etching phase. The deposition phase comprises providing a flow of deposition gas, forming a plasma from the deposition gas in the plasma processing chamber, providing a first bias during the deposition phase to provide an anisotropic deposition, and stopping the flow of the deposition gas into the plasma processing chamber. The etching phase, comprises providing a flow of an etch gas, forming a plasma from the etch gas in the plasma processing chamber, providing a second bias during the etch phase, wherein the first bias is greater than the second bias, and stopping the flow of the etch gas into the plasma processing chamber.

摘要翻译： 提供了一种用于将特征蚀刻到等离子体处理室中的蚀刻层的方法，其包括多个循环。 每个循环包括沉积阶段和蚀刻阶段。 沉积阶段包括提供沉积气体流，从等离子体处理室中的沉积气体形成等离子体，在沉积阶段提供第一偏压以提供各向异性沉积，并停止沉积气体流入等离子体处理 房间。 蚀刻阶段包括提供蚀刻气体流，从等离子体处理室中的蚀刻气体形成等离子体，在蚀刻阶段期间提供第二偏压，其中第一偏压大于第二偏压，并停止流动 的蚀刻气体进入等离子体处理室。