Semiconductor structure having blocks connected by nanowires
    2.
    发明授权
    Semiconductor structure having blocks connected by nanowires 有权
    具有通过纳米线连接的块的半导体结构

    公开(公告)号:US08384069B2

    公开(公告)日:2013-02-26

    申请号:US12782364

    申请日:2010-05-18

    Abstract: A semiconductor structure includes a support and at least one block provided on the support. The block includes a stack including alternating layers based on a first semiconductor material and layers based on a second semiconductor material different from the first material, the layers presenting greater dimensions than layers such that the stack has a lateral tooth profile and a plurality of spacers filling the spaces formed by the tooth profile, the spacers being made of a third material different from the first material such that each of the lateral faces of the block presents alternating lateral bands based on the first material and alternating lateral bands based on the third material. At least one of the lateral faces of the block is partially coated with a material promoting the growth of nanotubes or nanowires, the catalyst material exclusively coating the lateral bands based on the first material or exclusively coating the lateral bands based on the third material.

    Abstract translation: 半导体结构包括支撑件和设置在支撑件上的至少一个块。 该块包括基于第一半导体材料的交替层和基于与第一材料不同的第二半导体材料的层的堆叠,所述层具有比层更大的尺寸,使得堆叠具有侧向齿形和多个间隔物填充 由所述齿形形成的空间,所述间隔件由不同于所述第一材料的第三材料制成,使得所述块的每个侧面基于所述第一材料呈现交替的横向带,并且基于所述第三材料呈交替的横向带。 块体的至少一个侧面部分地涂覆有促进纳米管或纳米线生长的材料,催化剂材料仅基于第一材料专门涂覆侧向带,或仅基于第三材料涂覆侧向带。

    Support for a thin element, quartz microbalance including such a support and a sample holder including such a support
    3.
    发明授权
    Support for a thin element, quartz microbalance including such a support and a sample holder including such a support 有权
    支持薄元件,包括这种支撑件的石英微量天平和包括这种支撑件的样品架

    公开(公告)号:US08695403B2

    公开(公告)日:2014-04-15

    申请号:US12842969

    申请日:2010-07-23

    CPC classification number: G01G3/13 G01G3/165

    Abstract: A support for a thin element in an electrically conducting or semi-conducting material, one face of which is intended to be put into contact with a liquid or gas medium, the support has a first part provided with a central through-passage with a longitudinal axis, said passage including at least one first and one second portion with a different diameter connected to each other through a shoulder, said shoulder being intended for supporting said thin element; a second part penetrating into the passage with the end opposite to the one intended to be exposed to the liquid solution, capable of maintaining the thin element on the shoulder; and a seal between the thin element and the shoulder.

    Abstract translation: 在导电或半导电材料中的薄元件的支撑件,其一个表面旨在与液体或气体介质接触,所述支撑件具有第一部分,该第一部分设置有具有纵向 所述通道包括至少一个具有不同直径的第一和第二部分,所述第一和第二部分通过肩部相互连接,所述肩部用于支撑所述薄元件; 第二部分穿透通道,其端部与旨在暴露于液体溶液的端部相反,能够将薄元件保持在肩部上; 以及薄元件和肩部之间的密封。

    SUPPORT FOR A THIN ELEMENT, QUARTZ MICROBALANCE INCLUDING SUCH A SUPPORT AND A SAMPLE HOLDER INCLUDING SUCH A SUPPORT
    4.
    发明申请
    SUPPORT FOR A THIN ELEMENT, QUARTZ MICROBALANCE INCLUDING SUCH A SUPPORT AND A SAMPLE HOLDER INCLUDING SUCH A SUPPORT 有权
    支持一个薄元素,QUARTZ微软包括这样一个支持和一个样品持有者,包括这样一个支持

    公开(公告)号:US20110024291A1

    公开(公告)日:2011-02-03

    申请号:US12842969

    申请日:2010-07-23

    CPC classification number: G01G3/13 G01G3/165

    Abstract: A support for a thin element in an electrically conducting or semi-conducting material, one face of which is intended to be put into contact with a liquid or gas medium, the support has a first part provided with a central through-passage with a longitudinal axis, said passage including at least one first and one second portion with a different diameter connected to each other through a shoulder, said shoulder being intended for supporting said thin element; a second part penetrating into the passage with the end opposite to the one intended to be exposed to the liquid solution, capable of maintaining the thin element on the shoulder; and a seal between the thin element and the shoulder.

    Abstract translation: 在导电或半导电材料中的薄元件的支撑件,其一个表面旨在与液体或气体介质接触,所述支撑件具有第一部分,该第一部分设置有具有纵向 所述通道包括至少一个具有不同直径的第一和第二部分,所述第一和第二部分通过肩部相互连接,所述肩部用于支撑所述薄元件; 第二部分穿透通道,其端部与旨在暴露于液体溶液的端部相反,能够将薄元件保持在肩部上; 以及薄元件和肩部之间的密封。

    METHOD FOR MANUFACTURING A METAL AND DIELECTRIC NANOSTRUCTURES ELECTRODE FOR COLORED FILTERING IN AN OLED AND METHOD FOR MANUFACTURING AN OLED
    5.
    发明申请
    METHOD FOR MANUFACTURING A METAL AND DIELECTRIC NANOSTRUCTURES ELECTRODE FOR COLORED FILTERING IN AN OLED AND METHOD FOR MANUFACTURING AN OLED 审中-公开
    用于制造用于彩色滤光的金属和电介质纳米结构电极的方法和用于制造OLED的方法

    公开(公告)号:US20110151607A1

    公开(公告)日:2011-06-23

    申请号:US12976265

    申请日:2010-12-22

    CPC classification number: H01L51/0023 H01L51/5203 H01L51/5262

    Abstract: A method for manufacturing an OLED and an electrode for an OLED, said electrode comprising a surface comprising a first dielectric nanostructuration and a second metal nanostructuration, on a substrate, wherein the following successive steps are carried out: a) a metal layer is deposited on a planar surface of a substrate; b) on the metal layer, a dielectric layer comprising said first dielectric nanostructuration which includes cavities which extend from the upper surface of the dielectric layer as far as the upper surface of the metal layer, is prepared; c) the cavities of the first dielectric nanostructuration are at least partially filled with a metal, whereby the second metal nanostructuration is obtained.

    Abstract translation: 一种用于制造OLED的OLED和用于OLED的电极的方法,所述电极包括在衬底上的包括第一介电纳米结构和第二金属纳米结构的表面,其中执行以下连续步骤:a)将金属层沉积在 基板的平面; b)在所述金属层上,制备包括所述第一介电纳米结构的电介质层,所述第一介电纳米结构包括从所述电介质层的上表面延伸至所述金属层的上表面的空腔; c)第一介电纳米结构的空腔至少部分地被金属填充,由此获得第二金属纳米结构。

    SEMICONDUCTOR STRUCTURE AND METHOD FOR PRODUCING A SEMICONDUCTOR STRUCTURE
    6.
    发明申请
    SEMICONDUCTOR STRUCTURE AND METHOD FOR PRODUCING A SEMICONDUCTOR STRUCTURE 有权
    用于生产半导体结构的半导体结构和方法

    公开(公告)号:US20100295024A1

    公开(公告)日:2010-11-25

    申请号:US12782364

    申请日:2010-05-18

    Abstract: A semiconductor structure includes a support and at least one block provided on the support. The block includes a stack including alternating layers based on a first semiconductor material and layers based on a second semiconductor material different from the first material, the layers presenting greater dimensions than layers such that the stack has a lateral tooth profile and a plurality of spacers filling the spaces formed by the tooth profile, the spacers being made of a third material different from the first material such that each of the lateral faces of the block presents alternating lateral bands based on the first material and alternating lateral bands based on the third material. At least one of the lateral faces of the block is partially coated with a material promoting the growth of nanotubes or nanowires, the catalyst material exclusively coating the lateral bands based on the first material or exclusively coating the lateral bands based on the third material.

    Abstract translation: 半导体结构包括支撑件和设置在支撑件上的至少一个块。 该块包括基于第一半导体材料的交替层和基于与第一材料不同的第二半导体材料的层的堆叠,所述层具有比层更大的尺寸,使得堆叠具有侧向齿形和多个间隔物填充 由所述齿形形成的空间,所述间隔件由不同于所述第一材料的第三材料制成,使得所述块的每个侧面基于所述第一材料呈现交替的横向带,并且基于所述第三材料呈交替的横向带。 块体的至少一个侧面部分地涂覆有促进纳米管或纳米线生长的材料,催化剂材料仅基于第一材料专门涂覆侧向带,或仅基于第三材料涂覆侧向带。

    Method for metallizing textured surfaces
    7.
    发明授权
    Method for metallizing textured surfaces 有权
    金属化纹理表面的方法

    公开(公告)号:US09515205B2

    公开(公告)日:2016-12-06

    申请号:US14002854

    申请日:2012-03-05

    Abstract: A method for creating electrically conducting or semiconducting patterns on a textured surface including plural reliefs of amplitude greater than or equal to 100 nanometers, including: preparing a substrate during which at least the textured surface of the substrate is made electrically conducting; coating during which at least one layer of an imprintable material is laid on the textured surface, made electrically conducting, of the substrate; pressing a mold including valleys or protrusions to transfer the valleys or the protrusions of the mold into the imprintable material to form patterns therein; removing the mold while leaving the imprint of the patterns in the imprintable material; exposing the textured surface, made electrically conducting, of the substrate, at a bottom of the patterns; and electrically depositing an electrically conducting or semiconducting material into the patterns to form conducting or semiconducting patterns.

    Abstract translation: 一种用于在纹理表面上形成导电或半导体图案的方法,包括幅度大于或等于100纳米的多个浮雕,包括:制备基板至少将基板的纹理表面制成导电的基板; 涂层,在该涂层期间,至少一层可压印材料铺设在基材的纹理表面上,使其导电; 压制包括谷或突起的模具以将模具的谷或者突起转移到可压印材料中以在其中形成图案; 移除模具,同时将图案的印记留在可压印材料中; 在图案的底部暴露基底的纹理表面,使其导电; 并将导电或半导体材料电沉积到图案中以形成导电或半导体图案。

    METHOD FOR METALLIZING TEXTURED SURFACES
    8.
    发明申请
    METHOD FOR METALLIZING TEXTURED SURFACES 有权
    用于金属化纹理表面的方法

    公开(公告)号:US20140034125A1

    公开(公告)日:2014-02-06

    申请号:US14002854

    申请日:2012-03-05

    Abstract: A method for creating electrically conducting or semiconducting patterns on a textured surface including plural reliefs of amplitude greater than or equal to 100 nanometers, including: preparing a substrate during which at least the textured surface of the substrate is made electrically conducting; coating during which at least one layer of an imprintable material is laid on the textured surface, made electrically conducting, of the substrate; pressing a mold including valleys or protrusions to transfer the valleys or the protrusions of the mold into the imprintable material to form patterns therein; removing the mold while leaving the imprint of the patterns in the imprintable material; exposing the textured surface, made electrically conducting, of the substrate, at a bottom of the patterns; and electrically depositing an electrically conducting or semiconducting material into the patterns to form conducting or semiconducting patterns.

    Abstract translation: 一种用于在纹理表面上形成导电或半导体图案的方法,包括幅度大于或等于100纳米的多个浮雕,包括:制备基板至少将基板的纹理表面制成导电的基板; 涂层,在该涂层期间,至少一层可压印材料铺设在基材的纹理表面上,使其导电; 压制包括谷或突起的模具以将模具的谷或者突起转移到可压印材料中以在其中形成图案; 移除模具,同时将图案的印记留在可压印材料中; 在图案的底部暴露基底的纹理表面,使其导电; 并将导电或半导体材料电沉积到图案中以形成导电或半导体图案。

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