公开(公告)号：US20180269177A1

公开(公告)日：2018-09-20

申请号：US15981957

申请日：2018-05-17

申请人： International Business Machines Corporation

发明人： CHIH-CHAO YANG

IPC分类号： H01L23/00 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L24/80 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02205 ,  H01L2224/02215 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03616 ,  H01L2224/03848 ,  H01L2224/039 ,  H01L2224/05011 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/11009 ,  H01L2224/1141 ,  H01L2224/11428 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11616 ,  H01L2224/11848 ,  H01L2224/119 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13184 ,  H01L2224/80004 ,  H01L2224/80203 ,  H01L2224/80895 ,  H01L2224/81203 ,  H01L2224/81895 ,  H01L2225/06524 ,  H01L2924/00015 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/0529 ,  H01L2224/45099 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/1147 ,  H01L2224/114 ,  H01L2224/0347 ,  H01L2224/034 ,  H01L2224/03009 ,  H01L2224/131 ,  H01L2924/014

摘要： Methods and semiconductor devices for bonding a first semiconductor device to a second semiconductor device include forming metal pads including a textured microstructure having a columnar grain structure at substantially the same angular direction from the top surface to the bottom surface. The textured crystalline microstructures enables the use of low temperatures and low pressures to effect bonding of the metal pads. Also described are methods of packaging and semiconductor devices.

公开(公告)号：US09985013B2

公开(公告)日：2018-05-29

申请号：US14860164

申请日：2015-09-21

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chien-Hsun Lee ,  Jung Wei Cheng ,  Hao-Cheng Hou ,  Tsung-Ding Wang ,  Jiun Yi Wu ,  Ming-Chung Sung

IPC分类号： H01L21/48 ,  H01L23/00 ,  H01L25/00 ,  H01L23/498 ,  H01L21/56 ,  H01L25/10 ,  H01L25/065 ,  H01L23/31

CPC分类号： H01L25/50 ,  H01L21/4853 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/1184 ,  H01L2224/11848 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/45099

摘要： A method includes coining solder balls of a bottom package, wherein top surfaces of the solder balls are flattened after the step of coining. The solder balls are molded in a molding material. The top surfaces of the solder balls are through trenches in the molding material.

公开(公告)号：US09824993B2

公开(公告)日：2017-11-21

申请号：US15202700

申请日：2016-07-06

申请人： SHINKO ELECTRIC INDUSTRIES CO., LTD.

发明人： Sumihiro Ichikawa

IPC分类号： H01L23/48 ,  H01L23/00 ,  H01L25/065 ,  H01L23/31 ,  H01L23/29 ,  H01L23/498 ,  H01L25/00

CPC分类号： H01L24/17 ,  H01L23/295 ,  H01L23/3142 ,  H01L23/49811 ,  H01L23/49833 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/036 ,  H01L2224/0401 ,  H01L2224/111 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1147 ,  H01L2224/1184 ,  H01L2224/11845 ,  H01L2224/11848 ,  H01L2224/119 ,  H01L2224/13005 ,  H01L2224/13014 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1319 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14131 ,  H01L2224/14136 ,  H01L2224/14179 ,  H01L2224/14505 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/2929 ,  H01L2224/29387 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81065 ,  H01L2224/81143 ,  H01L2224/81193 ,  H01L2224/81856 ,  H01L2224/81862 ,  H01L2224/81895 ,  H01L2224/81907 ,  H01L2224/81986 ,  H01L2224/83104 ,  H01L2224/83862 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06565 ,  H01L2225/06593 ,  H01L2924/00015 ,  H01L2924/14 ,  H05K3/305 ,  H05K3/328 ,  H05K3/368 ,  H01L2224/81121 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/05442 ,  H01L2224/034 ,  H01L2224/113 ,  H01L2924/00012 ,  H01L2224/81203 ,  H01L2924/00

摘要： A packaging structure includes a first substrate including a first metal terminal and a first protruding resin portion formed at a first surface; a second substrate including a second metal terminal and a second protruding resin portion formed at a second surface, the second metal terminal being made of the same kind of metal as the first metal terminal; and a sealing portion filled between the first surface of the first substrate and the second surface of the second substrate, the first metal terminal and the second metal terminal being directly bonded with each other, the first protruding resin portion and the second protruding resin portion being directly bonded with each other, each of the first protruding resin portion and the second protruding resin portion being made of a resin material that does not include fillers, and the sealing portion being made of a resin material including fillers.

公开(公告)号：US20170053858A1

公开(公告)日：2017-02-23

申请号：US14831528

申请日：2015-08-20

申请人： INTEL CORPORATION

发明人： Jan Krajniak ,  Carl L. Deppisch ,  Kabirkumar J. Mirpuri ,  Hongjin Jiang ,  Fay Hua ,  Yuying Wei ,  Beverly J. Canham ,  Jiongxin Lu ,  Mukul P. Renavikar

IPC分类号： H01L23/498 ,  B23K1/20 ,  B23K35/02 ,  H01L21/48 ,  B23K35/26 ,  B23K35/30 ,  H01L23/00 ,  B23K1/00 ,  B23K35/36

CPC分类号： H01L23/49833 ,  B23K1/0016 ,  B23K3/0623 ,  B23K35/025 ,  B23K35/262 ,  B23K35/264 ,  B23K35/3006 ,  B23K35/302 ,  B23K35/3613 ,  H01L21/4867 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/10126 ,  H01L2224/11334 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/13005 ,  H01L2224/13017 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13311 ,  H01L2224/1339 ,  H01L2224/13565 ,  H01L2224/136 ,  H01L2224/1369 ,  H01L2224/1601 ,  H01L2224/16058 ,  H01L2224/16227 ,  H01L2224/81594 ,  H01L2224/816 ,  H01L2224/81611 ,  H01L2224/8169 ,  H01L2224/81815 ,  H01L2224/81862 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15313 ,  H01L2924/15331 ,  H01L2924/20104 ,  H01L2924/20105 ,  H01L2924/20106 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/3841 ,  H05K1/141 ,  H05K3/363 ,  H05K2201/10378 ,  H05K2201/10734 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/01083 ,  H01L2924/01028 ,  H01L2924/01025 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01038 ,  H01L2924/01024 ,  H01L2924/01022 ,  H01L2924/05341 ,  H01L2924/0665 ,  H01L2924/00012

摘要： Embodiments herein may relate to a patch on interposer (PoINT) architecture. In embodiments, the PoINT architecture may include a plurality of solder joints between a patch and an interposer. The solder joints may include a relatively high temperature solder ball and a relatively low temperature solder paste that at least partially surrounds the solder ball. Other embodiments may be described and/or claimed.

摘要翻译： 这里的实施例可以涉及内插器（PoINT）架构上的补丁。 在实施例中，PoINT架构可以包括贴片和插入器之间的多个焊接点。 焊点可以包括相对高温的焊球和至少部分地围绕焊料球的相对低温的焊膏。 可以描述和/或要求保护其他实施例。

公开(公告)号：US20170018524A1

公开(公告)日：2017-01-19

申请号：US15062035

申请日：2016-03-04

申请人： FUJI ELECTRIC CO., LTD.

发明人： Norihiro NASHIDA ,  Hideyo NAKAMURA ,  Yoko NAKAMURA

IPC分类号： H01L23/00 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L24/29 ,  H01L21/486 ,  H01L23/3121 ,  H01L23/3735 ,  H01L23/40 ,  H01L23/42 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/071 ,  H01L25/115 ,  H01L25/50 ,  H01L2224/11848 ,  H01L2224/13294 ,  H01L2224/13339 ,  H01L2224/13347 ,  H01L2224/16227 ,  H01L2224/27848 ,  H01L2224/29 ,  H01L2224/29139 ,  H01L2224/29147 ,  H01L2224/29294 ,  H01L2224/29339 ,  H01L2224/29347 ,  H01L2224/32225 ,  H01L2224/32227 ,  H01L2224/73253 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/8184 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/8384 ,  H01L2224/92242 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/81

摘要： A semiconductor device includes a plurality of semiconductor units each including a laminated substrate formed by laminating an insulating board and a circuit board and a semiconductor element joined to the circuit board using a joining material which irreversibly makes a phase transition into a solid-phase state. In addition, the semiconductor device may include a base plate to which each of the plurality of semiconductor units is joined using solder and a connection unit which electrically connects the plurality of semiconductor units in parallel.

摘要翻译： 半导体器件包括多个半导体单元，每个半导体单元包括通过层叠绝缘板和电路板而形成的层叠基板和使用不可逆地使相变成固相状态的接合材料接合到电路板的半导体元件。 此外，半导体器件可以包括使用焊料连接多个半导体单元中的每一个的基板和并联电连接多个半导体单元的连接单元。

公开(公告)号：US09450061B2

公开(公告)日：2016-09-20

申请号：US14269213

申请日：2014-05-05

申请人： HIMAX TECHNOLOGIES LIMITED

发明人： Chiu-Shun Lin

IPC分类号： H01L29/43 ,  H01L23/00

CPC分类号： H01L29/43 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03614 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05647 ,  H01L2224/1134 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/1181 ,  H01L2224/1182 ,  H01L2224/11825 ,  H01L2224/11848 ,  H01L2224/13006 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13164 ,  H01L2224/13552 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/13582 ,  H01L2224/13611 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2924/01028 ,  H01L2924/0105 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/01074

摘要： A metal bump structure for use in a driver IC includes a passivation layer disposed on a metal pad and defining a recess on the metal pad, an adhesion layer in said recess, on the metal pad and on the passivation layer, a metal bump disposed in the recess and completely covering the adhesion layer, and a capping layer disposed on the metal bump and completely covering the metal bump so that the metal bump is not exposed to an ambient atmosphere.

摘要翻译： 用于驱动器IC的金属凸块结构包括设置在金属焊盘上并在金属焊盘上限定凹陷的钝化层，在所述凹槽中的粘附层，金属焊盘和钝化层上的金属凸块， 所述凹部并且完全覆盖所述粘合层，以及覆盖层，设置在所述金属凸块上并且完全覆盖所述金属凸块，使得所述金属凸块不暴露于环境气氛。

公开(公告)号：US09224715B2

公开(公告)日：2015-12-29

申请号：US14625325

申请日：2015-02-18

申请人： Micron Technology, Inc.

发明人： Jaspreet S. Gandhi

IPC分类号： H01L21/44 ,  H01L23/00 ,  H01L23/498 ,  H01L23/31

CPC分类号： H01L24/81 ,  H01L23/3142 ,  H01L23/3157 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/06181 ,  H01L2224/10145 ,  H01L2224/1182 ,  H01L2224/11824 ,  H01L2224/11848 ,  H01L2224/13022 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/136 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/1369 ,  H01L2224/16145 ,  H01L2224/16238 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81355 ,  H01L2224/81815 ,  H01L2224/81911 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/3651 ,  H01L2924/00012 ,  H01L2924/01016 ,  H01L2924/01014 ,  H01L2924/01047 ,  H01L2224/05552 ,  H01L2924/00

摘要： Semiconductor assemblies, structures, and methods of fabrication are disclosed. A coating is formed on an electrically conductive pillar. The coating, which may be formed from at least one of a silane material and an organic solderability protectant material, may bond to a conductive material of the electrically conductive pillar and, optionally, to other metallic materials of the electrically conductive pillar. The coating may also bond to substrate passivation material, if present, or to otherwise-exposed surfaces of a substrate and a bond pad. The coating may be selectively formed on the conductive material. Material may not be removed from the coating after formation thereof and before reflow of the solder for die attach. The coating may isolate at least the conductive material from solder, inhibiting solder wicking or slumping along the conductive material and may enhance adhesion between the resulting bonded conductive element and an underfill material.

摘要翻译： 公开了半导体组件，结构和制造方法。 在导电柱上形成涂层。 可以由硅烷材料和有机可焊性保护剂材料中的至少一种形成的涂层可以结合到导电柱的导电材料和任选地粘合到导电柱的其它金属材料。 涂层还可以结合到基底钝化材料（如果存在）上，或者粘合到基底和接合垫的其它暴露表面。 可以在导电材料上选择性地形成涂层。 在其形成之后并且在用于管芯附着的焊料的回流之前，材料可能不会从涂层中去除。 涂层可以至少将导电材料与焊料隔离开来，阻止焊料芯吸或沿导电材料塌陷，并且可以增强所得到的粘合的导电元件和底部填充材料之间的粘附。

公开(公告)号：US09165850B2

公开(公告)日：2015-10-20

申请号：US14525682

申请日：2014-10-28

申请人： International Business Machines Corporation

发明人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter ,  Timothy D. Sullivan

IPC分类号： H01L23/31 ,  H01L23/00 ,  H01L23/525

CPC分类号： H01L23/3114 ,  H01L23/3192 ,  H01L23/525 ,  H01L23/562 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L2224/02125 ,  H01L2224/0231 ,  H01L2224/02331 ,  H01L2224/0236 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05575 ,  H01L2224/05618 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05671 ,  H01L2224/06102 ,  H01L2224/11848 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/07025 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/1531 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2224/05552 ,  H01L2924/00

摘要： Structures and methods of making a flip chip package that employ polyimide pads of varying heights at a radial distance from a center of an integrated circuit (IC) chip for a flip chip package. The polyimide pads may be formed under electrical connectors, which connect the IC chip to a chip carrier of the flip chip package, so that electrical connectors formed on polyimide pads of greater height are disposed at a greater radial distance from the center of the IC chip, while electrical connectors formed on polyimide pads of a lesser height are disposed more proximately to the center of the IC chip. Electrical connectors of a greater relative height to the IC chip's surface may compensate for a gap, produced by heat-induced warpage during the making of the flip chip package, that separates the electrical connectors on the IC chip from flip chip attaches on the chip carrier.

摘要翻译： 制造倒装芯片封装的结构和方法，其采用距离用于倒装芯片封装的集成电路（IC）芯片的中心的径向距离的不同高度的聚酰亚胺焊盘。 聚酰亚胺焊盘可以形成在电连接器下面，电连接器将IC芯片连接到倒装芯片封装的芯片载体，使得形成在更高高度的聚酰亚胺焊盘上的电连接器设置在离IC芯片中心更大的径向距离处 而形成在较低高度的聚酰亚胺焊盘上的电连接器更靠近IC芯片的中心设置。 与IC芯片表面相对高的电连接器可以补偿在制造倒装芯片封装期间由热引起的翘曲产生的间隙，其将IC芯片上的电连接器与芯片载体上的倒装芯片分离 。

公开(公告)号：US09129840B2

公开(公告)日：2015-09-08

申请号：US14470076

申请日：2014-08-27

申请人： FUJI ELECTRIC CO., LTD.

发明人： Norihiro Nashida

IPC分类号： H01L23/00 ,  H05K3/32 ,  H05K3/40 ,  H01L23/373 ,  H01L23/433 ,  H01L23/498 ,  H01L25/07 ,  H05K3/34

CPC分类号： H01L24/09 ,  H01L23/3735 ,  H01L23/4334 ,  H01L23/49811 ,  H01L23/49833 ,  H01L24/01 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/80 ,  H01L24/81 ,  H01L24/92 ,  H01L25/072 ,  H01L2224/0401 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11848 ,  H01L2224/13017 ,  H01L2224/13019 ,  H01L2224/13147 ,  H01L2224/13294 ,  H01L2224/13339 ,  H01L2224/13347 ,  H01L2224/13369 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/16058 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1623 ,  H01L2224/16238 ,  H01L2224/16501 ,  H01L2224/16505 ,  H01L2224/291 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2224/81048 ,  H01L2224/81065 ,  H01L2224/81091 ,  H01L2224/81095 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81359 ,  H01L2224/81385 ,  H01L2224/8184 ,  H01L2224/92242 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/10272 ,  H01L2924/1203 ,  H01L2924/12032 ,  H01L2924/1304 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/20105 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20108 ,  H01L2924/35 ,  H01L2924/351 ,  H05K3/32 ,  H05K3/3436 ,  H05K3/4015 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/01 ,  H01L2224/80 ,  H01L2924/00012

摘要： When a conductive post is bonded to a bonding target member such as a semiconductor chip or an insulating substrate with conductive patterns by using metal nanoparticles, a strong bonding layer can be obtained by forming a bottom surface of the distal end of the conductive post in a concave shape.

摘要翻译： 当通过使用金属纳米颗粒将导电柱结合到诸如半导体芯片或具有导电图案的绝缘基板的接合目标构件时，可以通过将导电柱的远端的底表面形成在 凹形。

公开(公告)号：US09105625B2

公开(公告)日：2015-08-11

申请号：US13568574

申请日：2012-08-07

申请人： Satoru Wakiyama ,  Hiroshi Ozaki

发明人： Satoru Wakiyama ,  Hiroshi Ozaki

IPC分类号： H01L23/48 ,  H01L23/498 ,  H01L27/146 ,  H01L23/00 ,  H01L21/56

CPC分类号： H01L24/81 ,  H01L21/563 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L25/50 ,  H01L27/14618 ,  H01L27/14683 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/1134 ,  H01L2224/11416 ,  H01L2224/11436 ,  H01L2224/11825 ,  H01L2224/11848 ,  H01L2224/13019 ,  H01L2224/13076 ,  H01L2224/13147 ,  H01L2224/1319 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/13655 ,  H01L2224/16238 ,  H01L2224/16503 ,  H01L2224/2919 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/8102 ,  H01L2224/81193 ,  H01L2224/81355 ,  H01L2224/81411 ,  H01L2224/81413 ,  H01L2224/81805 ,  H01L2224/8181 ,  H01L2224/81815 ,  H01L2224/81951 ,  H01L2224/83104 ,  H01L2224/83191 ,  H01L2224/83862 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/15321 ,  H01L2924/15788 ,  H01L2924/01083 ,  H01L2924/01049 ,  H01L2924/00012 ,  H01L2224/11 ,  H01L2224/27416 ,  H01L2224/27436 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor apparatus, including: a semiconductor component; a Cu stud bump that is formed on the semiconductor component; and a solder bump configured to electrically connect to the Cu stud bump.

摘要翻译： 一种半导体装置，包括：半导体元件; 形成在所述半导体部件上的Cu凸块; 以及被配置为电连接到所述Cu柱凸块的焊料凸块。