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12 条记录 (耗时 0.012 秒)

    Packaging structure
    2.
    发明授权
    Packaging structure 有权
    包装结构

    公开(公告)号：US07638875B2

    公开(公告)日：2009-12-29

    申请号：US11733783

    申请日：2007-04-11

    申请人： Chia-Wen Chiang

    发明人： Chia-Wen Chiang

    IPC分类号： H01L23/12

    CPC分类号： H01L23/50 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/5389 ,  H01L23/642 ,  H01L23/645 ,  H01L25/0657 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2924/01078 ,  H01L2924/15311

    摘要： A packaging structure including an interposer structure, a first electronic component, and a second electronic component is provided. The interposer structure includes a first dielectric layer, a plurality of contacts, a capacitive element, and an interconnection. The contacts are disposed on the upper and lower surfaces of the first dielectric layer and the capacitive element, which comprises two conductive layers and a second dielectric layer located among the layers, is embedded into the first dielectric layer. And the interconnection is embedded into the first dielectric layer, while the capacitive element electrically connects to the corresponding contacts through the interconnection. The first and the second electronic components are disposed respectively on the upper and bottom sides of the interposer structure and electrically connected to the corresponding contacts.

    摘要翻译： 提供了包括插入件结构，第一电子部件和第二电子部件的包装结构。 插入器结构包括第一电介质层，多个触点，电容元件和互连。 触点设置在第一电介质层的上表面和下表面上，并且包含两层导电层和位于层之间的第二电介质层的电容元件被嵌入到第一电介质层中。 并且互连嵌入到第一介电层中，而电容元件通过互连电连接到相应的触点。 第一和第二电子部件分别设置在插入器结构的上侧和下侧，并电连接到相应的触头。

    Packaging of SMD light emitting diodes
    3.
    发明申请
    Packaging of SMD light emitting diodes 失效
    SMD发光二极管封装

    公开(公告)号：US20060289888A1

    公开(公告)日：2006-12-28

    申请号：US11166655

    申请日：2005-06-25

    申请人： Chia-Wen Chiang

    发明人： Chia-Wen Chiang

    IPC分类号： H01L33/00

    CPC分类号： H01L33/486 ,  H01L33/62 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/00

    摘要： An SMD LED package with superior thermal dissipation capability is provided. The SMD LED package comprises a supporting block with circuit patterns and at least one LED attached to the supporting block. Wherein, circuit patterns of holes/vias, insulating layers, and conducting traces/pads are formed on and in the supporting block. The SMD LED packages can be further assembled to from a light module that allows emitted lights to travel in parallel with the mounting surface. The SMD manufacturing process is a mature production process and thus easy for mass production. Single or plural LED chips are mounted on a thermal conducting block that is disposed with patterns of conducting traces/pads and isolating dielectric layers. The side emitting characteristics of the present invention offers the advantage of reflecting and mixing the emitted lights to meet the desired chromaticity.

    摘要翻译： 提供了具有出色散热能力的SMD LED封装。 SMD LED封装包括具有电路图案的支撑块和附接到支撑块的至少一个LED。 其中，孔/通孔，绝缘层和导电迹线/焊盘的电路图案形成在支撑块上和支撑块中。 SMD LED封装可以进一步组装到一个光模块上，该模块允许发射的光与安装表面平行行进。 SMD制造工艺是一个成熟的生产工艺，因此易于批量生产。 单个或多个LED芯片安装在导热块上，导热块设置有导电迹线/焊盘和隔离电介质层的图案。 本发明的侧面发射特征提供了反射和混合发射的光以满足期望的色度的优点。

    Capacitor device and method for manufacturing the same
    4.
    发明授权
    Capacitor device and method for manufacturing the same 有权
    电容器及其制造方法

    公开(公告)号：US07960773B2

    公开(公告)日：2011-06-14

    申请号：US12364543

    申请日：2009-02-03

    申请人： Shu-Ming Chang ,  Chia-Wen Chiang

    发明人： Shu-Ming Chang ,  Chia-Wen Chiang

    IPC分类号： H01L51/05

    CPC分类号： H01L23/642 ,  H01L23/481 ,  H01L23/50 ,  H01L25/0657 ,  H01L28/91 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2224/05599

    摘要： This invention provides a capacitor device with a high dielectric constant material and multiple vertical electrode plates. The capacitor devices can be directly fabricated on a wafer with low temperature processes so as to be integrated with active devices formed on the wafer. This invention also forms vertical conducting lines in the capacitor devices using the through-silicon-via technology to facilitate the three-dimensional stacking of the capacitor devices.

    摘要翻译： 本发明提供具有高介电常数材料和多个垂直电极板的电容器装置。 电容器器件可以直接制造在具有低温工艺的晶片上，以便与形成在晶片上的有源器件集成。 本发明还在电容器器件中使用穿硅通孔技术形成垂直导线，以促进电容器器件的三维堆叠。

    PACKAGING STRUCTURE AND FABRICATING METHOD THEREOF
    5.
    发明申请
    PACKAGING STRUCTURE AND FABRICATING METHOD THEREOF 有权
    包装结构及其制作方法

    公开(公告)号：US20080061427A1

    公开(公告)日：2008-03-13

    申请号：US11733783

    申请日：2007-04-11

    申请人： Chia-Wen Chiang

    发明人： Chia-Wen Chiang

    IPC分类号： H01L23/12 ,  H01L21/00

    CPC分类号： H01L23/50 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/5389 ,  H01L23/642 ,  H01L23/645 ,  H01L25/0657 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2924/01078 ,  H01L2924/15311

    摘要： A packaging structure including an interposer structure, a first electronic component, and a second electronic component is provided. The interposer structure includes a first dielectric layer, a plurality of contacts, a capacitive element, and an interconnection. The contacts are disposed on the upper and lower surfaces of the first dielectric layer and the capacitive element, which comprises two conductive layers and a second dielectric layer located among the layers, is embedded into the first dielectric layer. And the interconnection is embedded into the first dielectric layer, while the capacitive element electrically connects to the corresponding contacts through the interconnection. The first and the second electronic components are disposed respectively on the upper and bottom sides of the interposer structure and electrically connected to the corresponding contacts.

    摘要翻译： 提供了包括插入件结构，第一电子部件和第二电子部件的包装结构。 插入器结构包括第一电介质层，多个触点，电容元件和互连。 触点设置在第一电介质层的上表面和下表面上，并且包含两层导电层和位于层之间的第二电介质层的电容元件被嵌入到第一电介质层中。 并且互连嵌入到第一介电层中，而电容元件通过互连电连接到相应的触点。 第一和第二电子部件分别设置在插入器结构的上侧和下侧，并电连接到相应的触头。

    CHIP PACKAGE PROCESS
    6.
    发明申请
    CHIP PACKAGE PROCESS 审中-公开
    芯片包装流程

    公开(公告)号：US20090011545A1

    公开(公告)日：2009-01-08

    申请号：US12195394

    申请日：2008-08-20

    申请人： Chia-Wen Chiang ,  Shou-Lung Chen

    发明人： Chia-Wen Chiang ,  Shou-Lung Chen

    IPC分类号： H01L21/58

    CPC分类号： H01L23/3135 ,  H01L23/3121 ,  H01L23/5389 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2924/00

    摘要： The present invention further provides a chip package process, which includes providing a substrate, disposing a chip on the substrate and forming a buffering compound on the substrate and the chip, wherein the buffering compound covers the chip. The present invention further provides another chip package process, which includes providing a substrate, forming a buffering compound on the substrate and disposing a chip in the buffering compound.

    摘要翻译： 本发明还提供一种芯片封装工艺，其包括提供衬底，在衬底上设置芯片并在衬底和芯片上形成缓冲化合物，其中缓冲化合物覆盖芯片。 本发明还提供了另一种芯片封装工艺，其包括提供衬底，在衬底上形成缓冲化合物并在缓冲化合物中设置芯片。

    STRUCTURE AND PROCESS OF CHIP PACKAGE
    7.
    发明申请
    STRUCTURE AND PROCESS OF CHIP PACKAGE 审中-公开
    芯片包装的结构和工艺

    公开(公告)号：US20070152318A1

    公开(公告)日：2007-07-05

    申请号：US11308658

    申请日：2006-04-19

    申请人： Chia-Wen Chiang ,  Shou-Lung Chen

    发明人： Chia-Wen Chiang ,  Shou-Lung Chen

    IPC分类号： H01L23/24

    CPC分类号： H01L23/3135 ,  H01L23/3121 ,  H01L23/5389 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2924/00

    摘要： The present invention provides a chip package structure, which includes a chip and a buffering compound, wherein the chip has an active surface, a back surface opposite to the active surface and a plurality of side surfaces joining the active surface and the back surface. The buffering compound is disposed at least on the active surface and the back surface, and the buffering compound possesses Young's modulus between 1 MPa and 1 GPa. The buffering compound contributes to reduce the negative effect of thermal stresses and accordingly advance reliability of the chip package structure. In addition, the present invention further provides a chip package process and based on the same reason the process is able to achieve a better production yield by forming a buffering compound surrounding the chip.

    摘要翻译： 本发明提供了一种芯片封装结构，其包括芯片和缓冲化合物，其中芯片具有活性表面，与活性表面相对的背面和连接有效表面和背表面的多个侧表面。 缓冲化合物至少设置在活性表面和背面上，缓冲化合物的杨氏模量在1MPa和1GPa之间。 缓冲化合物有助于减少热应力的负面影响，从而提高芯片封装结构的可靠性。 此外，本发明还提供一种芯片封装工艺，并且基于相同的原因，该工艺能够通过形成围绕芯片的缓冲化合物来实现更好的生产产量。

    Fabricating method of packaging structure
    8.
    发明授权
    Fabricating method of packaging structure 有权
    包装结构的制造方法

    公开(公告)号：US07851322B2

    公开(公告)日：2010-12-14

    申请号：US12607999

    申请日：2009-10-29

    申请人： Chia-Wen Chiang

    发明人： Chia-Wen Chiang

    IPC分类号： H01L21/70

    CPC分类号： H01L23/50 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/5389 ,  H01L23/642 ,  H01L23/645 ,  H01L25/0657 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2924/01078 ,  H01L2924/15311

    摘要： A fabricating method of packaging structure is provided. First, a capacitive element is formed. Then, a first dielectric layer is formed on a first electronic component by performing a build-up process, an interconnection is formed in the first dielectric layer, and a plurality of contacts are formed on the upper and lower surfaces of the first dielectric layer, wherein the capacitive element is embedded in the first dielectric layer during the fabrication of the interconnection and the capacitive element is electrically connected to the corresponding contacts through the interconnection. A second electronic component is disposed on the first dielectric layer, wherein the second electronic component is electrically connected to the corresponding contacts.

    摘要翻译： 提供一种包装结构的制造方法。 首先，形成电容元件。 然后，通过进行积聚处理，在第一电子部件上形成第一电介质层，在第一电介质层中形成互连，在第一电介质层的上表面和下表面上形成多个触点， 其中所述电容元件在所述互连制造期间嵌入在所述第一电介质层中，并且所述电容元件通过所述互连电连接到相应的触点。 第二电子部件设置在第一电介质层上，其中第二电子部件电连接到相应的触头。

    Packaging of SMD light emitting diodes
    9.
    发明授权
    Packaging of SMD light emitting diodes 失效
    SMD发光二极管封装

    公开(公告)号：US07339196B2

    公开(公告)日：2008-03-04

    申请号：US11166655

    申请日：2005-06-25

    申请人： Chia-Wen Chiang

    发明人： Chia-Wen Chiang

    IPC分类号： H01L27/15 ,  H01L29/22

    CPC分类号： H01L33/486 ,  H01L33/62 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/00

    摘要： An SMD LED package with superior thermal dissipation capability is provided. The SMD LED package comprises a supporting block with circuit patterns and at least one LED attached to the supporting block. Wherein, circuit patterns of holes/vias, insulating layers, and conducting traces/pads are formed on and in the supporting block. The SMD LED packages can be further assembled to form a light module that allows emitted lights to travel in parallel with the mounting surface. The SMD manufacturing process is a mature production process and thus easy for mass production. Single or plural LED chips are mounted on a thermal conducting block that is disposed with patterns of conducting traces/pads and isolating dielectric layers. The side emitting characteristics of the present invention offers the advantage of reflecting and mixing the emitted lights to meet the desired chromaticity.

    摘要翻译： 提供了具有出色散热能力的SMD LED封装。 SMD LED封装包括具有电路图案的支撑块和附接到支撑块的至少一个LED。 其中，孔/通孔，绝缘层和导电迹线/焊盘的电路图案形成在支撑块上和支撑块中。 SMD LED封装可以进一步组装形成一个光模块，允许发射的光与安装表面平行行进。 SMD制造工艺是一个成熟的生产工艺，因此易于批量生产。 单个或多个LED芯片安装在导热块上，导热块设置有导电迹线/焊盘和隔离电介质层的图案。 本发明的侧面发射特征提供了反射和混合发射的光以满足期望的色度的优点。