公开(公告)号：US08624351B2

公开(公告)日：2014-01-07

申请号：US13117151

申请日：2011-05-27

申请人： Chien-Hung Liu ,  Shu-Ming Chang

发明人： Chien-Hung Liu ,  Shu-Ming Chang

IPC分类号： H01L29/02 ,  H01L21/78

CPC分类号： H01L21/6835 ,  H01L2221/68331 ,  H01L2221/68345 ,  H01L2224/11

摘要： A package structure which includes a non-conductive substrate, a conductive element, a passivation, a jointed side, a conductive layer, a solder and a solder mask is disclosed. The conductive element is disposed on a surface of the non-conductive substrate and consists of a passive element and a corresponding circuit. The passivation completely covers the conductive element and the non-conductive substrate so that the conductive element is sandwiched between the passivation and the non-conductive substrate. The conductive layer covers the jointed side which exposes part of the corresponding circuit, extends beyond the jointed side and is electrically connected to the corresponding circuit. The solder mask which completely covers the jointed side and the conductive layer selectively exposes the solder which is disposed outside the jointed side and electrically connected to the conductive layer.

摘要翻译： 公开了一种包括非导电衬底，导电元件，钝化层，接合侧，导电层，焊料和焊料掩模的封装结构。 导电元件设置在非导电衬底的表面上，由无源元件和相应的电路构成。 钝化完全覆盖导电元件和非导电衬底，使得导电元件夹在钝化层和非导电衬底之间。 导电层覆盖接合侧，露出相应电路的一部分，延伸超过接合侧并与相应的电路电连接。 完全覆盖接合侧的焊料掩模和导电层选择性地暴露设置在接合侧外侧并与导电层电连接的焊料。

公开(公告)号：US08541877B2

公开(公告)日：2013-09-24

申请号：US12849089

申请日：2010-08-03

申请人： Chia-Lun Tsai ,  Ching-Yu Ni ,  Tien-Hao Huang ,  Chia-Ming Cheng ,  Wen-Cheng Chien ,  Nan-Chun Lin ,  Wei-Ming Chen ,  Shu-Ming Chang ,  Bai-Yao Lou

发明人： Chia-Lun Tsai ,  Ching-Yu Ni ,  Tien-Hao Huang ,  Chia-Ming Cheng ,  Wen-Cheng Chien ,  Nan-Chun Lin ,  Wei-Ming Chen ,  Shu-Ming Chang ,  Bai-Yao Lou

IPC分类号： H01L23/48

CPC分类号： H01L24/20 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/19 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/54486 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/83132 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01021 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15184 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00

摘要： The invention provides an electronic device package and a method for fabricating the same. The electronic device package includes a carrier wafer. An electronic device chip with a plurality of conductive pads thereon is disposed over the carrier wafer. An isolation laminating layer includes a lower first isolation layer, which covers the carrier wafer and the electronic device chip, and an upper second isolation layer. The isolation laminating layer has a plurality of openings to expose the conductive pads. A plurality of redistribution patterns is conformably formed on the isolation laminating layer and in the openings. The redistribution patterns are electrically connected to the conductive pads, respectively. A plurality of conductive bumps is respectively formed on the redistribution patterns, electrically connected to the conductive pads.

摘要翻译： 本发明提供一种电子器件封装及其制造方法。 电子器件封装包括载体晶片。 具有多个导电焊盘的电子器件芯片设置在载体晶片上。 隔离层压层包括覆盖载体晶片和电子器件芯片的下部第一隔离层和上部第二隔离层。 隔离层压层具有多个开口以露出导电垫。 在隔离层压层和开口中顺应地形成多个再分配图案。 再分布图案分别电连接到导电焊盘。 多个导电凸块分别形成在再分布图案上，电连接到导电焊盘。

公开(公告)号：US08164587B2

公开(公告)日：2012-04-24

申请号：US11755450

申请日：2007-05-30

申请人： Shu-Ming Chang ,  Shwang-Shi Bai ,  Shen-Yao Liang

发明人： Shu-Ming Chang ,  Shwang-Shi Bai ,  Shen-Yao Liang

IPC分类号： G09G5/00

CPC分类号： H02M5/4585 ,  G02F1/133604 ,  G02F2001/133612

摘要： An LCD (liquid crystal display) power supply includes an AC to DC converter circuit, a transformer, a DC to AC converter, and a feedback circuit. The AC to DC converter circuit couples an AC power supply to generate a DC signal. The DC to AC converter couples the DC signal to a primary side of the transformer and alternates polarities thereof so that an AC signal is generated on a secondary side of the transformer to supply for a load. The feedback circuit receives a first feedback signal indicative of power being supplied to the load and modulates the DC signal generated by the AC to DC converter circuit according to the first feedback signal.

摘要翻译： LCD（液晶显示器）电源包括AC至DC转换器电路，变压器，DC至AC转换器和反馈电路。 AC到DC转换器电路耦合交流电源以产生直流信号。 直流到交流转换器将直流信号耦合到变压器的初级侧并交替极性，使得在变压器的次级侧产生交流信号以供给负载。 反馈电路接收表示向负载供电的第一反馈信号，并且根据第一反馈信号调制由AC至DC转换器电路产生的DC信号。

公开(公告)号：US08039935B2

公开(公告)日：2011-10-18

申请号：US11652088

申请日：2007-01-11

申请人： Shu-Ming Chang ,  Lee-Cheng Shen ,  Wei-Chung Lo

发明人： Shu-Ming Chang ,  Lee-Cheng Shen ,  Wei-Chung Lo

IPC分类号： H01L23/02

CPC分类号： H01L23/3114 ,  H01L23/525 ,  H01L24/02 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/0231 ,  H01L2224/02319 ,  H01L2224/0233 ,  H01L2224/0235 ,  H01L2224/0236 ,  H01L2224/0401 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00

摘要： A wafer level chip scale packaging structure and the method of fabricating the same are provided to form a sacrificial layer below the bump using a normal semiconductor process. The bump is used to connect the signals between the Si wafer and the PCB. The interface between the sacrificial layer and the adjacent layers is the weakest part in the whole structure. When the stress applied to the bump is overloaded, the interface between the sacrificial layer and the adjacent layers will crash to remove the stress generated by different thermal expansion coefficients of the Si wafer and the PCB. The sacrificial layer would help avoid the crash occurring to the bump to protect the electrical conduction between the Si wafer and the PCB.

摘要翻译： 提供晶片级芯片级封装结构及其制造方法，以使用正常的半导体工艺在凸块下方形成牺牲层。 该凸块用于连接Si晶圆和PCB之间的信号。 牺牲层和相邻层之间的界面是整个结构中最薄弱的部分。 当施加到凸块的应力过载时，牺牲层和相邻层之间的界面将崩溃以消除由Si晶片和PCB的不同热膨胀系数产生的应力。 牺牲层将有助于避免碰撞发生的碰撞以保护Si晶片和PCB之间的电导通。

公开(公告)号：US08035608B2

公开(公告)日：2011-10-11

申请号：US12051495

申请日：2008-03-19

申请人： Shwang-Shi Bai ,  I-Sheng Lin ,  Hsiu-Na Hsieh ,  Shu-Ming Chang

发明人： Shwang-Shi Bai ,  I-Sheng Lin ,  Hsiu-Na Hsieh ,  Shu-Ming Chang

IPC分类号： G09G3/36

CPC分类号： H05B41/2822

摘要： An inverter circuit for driving a lamp and a backlight module using the same are provided. The inverter circuit includes a signal generation module, a switching unit, a first capacitor, a transformer and a first detecting module. The signal generation module generates a pulse width modulation (PWM) signal, wherein the duty cycle of the PWM signal is controlled by a feedback signal and a sensed signal. The switching unit has a control terminal receiving the PWM signal, and has a first current terminal and a second current terminal respectively coupled to a first terminal and a second terminal of the first capacitor. The transformer generates an AC driving signal to the lamp according to a signal variation of the primary winding coupled the first current terminal of the first transistor. The first detecting module generates the sensed signal according to the flowing current of the switching unit.

摘要翻译： 提供一种用于驱动灯的逆变器电路和使用其的背光模块。 逆变器电路包括信号发生模块，开关单元，第一电容器，变压器和第一检测模块。 信号产生模块产生脉宽调制（PWM）信号，其中PWM信号的占空比由反馈信号和感测信号控制。 开关单元具有接收PWM信号的控制端子，并且具有分别耦合到第一电容器的第一端子和第二端子的第一电流端子和第二电流端子。 变压器根据耦合第一晶体管的第一电流端子的初级绕组的信号变化，向灯产生AC驱动信号。 第一检测模块根据开关单元的流动电流产生感测信号。

公开(公告)号：US07960773B2

公开(公告)日：2011-06-14

申请号：US12364543

申请日：2009-02-03

申请人： Shu-Ming Chang ,  Chia-Wen Chiang

发明人： Shu-Ming Chang ,  Chia-Wen Chiang

IPC分类号： H01L51/05

CPC分类号： H01L23/642 ,  H01L23/481 ,  H01L23/50 ,  H01L25/0657 ,  H01L28/91 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2224/05599

摘要： This invention provides a capacitor device with a high dielectric constant material and multiple vertical electrode plates. The capacitor devices can be directly fabricated on a wafer with low temperature processes so as to be integrated with active devices formed on the wafer. This invention also forms vertical conducting lines in the capacitor devices using the through-silicon-via technology to facilitate the three-dimensional stacking of the capacitor devices.

摘要翻译： 本发明提供具有高介电常数材料和多个垂直电极板的电容器装置。 电容器器件可以直接制造在具有低温工艺的晶片上，以便与形成在晶片上的有源器件集成。 本发明还在电容器器件中使用穿硅通孔技术形成垂直导线，以促进电容器器件的三维堆叠。

公开(公告)号：US07955300B2

公开(公告)日：2011-06-07

申请号：US12463434

申请日：2009-05-11

申请人： Shu-Ming Chang

发明人： Shu-Ming Chang

IPC分类号： A61M5/00

CPC分类号： A61M5/322 ,  A61M2005/31516 ,  A61M2005/323 ,  A61M2005/5073

摘要： A disposable safety syringe in one embodiment includes a stepped syringe barrel comprising two opposite mating members on an inner surface proximate a distal end; a plunger comprising a connection member and a breakable section behind the connection member; a first needle assembly comprising a needle and a needle hub secured to the distal end of the syringe barrel; and a hollow second needle assembly shaped to lockingly secure to the first needle assembly in the syringe barrel, the second needle assembly comprising two opposite corresponding mating members on an outer surface, the corresponding mating members being lockingly engaged with the mating members. After dispensing, the plunger may clockwise rotate about the syringe barrel until the mating members and the corresponding mating members are unlocked lengthwise each other. The plunger, the second needle assembly, and the first needle assembly may move rearward to retract the needle within the syringe barrel.

摘要翻译： 一个实施例中的一次性安全注射器包括阶梯式注射器筒，其在靠近远端的内表面上包括两个相对的配合构件; 柱塞，其包括连接构件和所述连接构件后面的可断裂部分; 第一针组件，其包括固定到注射器筒的远端的针和针座; 以及中空的第二针组件，其被成形为在所述注射器筒中锁定地固定到所述第一针组件，所述第二针组件在外表面上包括两个相对的对应配合构件，所述相应的配合构件与所述配合构件锁定地接合。 在分配之后，柱塞可以围绕注射器筒顺时针旋转，直到匹配构件和相应的配合构件彼此纵向解锁。 柱塞，第二针组件和第一针组件可以向后移动以使针在注射器筒内缩回。

公开(公告)号：US20100289092A1

公开(公告)日：2010-11-18

申请号：US12756915

申请日：2010-04-08

申请人： Baw-Ching PERNG ,  Ying-Nan Wen ,  Shu-Ming Chang ,  Ching-Yu Ni ,  Yun-Jui Hsieh ,  Wei-Ming Chen ,  Chia-Lun Tsai ,  Chia-Ming Cheng

发明人： Baw-Ching PERNG ,  Ying-Nan Wen ,  Shu-Ming Chang ,  Ching-Yu Ni ,  Yun-Jui Hsieh ,  Wei-Ming Chen ,  Chia-Lun Tsai ,  Chia-Ming Cheng

IPC分类号： H01L29/78 ,  H01L23/538

CPC分类号： H01L29/78 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/492 ,  H01L24/13 ,  H01L24/16 ,  H01L29/0646 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/7802 ,  H01L29/7809 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05572 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01021 ,  H01L2924/13091 ,  H01L2224/05599 ,  H01L2224/05099

摘要： A power MOSFET package includes a semiconductor substrate having opposite first and second surfaces, having a first conductivity type, and forming a drain region, a doped region extending downward from the first surface and having a second conductivity type, a source region in the doped region and having the first conductivity type, a gate overlying or buried under the first surface, wherein a gate dielectric layer is between the gate and the semiconductor substrate, a first conducting structure overlying the semiconductor substrate, having a first terminal, and electrically connecting the drain region, a second conducting structure overlying the semiconductor substrate, having a second terminal, and electrically connecting the source region, a third conducting structure overlying the semiconductor substrate, having a third terminal, and electrically connecting the gate, wherein the first, the second, and the third terminals are substantially coplanar, and a protection layer between the semiconductor substrate and the terminals.

摘要翻译： 功率MOSFET封装包括具有相反的第一和第二表面的半导体衬底，具有第一导电类型，并形成漏极区，从第一表面向下延伸并具有第二导电类型的掺杂区，掺杂区中的源极区 并且具有第一导电类型，覆盖或掩埋在第一表面下方的栅极，其中栅极电介质层位于栅极和半导体衬底之间，覆盖半导体衬底的第一导电结构，具有第一端子，并且电连接漏极 区域，覆盖半导体衬底的第二导电结构，具有第二端子，并且电连接源极区域，覆盖半导体衬底的第三导电结构，具有第三端子和电连接栅极，其中第一，第二， 并且第三端子基本上共面，并且第三端子之间的保护层 e半导体衬底和端子。

公开(公告)号：US07786680B2

公开(公告)日：2010-08-31

申请号：US12362870

申请日：2009-01-30

申请人： Shwang-Shi Bai ,  Yu-Pei Huang ,  Shen-Yao Liang ,  Shu-Ming Chang

发明人： Shwang-Shi Bai ,  Yu-Pei Huang ,  Shen-Yao Liang ,  Shu-Ming Chang

IPC分类号： H05B37/02

CPC分类号： H05B41/3927 ,  H05B41/2824

摘要： The invention is a driving apparatus and circuit for efficiently converting a direct current (DC) signal into an alternating current (AC) signal to drive a fluorescent lamp. A semi class E configuration which utilizes only one transistor is employed in the invention. The invention comprises a power transistor, a transformer wherein a primary winding is used as a load for the power transistor and a secondary winding is used to transfer energy to the load for the driving apparatus, i.e. the CCFL tube, and control means which extracts the frequency and current of the power transistor and corrects the deviation between the frequency of the power transistor and that of the control means.

摘要翻译： 本发明是用于将直流（DC）信号有效地转换为交流（AC）信号以驱动荧光灯的驱动装置和电路。 在本发明中采用仅使用一个晶体管的半等级E构造。 本发明包括功率晶体管，变压器，其中初级绕组用作功率晶体管的负载，次级绕组用于将能量传递到用于驱动装置的负载，即CCFL管，以及控制装置，其提取 功率晶体管的频率和电流，并校正功率晶体管的频率与控制装置的频率之间的偏差。

公开(公告)号：US20100020502A1

公开(公告)日：2010-01-28

申请号：US12180360

申请日：2008-07-25

申请人： Ra-Min Tain ,  Shu-Ming Chang ,  Shyi-Ching Liau ,  Wei-Chung Lo ,  Rong-Shen Lee ,  Chi-Shih Chang

发明人： Ra-Min Tain ,  Shu-Ming Chang ,  Shyi-Ching Liau ,  Wei-Chung Lo ,  Rong-Shen Lee ,  Chi-Shih Chang

IPC分类号： H05K7/20

CPC分类号： H01L25/0657 ,  H01L23/562 ,  H01L25/50 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06593 ,  H01L2924/0002 ,  H01L2924/00

摘要： a wafer-to-wafer stacking having a hermetic structure formed therein is provided. The wafer stacking includes a first wafer, including a first substrate and a first device layer having thereon at least one chip and at least one low-k material layer, a second wafer disposed above the first wafer and having a second substrate, and a closed structure disposed on the at least one chip and arranged inside a cutting edge of the at least one chip, wherein the closed structure is extended from one side of the first device layer far from the first substrate to the other side thereof adjacent to the first substrate.

摘要翻译： 提供了其中形成有密封结构的晶片到晶片堆叠。 晶片堆叠包括第一晶片，其包括第一衬底和其上具有至少一个芯片和至少一个低k​​材料层的第一器件层，设置在第一晶片上方并具有第二衬底的第二晶片，以及闭合 结构设置在所述至少一个芯片上并且布置在所述至少一个芯片的切割边缘内，其中所述封闭结构从所述第一器件层的远离所述第一衬底的一侧延伸到与所述第一衬底相邻的另一侧 。