公开(公告)号：US08952242B2

公开(公告)日：2015-02-10

申请号：US12630334

申请日：2009-12-03

Applicant: Ryne P. Raffaele ,  David M. Wilt

Inventor： Ryne P. Raffaele ,  David M. Wilt

IPC: H01L31/05 ,  H01L31/075 ,  H01L27/142 ,  B82Y20/00 ,  H01L31/0352

CPC classification number: H01L27/1423 ,  B82Y20/00 ,  H01L31/0352 ,  H01L31/035236 ,  H01L31/035263 ,  Y02E10/50

Abstract: A photovoltaic device includes one or more structures, an array of at least one of quantum dots and quantum dashes, at least one groove, and at least one conductor. Each of the structures comprises an intrinsic layer on one of an n type layer and a p type layer and the other one of the n type layer and the p type layer on the intrinsic layer. The array of at least one of quantum dots and quantum dashes is located in the intrinsic layer in at least one of the structures. The groove extends into at least one of the structures and the conductor is located along at least a portion of the groove.

Abstract translation: 光伏器件包括一个或多个结构，量子点和量子破折号中的至少一个的阵列，至少一个沟槽和至少一个导体。 每个结构包括在n型层和p型层之一上的本征层，在本征层上包括n型层和p型层中的另一层。 量子点和量子破折号中的至少一个的阵列位于至少一个结构中的本征层中。 凹槽延伸到至少一个结构中，并且导体沿着凹槽的至少一部分定位。

公开(公告)号：US20080121271A1

公开(公告)日：2008-05-29

申请号：US11744021

申请日：2007-05-03

Applicant: Ryne P. Raffaelle ,  David M. Wilt

Inventor： Ryne P. Raffaelle ,  David M. Wilt

IPC: H02N6/00

CPC classification number: H01L31/078 ,  B82Y20/00 ,  B82Y30/00 ,  H01L31/0352 ,  Y02E10/50

Abstract: A photovoltaic device includes three or more solar cells which are layered on top of each other, at least one of quantum dots and quantum dashes, and first and second conductors. The quantum dots or quantum dashes are incorporated in at least one of the solar cells which is between the other solar cells. The first conductor is coupled to one of the solar cells and the second conductor is coupled to another one of the solar cells.

Abstract translation: 光伏器件包括三个或多个层叠在彼此之上的太阳能电池，量子点和量子破折号中的至少一个以及第一和第二导体。 量子点或量子破折号被并入在其它太阳能电池之间的至少一个太阳能电池中。 第一导体耦合到太阳能电池中的一个，并且第二导体耦合到另一个太阳能电池。

公开(公告)号：US06482672B1

公开(公告)日：2002-11-19

申请号：US09186587

申请日：1998-11-05

Applicant: Richard W. Hoffman ,  David M. Wilt

Inventor： Richard W. Hoffman ,  David M. Wilt

IPC: H01L2120

CPC classification number: H01L31/1844 ,  H01L31/03046 ,  Y02E10/544 ,  Y02P70/521 ,  Y10S438/93 ,  Y10S438/936

Abstract: A method for growing InxGa1−xAs epitaxial layer on a lattice mismatched InP substrate calls for depositing by organo-metallic vapor phase epitaxy, or other epitaxial layer growth technique, a plurality of discreet layers of InAsyP1−y over an InP substrate. These layers provide a buffer. Each succeeding buffer layer has a distinct composition which produces less than a critical amount of lattice mismatch relative to the preceding layer. An InxGa1−xAs epitaxial layer is grown over the buffer wherein 0.53≦x≦0.76. A resulting InGaAs structure comprises an InP substrate with at least one InAsP buffer layer sandwiched between the substrate and the InGaAs epitaxial layer. The buffer layer has a critical lattice mismatch of less than 1.3% relative to the substrate. Additional buffer layers will likewise have a lattice mismatch of no more than 1.3% relative to the preceding layer. The number of buffer layers is determined by the resulting bandgap desired in the InGaAs epitaxial layer, which, in turn, determines the composition of the InxGa1−xAs epitaxial layer, and thus, the lattice mismatch.

Abstract translation: 在晶格失配的InP衬底上生长In x Ga 1-x As外延层的方法要求通过有机金属气相外延或其它外延层生长技术在InP衬底上沉积多个离散的InAsyP1-y层。 这些层提供了一个缓冲区。 每个后续缓冲层具有相对于前一层产生小于临界量的晶格失配的不同组成。 In x Ga 1-x As外延层生长在缓冲器上，其中0.53≤x≤0.76。所得的InGaAs结构包括InP衬底，其具有夹在衬底和InGaAs外延层之间的至少一个InAsP缓冲层。 缓冲层相对于衬底具有小于1.3％的临界晶格失配。 附加的缓冲层同样具有相对于前一层不超过1.3％的晶格失配。 缓冲层的数量由InGaAs外延层中所需的所得到的带隙确定，InGaAs外延层决定了In x Ga 1-x As外延层的组成，从而确定晶格失配。

公开(公告)号：US20100081228A1

公开(公告)日：2010-04-01

申请号：US12630334

申请日：2009-12-03

Applicant: Ryne P. Raffaele ,  David M. Wilt

Inventor： Ryne P. Raffaele ,  David M. Wilt

IPC: H01L31/0352

CPC classification number: H01L27/1423 ,  B82Y20/00 ,  H01L31/0352 ,  H01L31/035236 ,  H01L31/035263 ,  Y02E10/50

Abstract: A photovoltaic device includes one or more structures, an array of at least one of quantum dots and quantum dashes, at least one groove, and at least one conductor. Each of the structures comprises an intrinsic layer on one of an n type layer and a p type layer and the other one of the n type layer and the p type layer on the intrinsic layer. The array of at least one of quantum dots and quantum dashes is located in the intrinsic layer in at least one of the structures. The groove extends into at least one of the structures and the conductor is located along at least a portion of the groove.

Abstract translation: 光伏器件包括一个或多个结构，量子点和量子破折号中的至少一个的阵列，至少一个沟槽和至少一个导体。 每个结构包括在n型层和p型层之一上的本征层，在本征层上包括n型层和p型层中的另一层。 量子点和量子破折号中的至少一个的阵列位于至少一个结构中的本征层中。 凹槽延伸到至少一个结构中，并且导体沿着凹槽的至少一部分定位。

公开(公告)号：US6162987A

公开(公告)日：2000-12-19

申请号：US343538

申请日：1999-06-30

Applicant: Christopher S. Murray ,  David M. Wilt

Inventor： Christopher S. Murray ,  David M. Wilt

IPC: H01L27/142 ,  H01L31/052 ,  H01L31/0693 ,  H01L31/00

CPC classification number: H01L31/0693 ,  G02F2202/36 ,  H01L31/046 ,  H01L31/056 ,  Y02E10/52 ,  Y02E10/544

Abstract: An improved thermophotovoltaic (TPV) n/p/n device is provided. Monolithic Interconnected Modules (MIMS), semiconductor devices converting infrared radiation to electricity, have been developed with improved electrical and optical performance. The structure is an n-type emitter on a p-type base with an n-type lateral conduction layer. The incorporation of a tunnel junction and the reduction in the amount of p-type material used results in negligible parasitic absorption, decreased series resistance, increased voltage and increased active area. The novel use of a tunnel junction results in the potential for a TPV device with efficiency greater than 24%.

Abstract translation: 提供改进的热光伏（TPV）n / p / n设备。 已经开发出具有改进的电气和光学性能的单片互连模块（MIMS），将红外辐射转换成电的半导体器件。 该结构是在具有n型横向导电层的p型基底上的n型发射极。 隧道结的结合和所使用的p型材料的量的减少导致可忽略的寄生吸收，降低的串联电阻，增加的电压和增加的有效面积。 隧道结的新颖使用导致效率大于24％的TPV器件的潜力。

公开(公告)号：US08974899B1

公开(公告)日：2015-03-10

申请号：US13114119

申请日：2011-05-24

Applicant: David M. Wilt

Inventor： David M. Wilt

IPC: H01L31/0216 ,  H01L31/042 ,  C03C14/00 ,  B82Y30/00 ,  B32B5/16 ,  B32B27/06

CPC classification number: B32B5/16 ,  B32B27/06 ,  H01L31/0481 ,  H01L31/0488 ,  Y02E10/50 ,  Y10T428/25

Abstract: A flexible hybrid coverglass for spacecraft solar panels comprised of small beads of either fused silica or ceria-doped borosilicate glass embedded in a matrix of conventional coverglass adhesives. These beads may also be used in a matrix of Kapton as the solar panel's substrate which may be combined with flexible solar cells to form flexible solar panels.

Abstract translation: 一种用于航天器太阳能电池板的柔性混合覆盖玻璃，其包含嵌入常规覆盖玻璃粘合剂基体中的熔融石英或二氧化铈掺杂硼硅酸盐玻璃的小珠。 这些珠也可以用作Kapton的基质作为太阳能电池板的基底，其可与柔性太阳能电池组合以形成柔性太阳能电池板。

公开(公告)号：US08829336B2

公开(公告)日：2014-09-09

申请号：US11744010

申请日：2007-05-03

Applicant: Ryne P. Raffaelle ,  David M. Wilt

Inventor： Ryne P. Raffaelle ,  David M. Wilt

IPC: H01L31/05 ,  H01L31/075 ,  B82Y20/00 ,  H01L27/142 ,  H01L31/0352

CPC classification number: H01L27/1423 ,  B82Y20/00 ,  H01L31/0352 ,  H01L31/035236 ,  H01L31/035263 ,  Y02E10/50

Abstract: A photovoltaic device includes one or more structures, an array of at least one of quantum dots and quantum dashes, at least one groove, and at least one conductor. Each of the structures comprises an intrinsic layer on one of an n type layer and a p type layer and the other one of the n type layer and the p type layer on the intrinsic layer. The array of at least one of quantum dots and quantum dashes is located in the intrinsic layer in at least one of the structures. The groove extends into at least one of the structures and the conductor is located along at least a portion of the groove.

Abstract translation: 光伏器件包括一个或多个结构，量子点和量子破折号中的至少一个的阵列，至少一个沟槽和至少一个导体。 每个结构包括在n型层和p型层之一上的本征层，在本征层上包括n型层和p型层中的另一层。 量子点和量子破折号中的至少一个的阵列位于至少一个结构中的本征层中。 凹槽延伸到至少一个结构中，并且导体沿着凹槽的至少一部分定位。

公开(公告)号：US5641381A

公开(公告)日：1997-06-24

申请号：US411357

申请日：1995-03-27

Applicant: Sheila G. Bailey ,  David M. Wilt ,  Frank L. DeAngelo

Inventor： Sheila G. Bailey ,  David M. Wilt ,  Frank L. DeAngelo

IPC: C30B25/18 ,  C30B33/00 ,  H01L21/306 ,  H01L21/78 ,  B44C1/22

CPC classification number: C30B33/00 ,  C30B25/18 ,  C30B29/40 ,  H01L21/30612 ,  H01L21/78 ,  Y10S117/915 ,  Y10S438/977

Abstract: The present invention is directed toward a method of removing epitaxial substrates from host substrates. A sacrificial release layer of ternary material is placed on the substrate. A layer of InP is then placed on the ternary material. Afterward a layer of wax is applied to the InP layer to apply compressive force and an etchant material is used to remove the sacrificial release layer.

Abstract translation: 本发明涉及一种从主机衬底去除外延衬底的方法。 将三元材料的牺牲脱模层放置在基板上。 然后将一层InP放置在三元材料上。 之后，将一层蜡施加到InP层以施加压缩力，并且使用蚀刻剂材料去除牺牲剥离层。