Power regulation system, apparatus, and method for providing regulated power to a microelectronic device
    1.
    发明授权
    Power regulation system, apparatus, and method for providing regulated power to a microelectronic device 有权
    用于向微电子器件提供调节功率的功率调节系统,装置和方法

    公开(公告)号:US06819537B2

    公开(公告)日:2004-11-16

    申请号:US10104039

    申请日:2002-03-22

    IPC分类号: H02H300

    CPC分类号: H02J1/102 G06F1/305 H05K1/181

    摘要: A method, apparatus, and system for providing operating power and transient suppression power to a microelectronic device are disclosed. The system includes a primary regulator to supply nominal operating power and to respond to relatively slow transient events and a transient suppression regulator to respond to fast transient power events. The system also includes a sense circuit to detect when a transient event occurs and to send a signal to the transient suppression regulator to supply or sink current to the load in response to a sensed transient power event.

    摘要翻译: 公开了一种用于向微电子器件提供工作功率和瞬态抑制功率的方法,装置和系统。 该系统包括提供标称工作功率并响应相对较慢的瞬态事件的主要调节器以及瞬态抑制调节器来响应快速瞬态功率事件。 该系统还包括检测电路,用于检测何时发生瞬变事件,并且响应于所感测的瞬态功率事件,向瞬态抑制调节器发送信号以向电流提供或吸收电流。

    Reference circuit using current feedback for fast biasing upon power-up
    2.
    发明授权
    Reference circuit using current feedback for fast biasing upon power-up 失效
    使用电流反馈的参考电路,用于在上电时进行快速偏置

    公开(公告)号:US6057721A

    公开(公告)日:2000-05-02

    申请号:US065003

    申请日:1998-04-23

    IPC分类号: H03K17/22 H03L7/00

    CPC分类号: H03K17/223

    摘要: A fast start-up circuit for use in integrated circuits where there are internal nodes of reference circuits that need to be charged to a predetermined voltage level at a quicker rate than that delivered by the typical ramping up of supply power. The circuit a current driven approach, which is unique from the voltage driven approaches found in the prior art. The circuit is comprised of a high gain reference circuit and a current generator. The reference circuit is comprised of a bias generator and a high gain amplifier. The invention is characterized by a current generator which is capable of rapidly injecting relatively high levels of current into the reference circuit or sinking relatively high levels of current from the reference circuit or both. The invention is further characterized by a current driven feedback loop which deactivates the current generator once start-up is achieved and the high gain reference circuit approaches the quiescent point.

    摘要翻译: 用于集成电路的快速启动电路,其中存在参考电路的内部节点需要以比由典型的供电电源上升所传递的速率更快的速率被充电到预定电压电平。 该电路是电流驱动方法,其从现有技术中发现的电压驱动方法是独特的。 电路由高增益参考电路和电流发生器组成。 参考电路由偏置发生器和高增益放大器组成。 本发明的特征在于一种电流发生器,其能够将相当高水平的电流快速地注入参考电路或从参考电路或两者吸收相对高水平的电流。 本发明的特征还在于电流驱动的反馈回路,当启动启动时,电流发生器失效,而高增益参考电路接近静态点。

    System and method for highly phased power regulation

    公开(公告)号:US06563294B2

    公开(公告)日:2003-05-13

    申请号:US10112738

    申请日:2002-04-01

    IPC分类号: G05F140

    摘要: A highly phased power regulation (converter) system having an improved control feature is provided. A controller, such as a digital signal processor or microprocessor, receives digital information from a plurality of power conversion blocks and transmits control commands in response to the information. The controller is able to change the mode of operation of the system and/or re-phase the power blocks to accommodate a dynamic load requirement, occasions of high transient response or detection of a fault. In one embodiment, a microprocessor receives digital information and converted power from one or more power blocks. In this manner, the microprocessor is able to receive feedback on its own operation. The controller is also able to anticipate and predict conditions by analyzing precursor data. In this manner, the controller is able to modify the system as needed in anticipation of the forthcoming event.

    System and method for current sensing

    公开(公告)号:US06559684B2

    公开(公告)日:2003-05-06

    申请号:US10141052

    申请日:2002-05-08

    IPC分类号: G01R1900

    摘要: A system and method for current sensing which is substantially consistent over device, temperature, and process variations is provided. A current sensing system includes a first switch coupled to one or more variable resistive elements. The resistive elements being configured to scale down the voltage across the first switch which is provided to an input of an amplifier. The amplifier is coupled to the resistive elements and the second switch and is configured to sense the voltage across the first switch, and force the voltage across the second switch to be equal to the first switch scaled down voltage. Thus, a current of known proportion can be provided at the output of the amplifier. A driver and timing circuit may be provided to prevent the amplifier from providing an excessive slewing of current during the off period.

    System and method for detection of zero current condition
    5.
    发明授权
    System and method for detection of zero current condition 有权
    用于检测零电流条件的系统和方法

    公开(公告)号:US06847197B2

    公开(公告)日:2005-01-25

    申请号:US10342741

    申请日:2003-01-14

    摘要: A method for converting power includes charging an inductor by coupling the inductor to a voltage source for a predetermined amount of time. Thereafter, the inductor is discharged by coupling the inductor to a ground until the current flowing through the inductor equals zero. A method for detecting a zero current flowing through the inductor includes coupling the inductor to a transistor and comparing the output of that transistor to a transistor coupled to ground.

    摘要翻译: 一种用于转换功率的方法包括通过将电感器耦合到电压源达预定的时间量来对电感器进行充电。 此后,通过将电感器耦合到地直到流过电感器的电流等于零来使电感器放电。 用于检测流过电感器的零电流的方法包括将电感器耦合到晶体管,并将该晶体管的输出与耦合到地的晶体管进行比较。

    System and method for detection of zero current condition

    公开(公告)号:US06507175B2

    公开(公告)日:2003-01-14

    申请号:US09978125

    申请日:2001-10-15

    IPC分类号: G05F100

    摘要: The present invention is directed to a circuit that is configured to detect a zero current condition at a certain point. The circuit includes a current mirror coupled to two transistors, where the first transistor is coupled to ground and the second transistor is coupled to the point being sensed. The outputs of both the first transistor and the second transistor are each coupled to an input of a comparator. The comparator is configured to determine when an equal voltage condition is present at the two inputs, which signifies a zero-current condition. Such a zero current detector can be used in a buck regulator to prevent a current flow from load to ground and attendant inefficiencies that result. An alternative embodiment involves the use of a controller to sense three different voltages to determine the state of the switches.

    Capacitor array for a successive approximation register (SAR) based
analog to digital (A/D) converter and method therefor
    7.
    发明授权
    Capacitor array for a successive approximation register (SAR) based analog to digital (A/D) converter and method therefor 失效
    用于基于逐次逼近寄存器(SAR)的模数(A / D)转换器的电容阵列及其方法

    公开(公告)号:US6118400A

    公开(公告)日:2000-09-12

    申请号:US9285

    申请日:1998-01-20

    申请人: David Susak

    发明人: David Susak

    CPC分类号: H03M1/78 H03M1/46

    摘要: A capacitor array for a Successive Approximation Register (SAR) based Analog to Digital (A/D) converter. The capacitor array is a capacitive ladder comprising a plurality of capacitive branches. Each capacitive branch is individually coupled to a separate bit of a driver circuit. Each of the plurality of capacitive branches drives an approximately same capacitive value while generating a binary weighted output voltage.

    摘要翻译: 一种用于连续逼近寄存器(SAR)的模数(A / D)转换器的电容阵列。 电容器阵列是包括多个电容分支的电容梯。 每个电容分支单独耦合到驱动器电路的单独位。 多个电容性分支中的每一个在产生二进制加权输出电压的同时驱动大致相同的电容值。

    Driver circuit for low voltage operation of a successive approximation
register (SAR) analog to digital (A/D) converter and method therefor
    8.
    发明授权
    Driver circuit for low voltage operation of a successive approximation register (SAR) analog to digital (A/D) converter and method therefor 失效
    用于逐次逼近寄存器(SAR)模数(A / D)转换器的低电压操作的驱动电路及其方法

    公开(公告)号:US6020841A

    公开(公告)日:2000-02-01

    申请号:US9284

    申请日:1998-01-20

    申请人: David Susak

    发明人: David Susak

    摘要: A driver circuit for low voltage operation of a Successive Approximation Register (SAR) based Analog/Digital (A/D) converter is disclosed. The driver circuit has a plurality of cells wherein each cell is used for driving an individual column of a capacitor array. A switching circuit is held within each of the plurality of cells. The switching circuit is used for outputting one of a high voltage level V.sub.H or a low voltage level V.sub.L to an individual column of the capacitor array while driving no DC current. The switching circuit is comprised of a pair of fully differential pass gates. The pass gates are driven by circuitry referenced off of the supply voltage V.sub.dd of the A/D converter integrated circuit and ground. Because of this, each pass gate may operate off of any voltage within the V.sub.dd to ground range. Thus, the switching circuit allows for low voltage operation with a wider operating range.

    摘要翻译: 公开了一种用于基于连续近似寄存器(SAR)的模拟/数字(A / D)转换器的低电压操作的驱动电路。 驱动器电路具有多个单元,其中每个单元用于驱动电容器阵列的单独列。 开关电路保持在多个单元的每一个内。 开关电路用于在驱动没有直流电流的同时将高电压电平VH或低电压电平VL中的一个输出到电容器阵列的单独列。 开关电路由一对完全差分通过门组成。 通过栅极由A / D转换器集成电路和地的电源电压Vdd引用的电路驱动。 因此,每个通孔可以在Vdd到地面范围内的任何电压下工作。 因此,开关电路允许在更宽的工作范围内的低电压操作。

    Geometrical layout technique for a circular capacitor within an array of
matched capacitors on a semiconductor device
    10.
    发明授权
    Geometrical layout technique for a circular capacitor within an array of matched capacitors on a semiconductor device 失效
    半导体器件上匹配电容阵列内的圆形电容器的几何布局技术

    公开(公告)号:US5925921A

    公开(公告)日:1999-07-20

    申请号:US23882

    申请日:1998-02-13

    申请人: David Susak

    发明人: David Susak

    摘要: A geometrical layout technique for an individual circular capacitor in a semiconductor device. Circular capacitors reduce the detrimental effects of (1) corner etching, (2) peripheral capacitance, (3) capacitor to capacitor coupling, and (4) electric field anomalies and result in superior capacitor matching. The circular capacitor is comprised of a circular bottom plate made of a conducting material, a circular dielectric material coupled to the bottom plate and a circular top plate made of a conducting material.The circular capacitors may be arranged as an array in either a rectangular lattice layout or a diagonal lattice layout. These lattice layouts take advantage of the elimination or reduction of the problems encountered in the prior art such as corner etching, peripheral capacitance, capacitor to capacitor coupling and electric field anomalies.

    摘要翻译: 一种用于半导体器件中的单个圆形电容器的几何布局技术。 圆形电容器减少了(1)角蚀刻,(2)外围电容,(3)电容器与电容器耦合的不利影响,以及(4)电场异常并导致优异的电容器匹配。 圆形电容器包括由导电材料制成的圆形底板,耦合到底板的圆形电介质材料和由导电材料制成的圆形顶板。 圆形电容器可以以矩形格子布局或对角网格布局布置为阵列。 这些格子布局利用消除或减少现有技术中遇到的问题,例如角蚀刻,外围电容,电容器与电容耦合以及电场异常。