公开(公告)号：US20110258844A1

公开(公告)日：2011-10-27

申请号：US13174048

申请日：2011-06-30

申请人： Cynthia Blair ,  Donald Fowlkes

发明人： Cynthia Blair ,  Donald Fowlkes

IPC分类号： H01C17/00

CPC分类号： H01L24/49 ,  H01L23/66 ,  H01L24/48 ,  H01L2223/6644 ,  H01L2223/665 ,  H01L2224/48 ,  H01L2224/48195 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  Y10T29/49082 ,  Y10T29/49169 ,  H01L2224/45099

摘要： According to an embodiment of a method of manufacturing a power transistor module, the method includes mechanically fastening a first terminal, a second terminal and at least two different DC bias terminals to an electrically conductive flange; connecting the flange to a source of a power transistor device; electrically connecting the first terminal to a gate of the power transistor device; electrically connecting the second terminal to a drain of the power transistor device; mechanically fastening a bus bar to the flange which extends between and connects the DC bias terminals; and electrically connecting the bus bar to the drain via one or more RF grounded connections.

摘要翻译： 根据制造功率晶体管模块的方法的实施例，该方法包括将第一端子，第二端子和至少两个不同的DC偏置端子机械地紧固到导电凸缘; 将法兰连接到功率晶体管器件的源极; 将第一端子电连接到功率晶体管器件的栅极; 将所述第二端子电连接到所述功率晶体管器件的漏极; 将母线机械地紧固到在DC偏置端子之间延伸并连接到DC偏置端子的凸缘; 并且经由一个或多个RF接地连接将母线电连接到漏极。

公开(公告)号：US20100283134A1

公开(公告)日：2010-11-11

申请号：US12436652

申请日：2009-05-06

申请人： Anwar A. Mohammed ,  Julius Chew ,  Donald Fowlkes

发明人： Anwar A. Mohammed ,  Julius Chew ,  Donald Fowlkes

IPC分类号： H01L23/34 ,  H01L21/50

CPC分类号： H01L21/50 ,  H01L23/142 ,  H01L23/3735 ,  H01L24/28 ,  H01L24/48 ,  H01L24/83 ,  H01L2224/29144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/3511 ,  H01L2924/0105 ,  H01L2924/01032 ,  H01L2924/01014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： According to an embodiment of a high power package, the package includes a copper heat sink, a ceramic lead frame and a semiconductor chip. The copper heat sink has a thermal conductivity of at least 350 W/m K. The ceramic lead frame is attached to the copper heat sink with an epoxy. The semiconductor chip is attached to the copper heat sink on the same side as the lead frame with an electrically conductive material having a melting point of about 280° C. or greater.

摘要翻译： 根据高功率封装的实施例，封装包括铜散热器，陶瓷引线框架和半导体芯片。 铜散热器的导热系数至少为350 W / m。陶瓷引线框架通过环氧树脂连接到铜散热片上。 半导体芯片与具有熔点约280℃或更高的导电材料的引线框架在同一侧的铜散热器上附接。

公开(公告)号：US20110147921A1

公开(公告)日：2011-06-23

申请号：US12641496

申请日：2009-12-18

申请人： Anwar A. Mohammed ,  Soon Ing Chew ,  Donald Fowlkes ,  Alexander Komposch ,  Benjamin Pain-Fong Law ,  Michael Opiz Real

发明人： Anwar A. Mohammed ,  Soon Ing Chew ,  Donald Fowlkes ,  Alexander Komposch ,  Benjamin Pain-Fong Law ,  Michael Opiz Real

IPC分类号： H01L23/12 ,  H01L21/50 ,  H05K3/30 ,  B21D31/00

CPC分类号： B21D22/20 ,  H01L23/04 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/291 ,  H01L2224/83815 ,  H01L2224/8385 ,  H01L2924/157 ,  H01L2924/161 ,  H01L2924/171 ,  H01L2924/3511 ,  H05K3/303 ,  H05K2201/10409 ,  H05K2201/10969 ,  Y02P70/613 ,  Y10T29/4913 ,  H01L2924/014

摘要： A semiconductor package includes a curved body and a plurality of semiconductor die. The curved body includes first and second opposing end regions and an intermediate center region. The curved body has a first inflection point at the center region, a second inflection point at the first end region and a third inflection point at the second end region. The center region has a convex curvature with a minimal extremum at the first inflection point, the first end region has a concave curvature with a maximal extremum at the second inflection point and the second end region has a concave curvature with a maximal extremum at the third inflection point. The plurality of semiconductor die are attached to an upper surface of the curved body between the maximal extrema.

摘要翻译： 半导体封装包括弯曲体和多个半导体管芯。 弯曲体包括第一和第二相对末端区域和中间中心区域。 弯曲体在中心区域具有第一拐点，在第一端部区域具有第二拐点，在第二端部区域具有第三拐点。 中心区域具有在第一拐点处具有最小极值的凸曲率，第一端区域具有在第二拐点处具有最大极值的凹曲率，并且第二端区域具有在第三拐点处具有最大极值的凹曲率 拐点。 多个半导体管芯在最大极值之间附接到弯曲体的上表面。

公开(公告)号：US20120104582A1

公开(公告)日：2012-05-03

申请号：US13343733

申请日：2012-01-05

申请人： Anwar A. Mohammed ,  Julius Chew ,  Donald Fowlkes

发明人： Anwar A. Mohammed ,  Julius Chew ,  Donald Fowlkes

IPC分类号： H01L23/495

CPC分类号： H01L21/50 ,  H01L23/142 ,  H01L23/3735 ,  H01L24/28 ,  H01L24/48 ,  H01L24/83 ,  H01L2224/29144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/3511 ,  H01L2924/0105 ,  H01L2924/01032 ,  H01L2924/01014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： According to an embodiment of a high power package, the package includes a heat sink containing enough copper to have a thermal conductivity of at least 350 W/mK, an electrically insulating attached to the heat sink with an epoxy and a semiconductor chip attached to the heat sink on the same side as the lead frame with an electrically conductive material having a melting point of 280° C. or greater.

摘要翻译： 根据高功率封装的实施例，封装包括散热器，其包含足够的铜以具有至少350W / mK的导热系数，电连接到散热器上的环氧树脂和半导体芯片 使用熔点为280℃以上的导电材料在与引线框架相同的一侧上散热。

公开(公告)号：US08110915B2

公开(公告)日：2012-02-07

申请号：US12580304

申请日：2009-10-16

申请人： Donald Fowlkes ,  Soon Ing Chew

发明人： Donald Fowlkes ,  Soon Ing Chew

IPC分类号： H01L23/48 ,  H01L21/52

CPC分类号： H01L23/66 ,  H01L23/3677 ,  H01L23/49861 ,  H01L23/60 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0655 ,  H01L25/16 ,  H01L2223/6655 ,  H01L2224/32188 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/45099

摘要： An RF semiconductor package includes a substrate having generally planar top and bottom surfaces. The substrate includes a metallic base region and one or more metallic signal terminal regions extending from the top surface to the bottom surface, and an insulative material separating the metallic regions from one another. The bottom surface of an RF semiconductor die is surface-mounted to the base region at the top substrate surface. The RF semiconductor die has a terminal pad disposed at a top surface of the RF semiconductor die. The terminal pad is electrically connected to one of the signal terminal regions at the top substrate surface. A lid is attached to the top substrate surface so that the RF semiconductor die is enclosed by the lid to form an open-cavity around the RF semiconductor die. The base and signal terminal regions are configured for surface-mounting at the bottom substrate surface.

摘要翻译： RF半导体封装包括具有大致平坦的顶表面和底表面的基板。 基板包括金属基区域和从顶表面延伸到底表面的一个或多个金属信号端子区域和将金属区域彼此分开的绝缘材料。 RF半导体管芯的底表面被表面安装到顶部衬底表面的基底区域。 RF半导体管芯具有设置在RF半导体管芯的顶表面处的端子焊盘。 端子焊盘电连接到顶部衬底表面处的信号端子区域之一。 将盖子附接到顶部衬底表面，使得RF半导体管芯由盖子封闭以在RF半导体管芯周围形成开放空腔。 基极和信号端子区域被配置为在底部基板表面处表面安装。

公开(公告)号：US07994630B2

公开(公告)日：2011-08-09

申请号：US12367719

申请日：2009-02-09

申请人： Cynthia Blair ,  Donald Fowlkes

发明人： Cynthia Blair ,  Donald Fowlkes

IPC分类号： H01L23/48

CPC分类号： H01L24/49 ,  H01L23/66 ,  H01L24/48 ,  H01L2223/6644 ,  H01L2223/665 ,  H01L2224/48 ,  H01L2224/48195 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  Y10T29/49082 ,  Y10T29/49169 ,  H01L2224/45099

摘要： According to one embodiment, a power transistor package includes an electrically conductive flange configured to be connected to a source of a power transistor device. The package further includes a first terminal mechanically fastened to the flange and configured to be electrically connected to a gate of the power transistor device and a second terminal mechanically fastened to the flange and configured to be electrically connected to a drain of the power transistor device. The package also includes a bus bar mechanically fastened to the flange which extends between and connects at least two different DC bias terminals mechanically fastened to the flange. The bus bar is configured to be electrically connected to the drain via one or more RF grounded connections.

摘要翻译： 根据一个实施例，功率晶体管封装包括被配置为连接到功率晶体管器件的源极的导电凸缘。 所述封装还包括机械地紧固到所述凸缘并被配置为电连接到所述功率晶体管器件的栅极的第一端子和机械地紧固到所述凸缘并被配置为电连接到所述功率晶体管器件的漏极的第二端子。 该包装还包括机械地紧固到凸缘的汇流条，该汇流条在凸缘之间延伸并连接至少两个机械地紧固到凸缘的DC偏压端子。 母线被配置成通过一个或多个RF接地连接电连接到漏极。

公开(公告)号：US20060175691A1

公开(公告)日：2006-08-10

申请号：US11351933

申请日：2006-02-09

申请人： Jochen Dangelmaier ,  Donald Fowlkes ,  Volker Guengerich ,  Henrik Hoyer

发明人： Jochen Dangelmaier ,  Donald Fowlkes ,  Volker Guengerich ,  Henrik Hoyer

IPC分类号： H01L23/495

CPC分类号： H01L23/49861 ,  H01L23/047 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45124 ,  H01L2224/48137 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00

摘要： A semiconductor device (7) has gold coatings (1 to 5) which are applied to metallic or ceramic components (6) of the semiconductor device (7). The gold coatings (1 to 4) have a multifunctional multilayer metal coating (8) with a minimal gold layer (9). The gold layer has a thickness dG where dG≦0.5 μm. Moreover, at least one metallic interlayer (10) is arranged between the gold layer (9) and the metallic or ceramic components (6).

摘要翻译： 半导体器件（7）具有施加到半导体器件（7）的金属或陶瓷部件（6）的金涂层（1至5）。 金涂层（1至4）具有多金属多层金属涂层（8），最小金层（9）。 金层具有厚度d G G，其中d G <=0.5μm。 而且，在金层（9）和金属或陶瓷部件（6）之间至少设有一个金属中间层（10）。

公开(公告)号：US08314487B2

公开(公告)日：2012-11-20

申请号：US12641496

申请日：2009-12-18

申请人： Anwar A. Mohammed ,  Soon Ing Chew ,  Donald Fowlkes ,  Alexander Komposch ,  Benjamin Pain-Fong Law ,  Michael Opiz Real

发明人： Anwar A. Mohammed ,  Soon Ing Chew ,  Donald Fowlkes ,  Alexander Komposch ,  Benjamin Pain-Fong Law ,  Michael Opiz Real

IPC分类号： H01L23/34

CPC分类号： B21D22/20 ,  H01L23/04 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/291 ,  H01L2224/83815 ,  H01L2224/8385 ,  H01L2924/157 ,  H01L2924/161 ,  H01L2924/171 ,  H01L2924/3511 ,  H05K3/303 ,  H05K2201/10409 ,  H05K2201/10969 ,  Y02P70/613 ,  Y10T29/4913 ,  H01L2924/014

摘要： A semiconductor package includes a curved body and a plurality of semiconductor die. The curved body includes first and second opposing end regions and an intermediate center region. The curved body has a first inflection point at the center region, a second inflection point at the first end region and a third inflection point at the second end region. The center region has a convex curvature with a minimal extremum at the first inflection point, the first end region has a concave curvature with a maximal extremum at the second inflection point and the second end region has a concave curvature with a maximal extremum at the third inflection point. The plurality of semiconductor die are attached to an upper surface of the curved body between the maximal extrema.

摘要翻译： 半导体封装包括弯曲体和多个半导体管芯。 弯曲体包括第一和第二相对末端区域和中间中心区域。 弯曲体在中心区域具有第一拐点，在第一端部区域具有第二拐点，在第二端部区域具有第三拐点。 中心区域具有在第一拐点处具有最小极值的凸曲率，第一端区域具有在第二拐点处具有最大极值的凹曲率，并且第二端区域具有在第三拐点处具有最大极值的凹曲率 拐点。 多个半导体管芯在最大极值之间附接到弯曲体的上表面。

公开(公告)号：US08258014B2

公开(公告)日：2012-09-04

申请号：US13174048

申请日：2011-06-30

申请人： Cynthia Blair ,  Donald Fowlkes

发明人： Cynthia Blair ,  Donald Fowlkes

IPC分类号： H01L23/48

CPC分类号： H01L24/49 ,  H01L23/66 ,  H01L24/48 ,  H01L2223/6644 ,  H01L2223/665 ,  H01L2224/48 ,  H01L2224/48195 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  Y10T29/49082 ,  Y10T29/49169 ,  H01L2224/45099

摘要： According to an embodiment of a method of manufacturing a power transistor module, the method includes mechanically fastening a first terminal, a second terminal and at least two different DC bias terminals to an electrically conductive flange; connecting the flange to a source of a power transistor device; electrically connecting the first terminal to a gate of the power transistor device; electrically connecting the second terminal to a drain of the power transistor device; mechanically fastening a bus bar to the flange which extends between and connects the DC bias terminals; and electrically connecting the bus bar to the drain via one or more RF grounded connections.

摘要翻译： 根据制造功率晶体管模块的方法的实施例，该方法包括将第一端子，第二端子和至少两个不同的DC偏置端子机械地紧固到导电凸缘; 将法兰连接到功率晶体管器件的源极; 将第一端子电连接到功率晶体管器件的栅极; 将所述第二端子电连接到所述功率晶体管器件的漏极; 将母线机械地紧固到在DC偏置端子之间延伸并连接到DC偏置端子的凸缘; 并且经由一个或多个RF接地连接将母线电连接到漏极。

公开(公告)号：US20080019108A1

公开(公告)日：2008-01-24

申请号：US11458548

申请日：2006-07-19

申请人： Henrik Hoyer ,  Donald Fowlkes ,  Bradley Griswold

发明人： Henrik Hoyer ,  Donald Fowlkes ,  Bradley Griswold

IPC分类号： H05K7/00

CPC分类号： H01L23/3675 ,  H01L2223/6644 ,  H01L2924/0002 ,  Y10T29/49121 ,  Y10T29/49156 ,  H01L2924/00

摘要： An RF power amplifier including a single piece heat sink and an RF power transistor die mounted directly onto the heat sink.

摘要翻译： RF功率放大器包括单片式散热器和直接安装在散热片上的RF功率晶体管管芯。