Determining the health of a desired node in a multi-level system
    1.
    发明授权
    Determining the health of a desired node in a multi-level system 失效
    确定多级系统中所需节点的运行状况

    公开(公告)号:US07246290B1

    公开(公告)日:2007-07-17

    申请号:US10284640

    申请日:2002-10-31

    IPC分类号: G01R31/28

    CPC分类号: G05B23/0243

    摘要: A method and apparatus are provided for determining the health of a desired node in a multi-level system. The method includes defining a first fault model associated with a first node of a first level of the system, defining a second fault model associated with a second node of a second level of the system, and defining a third fault model associated with a third node associated with a third level of the system. The method further includes determining a health value associated with at least one of the first node, the second node, and the third node of the system based on at least one of the first fault model, second fault model, and the third fault model.

    摘要翻译: 提供了一种用于确定多级系统中期望节点的健康状况的方法和装置。 该方法包括定义与系统的第一级的第一节点相关联的第一故障模型,定义与系统的第二级别的第二级相关联的第二故障模型,以及定义与第三节点相关联的第三故障模型 与系统的第三级相关联。 该方法还包括基于第一故障模型,第二故障模型和第三故障模型中的至少一个来确定与系统的第一节点,第二节点和第三节点中的至少一个相关联的健康值。

    Methods of controlling gate electrode doping, and systems for accomplishing same
    2.
    发明授权
    Methods of controlling gate electrode doping, and systems for accomplishing same 有权
    控制栅电极掺杂的方法及其完成的系统

    公开(公告)号:US07033873B1

    公开(公告)日:2006-04-25

    申请号:US10246572

    申请日:2002-09-18

    IPC分类号: H01L21/338 G01R31/26

    CPC分类号: H01L21/28035 H01L22/20

    摘要: The present invention is generally directed to various methods of controlling gate electrode doping, and various systems for accomplishing same. In one illustrative embodiment, the method disclosed herein comprises performing at least one process operation to form a doped layer of gate electrode material, measuring a sheet resistance of the doped layer of gate electrode material and adjusting at least one parameter of at least one process if the measured sheet resistance does not fall within acceptable limits. In one embodiment, the system is comprised of a process tool for performing at least one process operation to form a doped layer of gate electrode material, a metrology tool for measuring a sheet resistance of the doped layer of gate electrode material and a controller for adjusting at least one parameter of at least one process operation if the measured sheet resistance of the doped layer of gate electrode material does not fall within acceptable limits.

    摘要翻译: 本发明一般涉及控制栅电极掺杂的各种方法,以及用于实现其的各种系统。 在一个说明性实施例中,本文公开的方法包括执行至少一个处理操作以形成栅电极材料的掺杂层,测量栅电极材料的掺杂层的薄层电阻并调整至少一个工艺的至少一个参数,如果 测量的薄层电阻不在可接受的限度内。 在一个实施例中,该系统包括用于执行至少一个处理操作以形成栅极电极材料的掺杂层的处理工具,用于测量栅电极材料的掺杂层的薄层电阻的计量工具和用于调整 如果所测量的栅极电极材料的掺杂层的薄层电阻不在可接受的限度内,则至少有一个工艺操作的至少一个参数。

    Method and apparatus for system state classification
    7.
    发明授权
    Method and apparatus for system state classification 有权
    系统状态分类的方法和装置

    公开(公告)号:US07065422B1

    公开(公告)日:2006-06-20

    申请号:US10185471

    申请日:2002-06-28

    申请人: Eric O. Green

    发明人: Eric O. Green

    IPC分类号: G06F19/00

    CPC分类号: G05B23/0221 G05B23/024

    摘要: A method for identifying a state of a manufacturing system includes defining at least one virtual sensor having a value. At least one state descriptor including a plurality of condition terms and a trigger probability is defined. Each condition term includes a function of the value of the virtual sensor. The condition terms are evaluated based on the value to determine a classification probability. The state is identified responsive to the classification probability being greater to or equal to the trigger probability. A manufacturing system including a plurality of tools, at least one virtual sensor, and a state classification unit is also provided.

    摘要翻译: 用于识别制造系统的状态的方法包括限定具有值的至少一个虚拟传感器。 定义包括多个条件项和触发概率的至少一个状态描述符。 每个条件项包括虚拟传感器的值的函数。 条件条件根据该值进行评估,以确定分类概率。 响应于分类概率大于或等于触发概率来识别状态。 还提供了包括多个工具,至少一个虚拟传感器和状态分类单元的制造系统。

    Advanced process control of the manufacture of an oxide-nitride-oxide stack of a memory device, and system for accomplishing same
    8.
    发明授权
    Advanced process control of the manufacture of an oxide-nitride-oxide stack of a memory device, and system for accomplishing same 失效
    存储器件的氧化物 - 氮化物 - 氧化物堆叠的制造的先进工艺控制和用于实现其的系统

    公开(公告)号:US06953697B1

    公开(公告)日:2005-10-11

    申请号:US10277357

    申请日:2002-10-22

    IPC分类号: H01L21/66 H01L21/8247

    CPC分类号: H01L22/12 Y10S438/954

    摘要: The present invention is generally directed to an advanced process control of the manufacture of memory devices, and a system for accomplishing same. In one illustrative embodiment, the method comprises performing at least one process operation to form at least one layer of an oxide-nitride-oxide stack of a memory cell, the stack being comprised of a first layer of oxide positioned above a first layer of polysilicon, a layer of silicon nitride positioned above the first layer of oxide, and a second layer of oxide positioned above the layer of silicon nitride. The method further comprises measuring at least one characteristic of at least one of the first layer of polysilicon, the first oxide layer, the layer of silicon nitride, and the second layer of oxide and adjusting at least one parameter of at least one process operation used to form at least one of the first oxide layer, the layer of silicon nitride and the second oxide layer if the measured at least one characteristic is not within acceptable limits.

    摘要翻译: 本发明一般涉及存储器件的制造的高级过程控制和用于实现其的系统。 在一个说明性实施例中,该方法包括执行至少一个处理操作以形成存储器单元的氧化物 - 氮化物 - 氧化物堆叠的至少一层,所述堆叠由位于第一多晶硅层之上的第一层氧化物 位于第一氧化物层之上的氮化硅层和位于氮化硅层上方的第二层氧化物。 该方法还包括测量第一多晶硅层,第一氧化物层,氮化硅层和第二氧化物层中的至少一个的至少一个特征,并且调整使用的至少一个工艺操作的至少一个参数 如果所测量的至少一个特性不在可接受的限度内,则形成第一氧化物层,氮化硅层和第二氧化物层中的至少一个。

    Method and apparatus for measuring performance of hierarchical test equipment
    10.
    发明授权
    Method and apparatus for measuring performance of hierarchical test equipment 有权
    用于测量分级测试设备性能的方法和装置

    公开(公告)号:US08301412B2

    公开(公告)日:2012-10-30

    申请号:US12411476

    申请日:2009-03-26

    IPC分类号: G06F15/00

    CPC分类号: G01R31/31907

    摘要: A method includes defining a hierarchy associated with a test system including a plurality of test units for testing integrated circuit devices. At least some of the test units have a plurality of sockets. The hierarchy includes a first level including a first plurality of entities each associated with one of the sockets and at least a second level including a second plurality of entities each associated with a grouping of the sockets. State data associated with operational states of the sockets is received. A set of state metrics is generated for each entity at each level of the hierarchy based on the state data. Each set of state metrics identifies time spent in the operational states.

    摘要翻译: 一种方法包括定义与包括用于测试集成电路设备的多个测试单元的测试系统相关联的层级。 至少一些测试单元具有多个插座。 层级包括第一级,包括与插座中的一个相关联的第一多个实体,以及包括与插座的分组相关联的第二多个实体的至少第二级。 接收与套接字的操作状态相关联的状态数据。 基于状态数据为层级的每个级别的每个实体生成一组状态度量。 每组状态度量标识在运行状态下花费的时间。