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    CBRAM/ReRAM with improved program and erase algorithms
    2.
    发明授权
    CBRAM/ReRAM with improved program and erase algorithms 有权
    CBRAM / ReRAM具有改进的编程和擦除算法

    公开(公告)号：US08659954B1

    公开(公告)日：2014-02-25

    申请号：US13548470

    申请日：2012-07-13

    申请人： Derric Lewis ,  Shane Hollmer ,  Vasudevan Gopalakrishnan ,  John Dinh ,  Foroozan Sarah Koushan ,  Juan Pablo Saenz Echeverry

    发明人： Derric Lewis ,  Shane Hollmer ,  Vasudevan Gopalakrishnan ,  John Dinh ,  Foroozan Sarah Koushan ,  Juan Pablo Saenz Echeverry

    IPC分类号： G11C7/00

    CPC分类号： G11C13/0069 ,  G11C13/0007 ,  G11C13/0011 ,  G11C13/0033 ,  G11C13/0061 ,  G11C13/0097 ,  G11C2013/0076 ,  G11C2013/0092

    摘要： Structures and methods for controlling operation of a programmable impedance element are disclosed herein. In one embodiment, a method of controlling a programmable impedance element can include: (i) receiving a program or erase command to be executed on the programmable impedance element; (ii) selecting an operation algorithm for executing the command, where the operation algorithm is selected from among a plurality of operation algorithms by decoding at least two bits stored in a register; (iii) determining, using the register, a plurality of option variables for the selected operation algorithm, where the option variables are used to set conditions for one or more of a plurality of program and erase operations of the selected operation algorithm; and (iv) executing the command on the programmable impedance element by performing the one or more of the plurality of program and erase operations of the selected operation algorithm.

    摘要翻译： 本文公开了用于控制可编程阻抗元件的操作的结构和方法。 在一个实施例中，控制可编程阻抗元件的方法可以包括：（i）接收要在可编程阻抗元件上执行的编程或擦除命令; （ii）选择用于执行命令的操作算法，其中通过解码存储在寄存器中的至少两个比特来从多个操作算法中选择操作算法; （iii）使用所述寄存器确定用于所选择的操作算法的多个选项变量，其中所述选项变量用于设置所选择的操作算法的多个编程和擦除操作中的一个或多个的条件; 以及（iv）通过执行所选择的操作算法的多个编程和擦除操作中的一个或多个来执行在可编程阻抗元件上的命令。

    Variable impedance memory element structures, methods of manufacture, and memory devices containing the same
    3.
    发明授权
    Variable impedance memory element structures, methods of manufacture, and memory devices containing the same 失效
    可变阻抗存储元件结构，制造方法和包含该可变阻抗存储元件结构的存储器件

    公开(公告)号：US08624219B1

    公开(公告)日：2014-01-07

    申请号：US13445389

    申请日：2012-04-12

    申请人： John Ross Jameson ,  Antonio R. Gallo ,  Foroozan Sarah Koushan ,  Michael A. Van Buskirk

    发明人： John Ross Jameson ,  Antonio R. Gallo ,  Foroozan Sarah Koushan ,  Michael A. Van Buskirk

    IPC分类号： H01L47/00

    CPC分类号： H01L45/085 ,  H01L45/122

    摘要： A memory device can include at least one cathode formed in first opening of a first insulating layer; at least one anode formed in a second opening of second insulating layer, the second insulating layer being a different vertical layer than the first insulating layer; and a memory layer comprising an ion conductor layer extending laterally between the at least one anode and cathode on the first insulating layer, the ion conductor layer having a thickness in the vertical direction less than a depth of the first opening.

    摘要翻译： 存储器件可以包括形成在第一绝缘层的第一开口中的至少一个阴极; 形成在第二绝缘层的第二开口中的至少一个阳极，所述第二绝缘层是与所述第一绝缘层不同的垂直层; 以及存储层，其包括在所述第一绝缘层上的所述至少一个阳极和阴极之间横向延伸的离子导体层，所述离子导体层的垂直方向的厚度小于所述第一开口的深度。

    Resistive Devices and Methods of Operation Thereof
    5.
    发明申请
    Resistive Devices and Methods of Operation Thereof 有权
    电阻器件及其操作方法

    公开(公告)号：US20140003125A1

    公开(公告)日：2014-01-02

    申请号：US13610690

    申请日：2012-09-11

    申请人： Foroozan Sarah Koushan ,  Michael A. Van Buskirk

    发明人： Foroozan Sarah Koushan ,  Michael A. Van Buskirk

    IPC分类号： G11C11/00

    CPC分类号： G11C13/003 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0009 ,  G11C13/0011 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0071 ,  G11C2013/0092 ,  G11C2213/74 ,  G11C2213/79

    摘要： In accordance with an embodiment of the present invention, a method of operating a resistive switching device includes applying a signal including a pulse on a first access terminal of an access device having the first access terminal and a second access terminal. The second access terminal is coupled to a first terminal of a two terminal resistive switching device. The resistive switching device has the first terminal and a second terminal. The resistive switching device has a first state and a second state. The pulse includes a first ramp from a first voltage to a second voltage over a first time period, a second ramp from the second voltage to a third voltage over a second time period, and a third ramp from the third voltage to a fourth voltage over a third time period. The second ramp and the third ramp have an opposite slope to the first ramp. The sum of the first time period and the second time period is less than the third time period.

    摘要翻译： 根据本发明的实施例，一种操作电阻式交换设备的方法包括：在具有第一接入终端的接入设备的第一接入终端和第二接入终端上应用包括脉冲的信号。 第二接入终端耦合到两端电阻式交换设备的第一终端。 电阻式开关装置具有第一端子和第二端子。 电阻式开关装置具有第一状态和第二状态。 脉冲包括在第一时间段内从第一电压到第二电压的第一斜坡，在第二时间段内从第二电压到第三电压的第二斜坡，以及从第三电压到第四电压的第三斜坡 第三个时期。 第二斜坡和第三斜坡与第一坡道具有相反的斜坡。 第一时间段和第二时间段的总和小于第三时间段。

    Resistive devices and methods of operation thereof
    7.
    发明授权
    Resistive devices and methods of operation thereof 有权
    电阻装置及其操作方法

    公开(公告)号：US08953362B2

    公开(公告)日：2015-02-10

    申请号：US13610690

    申请日：2012-09-11

    申请人： Foroozan Sarah Koushan ,  Michael A. Van Buskirk

    发明人： Foroozan Sarah Koushan ,  Michael A. Van Buskirk

    IPC分类号： G11C11/00 ,  G11C7/10 ,  G11C13/00

    CPC分类号： G11C13/003 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0009 ,  G11C13/0011 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0071 ,  G11C2013/0092 ,  G11C2213/74 ,  G11C2213/79

    摘要： In accordance with an embodiment of the present invention, a method of operating a resistive switching device includes applying a signal including a pulse on a first access terminal of an access device having the first access terminal and a second access terminal. The second access terminal is coupled to a first terminal of a two terminal resistive switching device. The resistive switching device has the first terminal and a second terminal. The resistive switching device has a first state and a second state. The pulse includes a first ramp from a first voltage to a second voltage over a first time period, a second ramp from the second voltage to a third voltage over a second time period, and a third ramp from the third voltage to a fourth voltage over a third time period. The second ramp and the third ramp have an opposite slope to the first ramp. The sum of the first time period and the second time period is less than the third time period.

    摘要翻译： 根据本发明的实施例，一种操作电阻式交换设备的方法包括：在具有第一接入终端的接入设备的第一接入终端和第二接入终端上应用包括脉冲的信号。 第二接入终端耦合到两端电阻式交换设备的第一终端。 电阻式开关装置具有第一端子和第二端子。 电阻式开关装置具有第一状态和第二状态。 脉冲包括在第一时间段内从第一电压到第二电压的第一斜坡，在第二时间段内从第二电压到第三电压的第二斜坡，以及从第三电压到第四电压的第三斜坡 第三个时期。 第二斜坡和第三斜坡与第一坡道具有相反的斜坡。 第一时间段和第二时间段的总和小于第三时间段。