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公开(公告)号：US6157243A
公开(公告)日：2000-12-05
申请号：US371549
申请日：1999-08-10
摘要： A device for generating a high voltage includes a charge pump device that outputs a high voltage, an oscillator that supplies at least one clock signal to the charge pump device, and a regulation device. The regulation device generates a control signal to selectively stop the charge pump device based on the level of the high voltage output by the charge pump device. Additionally, the oscillator includes a shaping circuit for shaping the clock signal into a saw-tooth waveform. In a preferred embodiment, the oscillator supplies at least two clock signals to the charge pump device, and each of the clock signals has a saw-tooth waveform. A method for generating a high voltage in an integrated circuit is also provided. According to the method, at least one clock signal is generated, and the clock signal is shaped into a saw-tooth waveform. The shaped clock signal is used to generate a high voltage, and the generation of the high voltage is selectively stopped based on the level of the high voltage. In one preferred method, at least two clock signals are generated, and each of the generated clock signals is shaped in to a saw-tooth waveform.
摘要翻译： 用于产生高电压的装置包括输出高电压的电荷泵装置，向电荷泵装置提供至少一个时钟信号的振荡器和调节装置。 调节装置产生控制信号，以基于电荷泵装置输出的高电压电平选择性地停止电荷泵装置。 此外，该振荡器包括整形电路，用于将时钟信号整形成锯齿形波形。 在优选实施例中，振荡器向电荷泵装置提供至少两个时钟信号，并且每个时钟信号具有锯齿形波形。 还提供了一种用于在集成电路中产生高电压的方法。 根据该方法，产生至少一个时钟信号，并且时钟信号被成形为锯齿形波形。 形状的时钟信号用于产生高电压，并且基于高电压的电平选择性地停止高电压的产生。 在一种优选的方法中，产生至少两个时钟信号，并且所生成的每个时钟信号被成形为锯齿形波形。
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公开(公告)号：US5812802A
公开(公告)日：1998-09-22
申请号：US786348
申请日：1997-01-23
CPC分类号： G06F1/22 , G06F13/4072
摘要： In order to reduce the number of lines of a standard bus while, at the same time, preserving the compatibility of the communications protocol, the system uses a modified bus. The modification consists in eliminating two power supply lines and in creating a line assigned to a functional signal that is complementary to one of the functional signals of the system. The supply potentials are regenerated from the functional signal and the complementary signal. The disclosed system can be applied notably to systems using I2C buses such as systems using chip-card readers.
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公开(公告)号：US5812446A
公开(公告)日：1998-09-22
申请号：US623044
申请日：1996-03-28
CPC分类号： G06F12/1441 , G11C8/20
摘要： The disclosure relates to integrated circuits and methods in which it is desired to implement a partition of a memory between a protected zone and a non-protected zone, the dimensions of the protected zone being defined by a customer of the memory. A disclosed method avoids the use of special instructions to define these dimensions. The method includes writing sensitive information elements by starting at an address ADP, and ending at an address ADFM dictated by the circuit. The writing in the address ADFM automatically triggers a sequence for storing, in a non-volatile register RV, the first written address, and a sequence for the activation of a system for the protection of the zone between the addresses ADP and ADFM.
摘要翻译： 本公开涉及集成电路和方法，其中期望在保护区域和非保护区域之间实现存储器的分区，保护区域的维度由存储器的客户定义。 所公开的方法避免使用特殊说明来定义这些尺寸。 该方法包括通过从地址ADP开始并以由电路指定的地址ADFM结束来写入敏感信息元素。 地址ADFM中的写入会自动触发一个序列，用于在非易失性寄存器RV中存储第一个写入的地址，以及用于激活用于保护地址ADP和ADFM之间的区域的系统的序列。
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公开(公告)号：US5661324A
公开(公告)日：1997-08-26
申请号：US399900
申请日：1995-03-08
IPC分类号： H01L21/8234 , H01L27/07 , H01L27/088 , H03B5/20 , H03K3/0231 , H03K3/86 , H01L29/76
CPC分类号： H03K3/86 , H01L27/0727 , H03K3/0231
摘要： A resistor-capacitor-transistor type of integrated circuit comprises mainly a non-self-aligned N diffusion bar 1 covered with a polysilicon plate, and a drain type N diffusion, self-aligned by the polysilicon plate. The resulting structure is a distributed resistor-capacitor-transistor quadripole whose main characteristics are that it is very compact and that the time taken by the capacitor to get discharged through the transistor is independent of the dimensions of the structure.
摘要翻译： 电阻 - 电容 - 晶体管类型的集成电路主要包括被多晶硅板覆盖的非自对准N扩散棒1和由多晶硅板自对准的漏极型N扩散。 所得到的结构是分布式电阻 - 电容 - 晶体管四极管，其主要特点是非常紧凑，并且电容器通过晶体管放电所花费的时间与结构的尺寸无关。
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公开(公告)号：US5604702A
公开(公告)日：1997-02-18
申请号：US306500
申请日：1994-09-15
CPC分类号： G11C29/76
摘要： To prompt a repairing operation as and when defective cells appear in an integrated circuit memory, there is provided an auxiliary memory related to a programmable comparator. Whenever the cells of the memory are to be read, the auxiliary memory is read and its content is compared with the address selected in the memory array. The result of this comparison produces, in real time, the addressing signals of a redundant cell and signals for the neutralization of the initially encountered cell. This system can be used more particularly in the field of EEPROM type memories.
摘要翻译： 为了在故障单元出现在集成电路存储器中和当故障单元出现时提示修复操作，提供了与可编程比较器有关的辅助存储器。 只要读取存储器的单元，将读取辅助存储器并将其内容与存储器阵列中选择的地址进行比较。 该比较的结果实时地产生冗余单元的寻址信号和用于中和初始遇到的单元的信号。 该系统可以更具体地用于EEPROM型存储器领域。
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6.发明授权
公开(公告)号：US5903424A
公开(公告)日：1999-05-11
申请号：US758375
申请日：1996-12-02
CPC分类号： H01L27/0262 , H01L27/0259 , H01L29/87
摘要： In a device for the protection of integrated circuits against electrostatic discharges, the protection structure comprises a thyristor with an N+ region connected to the ground, a P- substrate, a deep N- well forming a gate region, and a P+ region connected to an external connection pad to be protected. The gate region is connected by a low-value resistor (with a maximum value of a few ohms) to the pad. This resistor increases the current for which the thyristor gets triggered and eliminates certain risks of the destruction of the circuit.
摘要翻译： 在用于保护针对静电放电的集成电路的装置中，保护结构包括具有连接到地的N +区的晶闸管，P-衬底，形成栅极区的深N阱和连接到栅极区的P +区 外部连接垫要保护。 栅极区域通过低电阻（最大值为几欧姆）连接到焊盘。 该电阻增加了晶闸管触发的电流，并消除了电路破坏的一些风险。
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公开(公告)号：US5801577A
公开(公告)日：1998-09-01
申请号：US762677
申请日：1996-12-11
CPC分类号： H02M3/07
摘要： A circuit including a network of capacitors and switching transistors having two modes of functioning. The first mode isolates all the capacitors and simultaneously charges them to the level of the supply voltage. The second mode connects all these capacitors in series between the supply voltage Vdd and an output node of the network in order to instantaneously increase the voltage level of this output node to a voltage level that is greater than the supply voltage Vdd. The capacitors are all connected in series by transistors that are placed between them and controlled by a signal that has a peak voltage that is greater than the voltage to be switched to the output node of the network.
摘要翻译： 包括具有两种功能模式的电容器网络和开关晶体管的电路。 第一种模式将所有电容器分开，同时将它们充电到电源电压。 第二模式将所有这些电容器串联连接在电源电压Vdd和网络的输出节点之间，以便将该输出节点的电压瞬时增加到大于电源电压Vdd的电压电平。 电容器都通过放置在它们之间的晶体管串联连接，并由具有大于要切换到网络的输出节点的电压的峰值电压的信号控制。
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8.发明授权Device for the protection of an integrated circuit against electrostatic discharges 失效用于保护集成电路免受静电放电的装置
公开(公告)号：US5548134A
公开(公告)日：1996-08-20
申请号：US53606
申请日：1993-04-27
CPC分类号： H01L27/0262 , H01L27/0259 , H01L29/87
摘要： In a device for the protection of integrated circuits against electrostatic discharges, the protection structure comprises a thyristor with an N+ region connected to the ground, a P- substrate, a deep N- well forming a gate region, and a P+ region connected to an external connection pad to be protected. The gate region is connected by a low-value resistor (with a maximum value of a few ohms) to the pad. This resistor increases the current for which the thyristor gets triggered and eliminates certain risks of the destruction of the circuit.
摘要翻译： 在用于保护针对静电放电的集成电路的装置中，保护结构包括具有连接到地的N +区的晶闸管，P-衬底，形成栅极区的深N阱和连接到栅极区的P +区 外部连接垫要保护。 栅极区域通过低电阻（最大值为几欧姆）连接到焊盘。 该电阻增加了晶闸管触发的电流，并消除了电路破坏的一些风险。
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公开(公告)号：US5969403A
公开(公告)日：1999-10-19
申请号：US678148
申请日：1996-07-11
CPC分类号： H01L27/0251 , H01L27/0248
摘要： A fuse for an integrated circuit is constituted by a shallow NP junction, covered with a metal contact, the semiconductor region being not excessively doped. For the blowing of the fuse, the junction is forward biased with a current sufficient to enable a diffusion of metal up to the junction. This short-circuits the junction. The detection is done also by the forward biasing of the junction, but with a low current or a low voltage. The detection can also be done with reverse biasing.
摘要翻译： 用于集成电路的熔断器由覆盖有金属接触的浅NP结构成，半导体区域不被过度掺杂。 为了熔断熔断器，结点被正向偏置，其电流足以使金属扩散到结点。 这会使接合点短路。 该检测也通过结的正向偏置来实现，但是具有低电流或低电压。 也可以通过反向偏置进行检测。
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公开(公告)号：US5903141A
公开(公告)日：1999-05-11
申请号：US791383
申请日：1997-01-30
CPC分类号： G05F3/262 , Y10S323/907
摘要： A current reference device in integrated circuit form with a reference resistor includes a first MOS transistor and a second MOS transistor having the same type of conductivity, the first transistor having its gate and its drain connected together to a first terminal of the reference resistor, the second transistor having its gate and its drain connected together to a second terminal of the reference resistor, the first transistor having a threshold voltage greater than that of the second transistor, these two transistors being biased in saturated mode, the source of each of these transistors being biased at the same potential as the substrate or the well in which the transistor is made.
摘要翻译： 具有参考电阻器的集成电路形式的电流参考装置包括具有相同类型导电性的第一MOS晶体管和第二MOS晶体管，其第一晶体管的栅极和漏极连接到参考电阻器的第一端子， 第二晶体管的栅极和漏极连接在基准电阻的第二端子上，第一晶体管的阈值电压大于第二晶体管的阈值电压，这两个晶体管以饱和模式被偏置，这些晶体管的源极 被偏置在与制造晶体管的衬底或阱相同的电位。
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