公开(公告)号：US20130293292A1

公开(公告)日：2013-11-07

申请号：US13976562

申请日：2011-09-30

Applicant: Guido Droege ,  Niklas Linkewitsch ,  Andre Schaefer

Inventor： Guido Droege ,  Niklas Linkewitsch ,  Andre Schaefer

IPC: H01L23/522

CPC classification number: H01L25/0657 ,  G11C5/04 ,  G11C5/063 ,  G11C7/1057 ,  G11C7/1084 ,  H01L23/481 ,  H01L23/5223 ,  H01L23/642 ,  H01L2223/6622 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2225/06544

Abstract: Some embodiments provide capacitive AC coupling inter-layer communications for 3D stacked modules.

公开(公告)号：US20080002801A1

公开(公告)日：2008-01-03

申请号：US11478268

申请日：2006-06-29

Applicant: Guido Droege ,  Uwe Zillmann

Inventor： Guido Droege ,  Uwe Zillmann

IPC: H03D3/24

CPC classification number: H03D13/002 ,  H03L1/026 ,  H03L7/089 ,  H03L7/10 ,  H03L7/18

Abstract: A clock generator with a fast settling time features a coarse-tuning circuit that is executed a single time, and a fine-tuning circuit that is executed periodically. The fine-tuning circuit sends an analog voltage to a voltage-controlled oscillator (VCO). The coarse-tuning circuit sends a load capacitance parameter to the VCO. The analog voltage and the load capacitance are used to program the VCO, which generates a clock signal. The coarse-tuning circuit and the fine-tuning circuit include registers that store the load capacitance and analog voltage information, respectively, in digital form. When switching of the oscillator occurs, the clock generator quickly produces a clock signal in accordance with the stored digital values.

Abstract translation: 具有快速建立时间的时钟发生器具有单次执行的粗调电路和周期性执行的微调电路。 微调电路将模拟电压发送到压控振荡器（VCO）。 粗调电路向VCO发送负载电容参数。 模拟电压和负载电容用于对产生时钟信号的VCO进行编程。 粗调电路和微调电路分别包含以数字形式存储负载电容和模拟电压信息的寄存器。 当振荡器发生切换时，时钟发生器根据存储的数字值快速产生时钟信号。

公开(公告)号：US09000577B2

公开(公告)日：2015-04-07

申请号：US13976562

申请日：2011-09-30

Applicant: Guido Droege ,  Niklas Linkewitsch ,  Andre Schaefer

Inventor： Guido Droege ,  Niklas Linkewitsch ,  Andre Schaefer

IPC: H01L23/02 ,  H01L23/522 ,  H01L25/065 ,  H01L23/64 ,  H01L23/48

CPC classification number: H01L25/0657 ,  G11C5/04 ,  G11C5/063 ,  G11C7/1057 ,  G11C7/1084 ,  H01L23/481 ,  H01L23/5223 ,  H01L23/642 ,  H01L2223/6622 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2225/06544

Abstract: Some embodiments provide capacitive AC coupling inter-layer communications for 3D stacked modules.

Abstract translation: 一些实施例为3D堆叠模块提供电容AC耦合层间通信。

公开(公告)号：US20150003181A1

公开(公告)日：2015-01-01

申请号：US13927227

申请日：2013-06-26

Applicant: Guido Droege ,  Andre Schaefer ,  Uwe Zillmann

Inventor： Guido Droege ,  Andre Schaefer ,  Uwe Zillmann

IPC: G11C5/14

CPC classification number: H02J1/00 ,  G05F1/618 ,  G11C5/025 ,  G11C5/14 ,  G11C5/147 ,  G11C7/00 ,  H01L2924/19042 ,  H01L2924/19104 ,  H02M1/088

Abstract: An apparatus such as heterogeneous device includes at least a first die and a second die. The apparatus further includes a first inductive element, a second inductive element, and switch control circuitry. The switch control circuitry is disposed in the first die. The switch control circuitry controls current through the first inductive element to produce a first voltage. The first voltage powers the first die. The second inductive element is coupled to the first inductive element. The second inductive element produces a second voltage to power the second die. The first die and second die can be fabricated in accordance with different technologies and in which the first die and second die withstand different maximum voltages. A magnitude of the first voltage can be greater than a magnitude of the second voltage.

Abstract translation: 诸如异种装置的装置至少包括第一模具和第二模具。 该装置还包括第一电感元件，第二电感元件和开关控制电路。 开关控制电路设置在第一管芯中。 开关控制电路控制通过第一电感元件的电流以产生第一电压。 第一个电压为第一个模具供电。 第二电感元件耦合到第一电感元件。 第二电感元件产生第二电压以对第二管芯供电。 第一模具和第二模具可以根据不同的技术制造，并且其中第一模具和第二模具耐受不同的最大电压。 第一电压的大小可以大于第二电压的幅度。

公开(公告)号：US20170040255A1

公开(公告)日：2017-02-09

申请号：US15038623

申请日：2013-12-23

Applicant: Uwe ZILLMANN ,  Andre SCHAEFER ,  Ruchir SARASWAT ,  Guido DROEGE ,  Rinkle JAIN ,  Nicholas P. COWLEY ,  INTEL CORPORATION

Inventor： KEVIN J. LEE ,  RUCHIR SARASWAT ,  UWE ZILLMANN ,  NICHOLAS P. COWLEY ,  ANDRE SCHAEFER ,  RINKLE JAIN ,  GUIDO DROEGE

IPC: H01L23/522 ,  H01L21/822 ,  H01L23/492 ,  H01L21/48 ,  H01L27/06 ,  H01L23/498

CPC classification number: H01L23/5223 ,  H01L21/4846 ,  H01L21/486 ,  H01L21/4875 ,  H01L21/76898 ,  H01L21/8221 ,  H01L23/481 ,  H01L23/492 ,  H01L23/498 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L25/0657 ,  H01L27/0629 ,  H01L28/90 ,  H01L2225/06544 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Techniques are disclosed for forming a through-body-via (TBV) isolated coaxial capacitor in a semiconductor die. In some embodiments, a cylindrical capacitor provided using the disclosed techniques may include, for example, a conductive TBV surrounded by a dielectric material and an outer conductor plate. The TBV and outer plate can be formed, for example, so as to be self-aligned with one another in a coaxial arrangement, in accordance with some embodiments. The disclosed capacitor may extend through the body of a host die such that its terminals are accessible on the upper and/or lower surfaces thereof. Thus, in some cases, the host die can be electrically connected with another die to provide a die stack or other three-dimensional integrated circuit (3D IC), in accordance with some embodiments. In some instances, the disclosed capacitor can be utilized, for example, to provide integrated capacitance in a switched-capacitor voltage regulator (SCVR).

Abstract translation: 公开了用于在半导体管芯中形成通孔通孔（TBV）隔离同轴电容器的技术。 在一些实施例中，使用所公开的技术提供的圆柱形电容器可以包括例如由介电材料和外导体板包围的导电TBV。 根据一些实施例，TBV和外板可以形成为例如以同轴布置彼此自对准。 所公开的电容器可以延伸穿过主模具的主体，使得其端子在其上表面和/或下表面上可接近。 因此，根据一些实施例，在一些情况下，主体管芯可以与另一个管芯电连接以提供管芯堆叠或其他三维集成电路（3D IC）。 在一些情况下，所公开的电容器可用于例如在开关电容器电压调节器（SCVR）中提供集成电容。

公开(公告)号：US20140092574A1

公开(公告)日：2014-04-03

申请号：US13631092

申请日：2012-09-28

Applicant: Uwe ZILLMANN ,  Andre SCHAEFER ,  Ruchir SARASWAT ,  Telesphor KAMGAING ,  Paul B. FISCHER ,  Guido DROEGE

Inventor： Uwe ZILLMANN ,  Andre SCHAEFER ,  Ruchir SARASWAT ,  Telesphor KAMGAING ,  Paul B. FISCHER ,  Guido DROEGE

IPC: H05K7/02 ,  H05K3/30

CPC classification number: G06F1/3296 ,  H01L2924/0002 ,  H05K1/0262 ,  H05K1/165 ,  Y02D10/172 ,  Y10T29/4913 ,  H01L2924/00

Abstract: Magnetically enhanced inductors integrated with microelectronic devices at chip-level. In embodiments, magnetically enhanced inductors include a through substrate vias (TSVs) with fill metal to carry an electrical current proximate to a magnetic layer disposed on a substrate through which the TSV passes. In certain magnetically enhanced inductor embodiments, a TSV fill metal is disposed within a magnetic material lining the TSV. In certain magnetically enhanced inductor embodiments, a magnetically enhanced inductor includes a plurality of interconnected TSVs disposed proximate to a magnetic material layer on a side of a substrate. In embodiments, voltage regulation circuitry disposed on a first side of a substrate is integrated with one or more magnetically enhanced inductors utilizing a TSV passing through the substrate. In further embodiments, integrated circuitry on a same substrate as the magnetically enhanced inductor, or on another substrate stacked thereon, completes the VR and/or is powered by the VR circuitry.

Abstract translation: 在芯片级与微电子器件集成的磁性增强型电感器。 在实施例中，磁增强电感器包括具有填充金属的穿通衬底通孔（TSV），以承载靠近设置在TSV通过的衬底上的磁性层的电流。 在某些磁增强电感器实施例中，TSV填充金属设置在衬在TSV内的磁性材料内。 在某些磁增强电感器实施例中，磁增强电感器包括靠近基板一侧的磁性材料层设置的多个互连TSV。 在实施例中，设置在衬底的第一侧上的电压调节电路与利用穿过衬底的TSV的一个或多个磁增强电感器集成。 在另外的实施例中，在与磁增强电感器相同的衬底上或在其上堆叠的另一衬底上的集成电路完成VR和/或由VR电路供电。