公开(公告)号：US20090206410A1

公开(公告)日：2009-08-20

申请号：US12320186

申请日：2009-01-21

申请人： Hitoshi Mitani

发明人： Hitoshi Mitani

IPC分类号： H01L27/088 ,  H01L21/28 ,  H01L29/78

CPC分类号： H01L21/823807 ,  H01L27/092 ,  H01L29/7843

摘要： Semiconductor devices required forming a stress control film to handle different stresses on each side when optimizing the stress on the respective P channel and N channel sections. A unique feature of the semiconductor device of this invention is that P and N channel stress are respectively optimized by making use of a stress control film jointly for the P and N channels that conveys stress in different directions by utilizing the film thickness.

摘要翻译： 半导体器件需要形成一个应力控制薄膜来处理各个P沟道和N个沟道部分上的应力时在每一侧上的不同应力。 本发明的半导体器件的独特之处在于，通过利用应力控制膜分别优化P和N沟道应力，用于通过利用膜厚度在不同方向传递应力的P沟道和N沟道。

公开(公告)号：US6031291A

公开(公告)日：2000-02-29

申请号：US550159

申请日：1995-10-30

申请人： Norifumi Sato ,  Takami Hiruma ,  Hitoshi Mitani ,  Hidetaka Natsume

发明人： Norifumi Sato ,  Takami Hiruma ,  Hitoshi Mitani ,  Hidetaka Natsume

IPC分类号： H01L27/11 ,  H01L21/28 ,  H01L21/8244 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L29/76

CPC分类号： H01L21/76895 ,  H01L21/0276 ,  H01L21/76816 ,  H01L27/11 ,  H01L27/1112

摘要： A semiconductor device having a semiconductor substrate, an impurity diffused layer formed in a principal surface of the semiconductor substrate, a conductive member formed on the semiconductor substrate adjacent to the impurity diffused layer and having a sloped surface inclined to the principal surface of the semiconductor substrate, an insulator film deposited to cover the impurity diffused layer and the conductive member, and a common contact hole formed through the insulator film to extend over a surface of the impurity diffused layer and the sloped surface of the conductive member.

摘要翻译： 一种具有半导体衬底的半导体器件，形成在半导体衬底的主表面上的杂质扩散层，形成在与半导体衬底相邻的杂质扩散层上并具有倾斜表面的半导体衬底的主表面的导电部件 沉积以覆盖杂质扩散层和导电构件的绝缘膜，以及通过绝缘膜形成的公共接触孔，以在杂质扩散层的表面和导电构件的倾斜表面上延伸。

公开(公告)号：US20090001497A1

公开(公告)日：2009-01-01

申请号：US12164507

申请日：2008-06-30

申请人： Hitoshi MITANI

发明人： Hitoshi MITANI

IPC分类号： H01L31/0216 ,  H01L23/02

CPC分类号： H01L27/11206 ,  H01L23/552 ,  H01L27/10 ,  H01L27/105 ,  H01L27/1214 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor integrated circuit device includes a substrate having a PROM formed thereon in which the data memory state of the PROM is changed by the irradiation of light, and a multilayer wiring structure formed on the same side of the substrate as the PROM is formed. The multilayer wiring structure includes a transparent area, a shield area, and a PAD portion. The transparent area is formed from transparent material at a position opposite to the PROM area where the PROM is formed, and used as a light guiding path from the outside of the multilayer wiring structure to the PROM. The shield area is formed continuously from shielding materials arranged in several layers in the periphery of the transparent area. The PAD portion is formed on the outside of the shield area in regard to the transparent area, and controls the memory state of the PROM.

摘要翻译： 半导体集成电路器件包括其上形成有PROM的衬底，其中PROM的数据存储状态由于光的照射而改变，并且形成在与PROM相同的衬底的同一侧上的多层布线结构。 多层布线结构包括透明区域，屏蔽区域和PAD部分。 透明区域由与形成PROM的PROM区域相反的位置处的透明材料形成，并且用作从多层布线结构的外部到PROM的导光路径。 屏蔽区域从在透明区域的周边排列成几层的屏蔽材料连续地形成。 相对于透明区域，PAD部分形成在屏蔽区域的外侧，并且控制PROM的存储状态。

公开(公告)号：US06466233B1

公开(公告)日：2002-10-15

申请号：US09443808

申请日：1999-11-19

申请人： Hitoshi Mitani

发明人： Hitoshi Mitani

IPC分类号： G06F1700

CPC分类号： H04N21/4126 ,  H04N5/44582 ,  H04N7/163 ,  H04N21/4316 ,  H04N21/43632 ,  H04N21/4622 ,  H04N21/47 ,  H04N2005/4441

摘要： An information processing unit controls a plurality of electronic devices. The information processing unit includes a storage unit for storing input graphical-user-interface data on the electronic devices, a display unit for displaying graphical user interfaces corresponding to the graphical-user-interface data stored in the storage unit, a detecting unit for detecting user operations corresponding to the graphical user interfaces displayed on the display unit, and a transmitting unit for transmitting control signals controlling the electronic devices in accordance with the results of detection by the detecting unit.

摘要翻译： 信息处理单元控制多个电子设备。 信息处理单元包括用于在电子设备上存储输入图形用户界面数据的存储单元，用于显示与存储在存储单元中的图形用户界面数据相对应的图形用户界面的显示单元，检测单元 与显示单元上显示的图形用户界面相对应的用户操作，以及发送单元，用于根据检测单元的检测结果发送控制电子设备的控制信号。

公开(公告)号：US5770495A

公开(公告)日：1998-06-23

申请号：US548913

申请日：1995-10-26

申请人： Nolifumi Sato ,  Shinji Ohara ,  Hitoshi Mitani ,  Hidetaka Natsume ,  Takami Hiruma

发明人： Nolifumi Sato ,  Shinji Ohara ,  Hitoshi Mitani ,  Hidetaka Natsume ,  Takami Hiruma

IPC分类号： H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/8247 ,  H01L23/52 ,  H01L23/522 ,  H01L27/088 ,  H01L29/786 ,  H01L29/788 ,  H01L29/792 ,  H01L21/283 ,  H01L21/8244

CPC分类号： H01L21/28518

摘要： The invention provides a method of fabricating a semiconductor device, including the steps of (a) forming an impurity region at a surface of a silicon substrate, (b) depositing an insulative film over the silicon substrate, (c) forming a contact hole through the insulative film to expose the impurity region of the silicon substrate, (d) forming an electrode wiring over the contact hole, the electrode wiring comprising a refractory metal silicide film and a silicon film overlying on the metal silicide film, the metal silicide film overlying the exposed impurity region, (e) depositing a second insulative film over a resultant, (f) depositing a polysilicon film on the second insulative film, (g) patterning the polysilicon film to form an element, and (h) heat-treating a resultant at high temperature in oxidizing atmosphere. The step (h) is to be carried out at any time after the step (f) has been completed. In the method, even if a semiconductor device is heat-treated at high temperature in oxidizing atmosphere, there occurs no voids in the silicon substrate below the refractory metal silicide film. This is because silicon atoms are supplied from the silicon film overlying on the refractory metal silicide film to the metal silicide film. Thus, reliable electrical connection between the electrode wiring and the silicon substrate is ensured.

摘要翻译： 本发明提供一种制造半导体器件的方法，包括以下步骤：（a）在硅衬底的表面形成杂质区，（b）在硅衬底上沉积绝缘膜，（c）形成接触孔 所述绝缘膜暴露所述硅衬底的杂质区域，（d）在所述接触孔上形成电极布线，所述电极布线包括难熔金属硅化物膜和覆盖在所述金属硅化物膜上的硅膜，所述金属硅化物膜覆盖 暴露的杂质区域，（e）在结果上沉积第二绝缘膜，（f）在第二绝缘膜上沉积多晶硅膜，（g）图案化多晶硅膜以形成元件，和（h）热处理 在高温氧化气氛中产生。 步骤（h）将在步骤（f）完成后的任何时间进行。 在该方法中，即使半导体器件在氧化气氛中在高温下进行热处理，硅基底中的难熔金属硅化物膜下面也不会发生空隙。 这是因为硅原子从覆盖在难熔金属硅化物膜上的硅膜供应到金属硅化物膜。 因此，确保电极布线和硅基板之间的可靠的电连接。

公开(公告)号：US5761113A

公开(公告)日：1998-06-02

申请号：US550348

申请日：1995-10-30

申请人： Hidetaka Natsume ,  Nolifumi Sato ,  Hitoshi Mitani ,  Takami Hiruma

发明人： Hidetaka Natsume ,  Nolifumi Sato ,  Hitoshi Mitani ,  Takami Hiruma

IPC分类号： H01L27/10 ,  G11C11/412 ,  G11C11/00

CPC分类号： G11C11/4125

摘要： In an SRAM cell including two cross-coupled inverters each having a first resistance element and a drive MOS transistor, a second resistance element is connected between the first and the drive MOS transistor. A gate electrode of the drive MOS transistor of one of the inverters is connected between the first and second resistance elements of the other.

摘要翻译： 在包括两个具有第一电阻元件和驱动MOS晶体管的交叉耦合反相器的SRAM单元中，第二电阻元件连接在第一驱动MOS晶体管和驱动MOS晶体管之间。 其中一个逆变器的驱动MOS晶体管的栅电极连接在第一和第二电阻元件之间。

公开(公告)号：US5287733A

公开(公告)日：1994-02-22

申请号：US765151

申请日：1991-09-23

申请人： Narihiro Oku ,  Hitoshi Mitani ,  Hiroaki Takahasi

发明人： Narihiro Oku ,  Hitoshi Mitani ,  Hiroaki Takahasi

IPC分类号： G01N33/49 ,  G01N15/10 ,  G01N35/00 ,  G01N35/10 ,  G01N33/48

CPC分类号： G01N15/10 ,  G01N35/00 ,  G01N35/1004 ,  G01N35/1083

摘要： A system collects fluid waste within a closed waste vessel where a waste disposal cycle is determined based upon the pressure level within the waste vessel. In the preferred embodiment, a closed liquid waste vessel accepts waste solutions through conduits having valves controlling conduit fluid communication with treatment vessels. A pressure sensor determines the level of pressure within the waste vessel. A pressurizing device reduces the level of pressure within the vessel. When the pressure within the vessel is lowered to a predetermined level, the valve is opened. When the pressure sensed within the liquid waste vessel then rises above an appointed value, the valve is closed, completing the waste collection of a treated sample. This corresponds to the point in time when the treatment vessel is empty, allowing a sudden rush of air into the waste vessel, raising the vessel pressure to ambient and closing the valve. When the pressure in the waste vessel does not rise to the appointed value after the lapse of a preset length of time, a warning signal is provided advising that the system is not working properly.

摘要翻译： 系统在封闭的废物容器内收集流体废物，其中基于废物容器内的压力水平来确定废物处理循环。 在优选实施例中，封闭的液体废物容器通过具有控制导管与流体与处理容器连通的阀的管道接收废液。 压力传感器确定废液容器内的压力水平。 加压装置降低了容器内的压力水平。 当容器内的压力降低至预定水平时，阀打开。 当在液体废物容器内感测到的压力升高到高于指定值时，阀门关闭，完成处理过的样品的废物收集。 这对应于处理容器为空的时间点，允许空气急剧地进入废物容器，将容器压力升高到环境并关闭阀门。 当经过预设时间后废物容器中的压力不会上升到指定值时，提供警告信号，建议系统不能正常工作。

公开(公告)号：US08098324B2

公开(公告)日：2012-01-17

申请号：US12940176

申请日：2010-11-05

申请人： Ichiro Ueno ,  Hitoshi Mitani ,  Baiping Liao

发明人： Ichiro Ueno ,  Hitoshi Mitani ,  Baiping Liao

IPC分类号： H04N5/225

CPC分类号： H04N1/32128 ,  G01S19/34 ,  H04N1/00885 ,  H04N1/00904 ,  H04N2101/00 ,  H04N2201/3253 ,  H04N2201/3274

摘要： An imaging device includes an imaging unit configured to execute processing to capture image data, a global positioning system (GPS) device configured to execute position calculation processing based on data received from a satellite, and a main controller configured to measure an imaging frequency of the imaging unit, to determine or update a control parameter as a condition for a transition of an operation state of the GPS device based on the measured imaging frequency, and to cause a transition of the operation state of the GPS device based on the determined or updated control parameter.

摘要翻译： 一种成像装置，包括被配置为执行捕获图像数据的处理的成像单元，被配置为基于从卫星接收的数据执行位置计算处理的全球定位系统（GPS）装置，以及被配置为测量所述卫星的成像频率的主控制器 成像单元，基于测量的成像频率来确定或更新控制参数作为用于GPS设备的操作状态的转变的条件，并且基于所确定或更新的GPS设备的操作状态的转变 控制参数。

公开(公告)号：US07875954B2

公开(公告)日：2011-01-25

申请号：US12000514

申请日：2007-12-13

申请人： Hitoshi Mitani

发明人： Hitoshi Mitani

IPC分类号： H01L23/52

CPC分类号： H01L23/5258 ,  H01L23/62 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： Provided is a semiconductor chip (1) including: at least one fuse element (21); a fuse opening (17) formed above the fuse element (21); and a discharge electrode (31) that is formed below a bottom portion (17a) of the fuse opening (17), and is formed in one of the same layer with the fuse element (21) and the above layer of the fuse element (21). Accordingly, the current caused to flow due to the electrostatic discharge generated at the time of assembling the semiconductor chip can be discharged through the discharge electrode (31). As a result, the current caused to flow due to the electrostatic discharge generated at the time of assembling the semiconductor chip can be prevented from being discharged through the fuse element, whereby a problem in that a functional failure occurs in the semiconductor chip can be solved.

摘要翻译： 提供一种半导体芯片（1），包括：至少一个熔丝元件（21）; 形成在熔丝元件（21）上方的保险丝开口（17）; 和形成在保险丝开口（17）的底部（17a）的下方的放电电极（31），并且与熔丝元件（21）和熔丝元件的上述层 21）。 因此，由于在组装半导体芯片时产生的静电放电引起的流过的电流可以通过放电电极（31）放电。 结果，可以防止由于在组装半导体芯片时产生的静电放电而流过的电流通过熔丝元件放电，从而可以解决在半导体芯片中发生功能故障的问题 。

公开(公告)号：US07745936B2

公开(公告)日：2010-06-29

申请号：US12164507

申请日：2008-06-30

申请人： Hitoshi Mitani

发明人： Hitoshi Mitani

IPC分类号： H01L23/48

CPC分类号： H01L27/11206 ,  H01L23/552 ,  H01L27/10 ,  H01L27/105 ,  H01L27/1214 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor integrated circuit device includes a substrate having a PROM formed thereon in which the data memory state of the PROM is changed by the irradiation of light, and a multilayer wiring structure formed on the same side of the substrate as the PROM is formed. The multilayer wiring structure includes a transparent area, a shield area, and a PAD portion. The transparent area is formed from transparent material at a position opposite to the PROM area where the PROM is formed, and used as a light guiding path from the outside of the multilayer wiring structure to the PROM. The shield area is formed continuously from shielding materials arranged in several layers in the periphery of the transparent area. The PAD portion is formed on the outside of the shield area in regard to the transparent area, and controls the memory state of the PROM.

摘要翻译： 半导体集成电路器件包括其上形成有PROM的衬底，其中PROM的数据存储状态由于光的照射而改变，并且形成在与PROM相同的衬底的同一侧上的多层布线结构。 多层布线结构包括透明区域，屏蔽区域和PAD部分。 透明区域由与形成PROM的PROM区域相反的位置处的透明材料形成，并且用作从多层布线结构的外部到PROM的导光路径。 屏蔽区域从在透明区域的周边排列成几层的屏蔽材料连续地形成。 相对于透明区域，PAD部分形成在屏蔽区域的外侧，并且控制PROM的存储状态。