Abstract:
A diode comprises a p-doped region, an n-doped region, and a light-sensitive intrinsic region sandwiched laterally between the p-doped region and the n-doped region in a direction transverse to a direction of light propagation in the diode. The p-doped region is made of a first material doped with a first type of dopant and the n-doped region is made of a third material doped with a second type of dopant. The first material includes Si or SiGe. The third material includes Si or SiGe. The intrinsic region is made of a second material, that includes Ge, GeSn, or SiGe. The intrinsic region has a maximal lateral extension between two lateral ends of the intrinsic region of equal to or below 400 nm. The p-doped region and the n-doped region are in-situ doped such that the intrinsic region is not doped when the diode is produced.
Abstract:
An apparatus and a method for recovering clock and data from a multilevel pulse amplitude modulated signal received as input signal is suggested. The apparatus comprises a phase detector, a low-pass filter, a voltage-controlled oscillator, and a feedback loop forming a CDR loop. The voltage-controlled oscillator outputs a clock signal that is provided to the phase detector. The phase detector receives an MSB signal from a sampler. The apparatus also comprises an interleave circuit configured to receive the input signal and to generate two output signals having a smaller symbol rate than the input signal. The apparatus further comprises a logical gate configured to receive the output signals from the interleave circuit and to generate an enable signal for the phase detector indicating symmetrical transitions in the input signal. Lastly, the apparatus comprises a converter converting the output signals from the interleave circuit into an MSB and an LSB bit stream.
Abstract:
A hardware accelerator is disclosed for performing a computational operation in a cryptographic application comprises one or more addressable computational blocks and a plurality of addressable register blocks. A bus is used for data exchange between the blocks in the form of read-from-bus operations and write-to-bus operations in the course of performing the computational operation. A controller for controlling the data exchange performs a block addressing operation using a respective pre-assigned first address of the blocks for addressing the one or more of the blocks involved in a write-to-bus operation in the data exchange. The controller performs a dummy-addressing selection operation to select one or more of the blocks for a dummy addressing operation and a dummy-addressing operation of the selected one or more of the blocks for dummy-addressing the one or more of the selected blocks in the write-to-bus operation.
Abstract:
The invention relates to an amplification circuit (100), comprising: a VGA (2), an AGC loop (10) for automatically controlling the gain of the VGA (2), a switching circuit (14) for switching between an AGC mode, in which the gain of the VGA (2) is automatically controlled by an output signal of the AGC loop (10) and a manual gain control, MGC, mode, in which the gain of the VGA (2) can be manually controlled by an input signal, and a read/write circuit (30) with a contact (31) for connection to a peripheral system, wherein the read/write circuit (30) is configured, in the MGC mode, to provide the input signal from the contact (31) via a write-mode path (32) to the VGA (2), and, in the AGC mode, to provide the output signal of the AGC loop (10) via a read-mode path (33) on the contact (31).
Abstract:
A method and system for oversampling a waveform with variable oversampling factor is suggested. The method and for dynamic selection of the oversampling factor are based on a modified equivalent time sampling approach. Multiple waveforms are transmitted, which are separated by a variable delay. The method permits that a receiver selects a different oversampling factor for the received waveform. As a result the method and system provide for oversampling a waveform with a variable, dynamically selectable oversampling factor.
Abstract:
A method of determining a position of at least one transceiver node comprises, anchor node by anchor node, transmitting respective positioning frames suitable for reception by a transceiver node and by the other anchor nodes. The transceiver node receives the positioning frames transmitted by the anchor nodes and ascertains respective times of reception for each. A solver stage determines the coordinates (xs, ys, zs) of the respective transceiver node and the time ts of transmission of the first positioning frame by an anchor node of first rank in the positioning sequence by numerically solving a non-linear system of at least five equations.
Abstract:
A measuring carrier for position-resolved meteorological determination of a measurement variable dependent on the dielectric permittivity of a device under test. The measuring carrier has a supporting means comprising a measuring surface, to which the device under test can be applied, and a measuring transmission line which entirely or partially forms the measuring surface and comprises a multiplicity of transmission line cells for the purpose of transmitting a radio-frequency measurement signal which can be injected at the input port. The measuring surface is structured in a cellular manner, wherein each of the transmission line cells has a cell-individual propagation constant with respect to the radio-frequency measurement signal in a state free of a device under test. This constant differs from the respective cell-individual constants of the other transmission line cells.
Abstract:
A diode is described which comprises a light-sensitive germanium region (5) located on a waveguide (2) made of silicon or silicon germanium and which has lateral dimensions in a direction transverse to a direction of light propagation in the waveguide that are identical or at most 20 nm per side shorter in comparison with the waveguide.
Abstract:
A semiconductor device, in particular an integrated circuit with protection against side channel attacks, in particular imaging- and probing-based attacks, EMA and reverse engineering, in which a metallic conductive layer of a first (104) and/or a second potential supply line (106) are each connected directly and individually to all the circuit components via respective individual conductor path structures (V1, V2).
Abstract:
A semiconductor light emitter device, comprising a substrate, an active layer made of Germanium, which is configured to emit light under application of an operating voltage to the semiconductor light emitter device, wherein a gap is arranged on the substrate, which extends between two bridgeposts laterally spaced from each other, the active layer is arranged on the bridgeposts and bridges the gap, and wherein the semiconductor light emitter device comprises a stressor layer, which induces a tensile strain in the active layer above the gap.