公开(公告)号：US20120313332A1

公开(公告)日：2012-12-13

申请号：US13495837

申请日：2012-06-13

Applicant: Chang-Seong Jeon ,  Sangwook Park ,  TeakHoon Lee ,  Ilyoung Han

Inventor： Chang-Seong Jeon ,  Sangwook Park ,  TeakHoon Lee ,  Ilyoung Han

IPC: H01L21/683

CPC classification number: H01L21/6838 ,  H01L24/16 ,  H01L24/75 ,  H01L24/81 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/06181 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/73104 ,  H01L2224/75315 ,  H01L2224/75745 ,  H01L2224/7598 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/014 ,  Y10T279/11 ,  H01L2224/81

Abstract: Apparatuses of manufacturing semiconductor packages are provided. An apparatus includes a chuck having a body, a porous plate disposed on the body, and a buffer pad disposed on the plate to provide a place on which a plurality of chips are loaded. The buffer pad has elasticity greater than the plate. The apparatus also includes a vacuum part supplying vacuum to the chuck so that the plurality of chips are sucked onto the buffer pad. Methods of manufacturing semiconductor packages using the apparatus are also provided.

Abstract translation: 提供制造半导体封装的装置。 一种装置包括具有主体的卡盘，设置在主体上的多孔板，以及设置在板上的缓冲垫，以提供加载有多个芯片的位置。 缓冲垫具有大于板的弹性。 该装置还包括一个向卡盘提供真空的真空部分，使得多个芯片被吸到缓冲垫上。 还提供了使用该装置制造半导体封装的方法。

公开(公告)号：US09245787B2

公开(公告)日：2016-01-26

申请号：US13495837

申请日：2012-06-13

Applicant: Chang-Seong Jeon ,  Sangwook Park ,  TeakHoon Lee ,  Ilyoung Han

Inventor： Chang-Seong Jeon ,  Sangwook Park ,  TeakHoon Lee ,  Ilyoung Han

IPC: B25B11/00 ,  H01L21/683 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L21/6838 ,  H01L24/16 ,  H01L24/75 ,  H01L24/81 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/06181 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/73104 ,  H01L2224/75315 ,  H01L2224/75745 ,  H01L2224/7598 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/014 ,  Y10T279/11 ,  H01L2224/81

Abstract: Apparatuses of manufacturing semiconductor packages are provided. An apparatus includes a chuck having a body, a porous plate disposed on the body, and a buffer pad disposed on the plate to provide a place on which a plurality of chips are loaded. The buffer pad has elasticity greater than the plate. The apparatus also includes a vacuum part supplying vacuum to the chuck so that the plurality of chips are sucked onto the buffer pad. Methods of manufacturing semiconductor packages using the apparatus are also provided.

Abstract translation: 提供制造半导体封装的装置。 一种装置包括具有主体的卡盘，设置在主体上的多孔板，以及设置在板上的缓冲垫，以提供加载有多个芯片的位置。 缓冲垫具有大于板的弹性。 该装置还包括一个向卡盘提供真空的真空部分，使得多个芯片被吸到缓冲垫上。 还提供了使用该装置制造半导体封装的方法。

公开(公告)号：US09640507B2

公开(公告)日：2017-05-02

申请号：US14261489

申请日：2014-04-25

Applicant: Ilyoung Han ,  Kyoungran Kim ,  Donggil Shim ,  Youngjoo Lee ,  Byunggon Kim ,  Byeongkap Choi

Inventor： Ilyoung Han ,  Kyoungran Kim ,  Donggil Shim ,  Youngjoo Lee ,  Byunggon Kim ,  Byeongkap Choi

IPC: B32B41/00 ,  H01L23/00 ,  H01L21/67 ,  H01L21/677 ,  H01L25/065 ,  H01L25/00 ,  H01L21/66 ,  H01L25/18

CPC classification number: H01L24/81 ,  H01L21/67092 ,  H01L21/67766 ,  H01L22/12 ,  H01L24/75 ,  H01L24/83 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/13101 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75745 ,  H01L2224/75803 ,  H01L2224/75804 ,  H01L2224/75823 ,  H01L2224/759 ,  H01L2224/7598 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/81948 ,  H01L2224/83203 ,  H01L2224/83855 ,  H01L2224/83948 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06565 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A bonding method for bonding a semiconductor chip to an underlying structure includes aligning an electrical contact of a lower surface of the semiconductor chip with an electrical connection member of an upper surface of the underlying structure, the electrical contact at least partially encased by a support material. The method further includes first heating the semiconductor chip and the underlying structure, deforming the electrical contact, and curing the support material encasing the deformed electrical contact. The method still further includes second heating the semiconductor chip and the underlying structure to bond the electrical contact of the semiconductor chip to the electrical connection member of the underlying structure while maintaining the support material in a cured state.

公开(公告)号：US20150053350A1

公开(公告)日：2015-02-26

申请号：US14261489

申请日：2014-04-25

Applicant: ILYOUNG HAN ,  KYOUNGRAN KIM ,  DONGGIL SHIM ,  YOUNGJOO LEE ,  BYUNGGON KIM ,  BYEONGKAP CHOI

Inventor： ILYOUNG HAN ,  KYOUNGRAN KIM ,  DONGGIL SHIM ,  YOUNGJOO LEE ,  BYUNGGON KIM ,  BYEONGKAP CHOI

IPC: H01L23/00 ,  H01L21/683

CPC classification number: H01L24/81 ,  H01L21/67092 ,  H01L21/67766 ,  H01L22/12 ,  H01L24/75 ,  H01L24/83 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/13101 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75745 ,  H01L2224/75803 ,  H01L2224/75804 ,  H01L2224/75823 ,  H01L2224/759 ,  H01L2224/7598 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/81948 ,  H01L2224/83203 ,  H01L2224/83855 ,  H01L2224/83948 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06565 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A bonding method for bonding a semiconductor chip to an underlying structure includes aligning an electrical contact of a lower surface of the semiconductor chip with an electrical connection member of an upper surface of the underlying structure, the electrical contact at least partially encased by a support material. The method further includes first heating the semiconductor chip and the underlying structure, deforming the electrical contact, and curing the support material encasing the deformed electrical contact. The method still further includes second heating the semiconductor chip and the underlying structure to bond the electrical contact of the semiconductor chip to the electrical connection member of the underlying structure while maintaining the support material in a cured state.

Abstract translation: 用于将半导体芯片接合到下面的结构的接合方法包括将半导体芯片的下表面的电接触与下层结构的上表面的电连接构件对准，电接触件至少部分地被支撑材料包围 。 该方法还包括首先加热半导体芯片和下面的结构，使电接触变形，以及固化包围变形的电接触的支撑材料。 该方法还包括第二加热半导体芯片和下面的结构，以将半导体芯片的电接触连接到下面结构的电连接构件，同时将支撑材料保持在固化状态。