公开(公告)号：US08525321B2

公开(公告)日：2013-09-03

申请号：US13177060

申请日：2011-07-06

Applicant: Jatinder Kumar ,  David Chong

Inventor： Jatinder Kumar ,  David Chong

IPC: H01L23/24

CPC classification number: H01L23/28 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/4951 ,  H01L23/49517 ,  H01L23/49548 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00

Abstract: In one implementation, an apparatus includes a semiconductor die, a lead, a non-conductive epoxy, and a conductive epoxy. The semiconductor die includes an upper surface and a lower surface opposite the upper surface. The lead is electrically coupled to the upper surface of the semiconductor die. The non-conductive epoxy is disposed on a first portion of the lower surface of the semiconductor die. The conductive epoxy is disposed on a second portion of the lower surface of the semiconductor die. In some implementations, a conductive wire extends from the lead to the upper surface of the semiconductor die to electrically couple the lead to the upper surface of the semiconductor die.

Abstract translation: 在一个实施方案中，装置包括半导体管芯，引线，非导电环氧树脂和导电环氧树脂。 半导体管芯包括与上表面相对的上表面和下表面。 引线电耦合到半导体管芯的上表面。 非导电性环氧树脂设置在半导体管芯的下表面的第一部分上。 导电环氧树脂设置在半导体管芯的下表面的第二部分上。 在一些实施方案中，导线从引线延伸到半导体管芯的上表面，以将引线电耦合到半导体管芯的上表面。

公开(公告)号：US20120306066A1

公开(公告)日：2012-12-06

申请号：US13589337

申请日：2012-08-20

Applicant: Shutesh Krishnan ,  Chee Hiong Chew ,  Jatinder Kumar

Inventor： Shutesh Krishnan ,  Chee Hiong Chew ,  Jatinder Kumar

IPC: H01L23/495 ,  H01L21/60

CPC classification number: H01L23/49541 ,  H01L23/3107 ,  H01L23/49548 ,  H01L23/49861 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electronic device can include a packaging material having a first surface and a second surface opposite the first surface, and leads including die connection surfaces and external connection surfaces. The electronic device can further include a trench extending from an upper surface of the packaging substrate towards a lower surface of the packaging substrate, wherein a set of leads lie immediately adjacent to the trench, and the packaging material is exposed at the bottom of the trench. In an embodiment, an encapsulant is formed over the upper surface of the packaging substrate and within the trench. In a particular embodiment, the trenches may be formed before or after placing a die over the packaging substrate, or before or after forming electrical connections between the die and leads of the packaging substrate.

Abstract translation: 电子设备可以包括具有第一表面和与第一表面相对的第二表面的包装材料，并且包括裸片连接表面和外部连接表面的引线。 电子设备还可以包括从包装衬底的上表面朝向包装衬底的下表面延伸的沟槽，其中一组引线紧邻沟槽，并且包装材料暴露在沟槽的底部 。 在一个实施例中，密封剂形成在包装衬底的上表面之上并且在沟槽内。 在特定实施例中，沟槽可以在将芯片放置在封装衬底上之前或之后形成，或者在形成封装衬底的管芯和引线之间的电连接之前或之后形成沟槽。

公开(公告)号：US20110115061A1

公开(公告)日：2011-05-19

申请号：US12697002

申请日：2010-01-29

Applicant: Shutesh Krishnan ,  Chee Hiong Chew ,  Jatinder Kumar

Inventor： Shutesh Krishnan ,  Chee Hiong Chew ,  Jatinder Kumar

IPC: H01L23/495 ,  H01L21/60

CPC classification number: H01L23/49541 ,  H01L23/3107 ,  H01L23/49548 ,  H01L23/49861 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electronic device can include a packaging material having a first surface and a second surface opposite the first surface, and leads including die connection surfaces and external connection surfaces. The electronic device can further include a trench extending from an upper surface of the packaging substrate towards a lower surface of the packaging substrate, wherein a set of leads lie immediately adjacent to the trench, and the packaging material is exposed at the bottom of the trench. In an embodiment, an encapsulant is formed over the upper surface of the packaging substrate and within the trench. In a particular embodiment, the trenches may be formed before or after placing a die over the packaging substrate, or before or after forming electrical connections between the die and leads of the packaging substrate.

Abstract translation: 电子设备可以包括具有第一表面和与第一表面相对的第二表面的包装材料，并且包括裸片连接表面和外部连接表面的引线。 电子设备还可以包括从包装衬底的上表面朝向包装衬底的下表面延伸的沟槽，其中一组引线紧邻沟槽，并且包装材料暴露在沟槽的底部 。 在一个实施例中，密封剂形成在包装衬底的上表面之上并且在沟槽内。 在特定实施例中，沟槽可以在将芯片放置在封装衬底上之前或之后形成，或者在形成封装衬底的管芯和引线之间的电连接之前或之后形成沟槽。

公开(公告)号：US07402895B2

公开(公告)日：2008-07-22

申请号：US11403978

申请日：2006-04-14

Applicant: Shutesh Krishnan ,  Jatinder Kumar

Inventor： Shutesh Krishnan ,  Jatinder Kumar

IPC: H01L23/495

CPC classification number: H01L23/3107 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/0603 ,  H01L2224/32245 ,  H01L2224/40245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15313 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/37099

Abstract: In one embodiment, a semiconductor package includes a conductive slug and columnar leads in spaced relationship thereto. The columnar leads are coupled to an electronic device attached to the slug, and are exposed at least on one side of the package opposite the die attach slug. The die attach slug is further exposed to provide a package configured in a slug up orientation.

Abstract translation: 在一个实施例中，半导体封装包括与其间隔开的导电块和柱形引线。 柱状引线耦合到附接到芯块的电子器件，并且至少在封装的与管芯附接块相对的一侧上暴露。 芯片附接芯片被进一步暴露以提供以小插头方向配置的封装。

公开(公告)号：US07398703B2

公开(公告)日：2008-07-15

申请号：US10524496

申请日：2003-04-28

Applicant: Amit Nath ,  Surender Kumar Patyal ,  Jatinder Kumar Dubey

Inventor： Amit Nath ,  Surender Kumar Patyal ,  Jatinder Kumar Dubey

IPC: G01N1/14 ,  G01N30/18

CPC classification number: G01N1/40 ,  G01N1/4022 ,  G01N2001/2229 ,  G01N2030/025

Abstract: A process for the estimation of volatile substances which comprises the steps of: (i) heating distilled water in a flask to a first temperature, (ii) adding the sample to be tested into said heated water, (iii) closing the flask, (iv) maintaining the flask containing the sample at a second temperature lower than said first temperature, (v) purging with air, (vi) drawing the volatile vapours and subjecting it to analysis.

Abstract translation: 一种用于估计挥发性物质的方法，其包括以下步骤：（i）将烧瓶中的蒸馏水加热至第一温度，（ii）将待测样品加入所述加热的水中，（iii）关闭烧瓶（ iv）将含有样品的烧瓶保持在低于第一温度的第二温度，（v）用空气吹扫，（vi）拉伸挥发性蒸气并对其进行分析。

公开(公告)号：US08519521B2

公开(公告)日：2013-08-27

申请号：US13589337

申请日：2012-08-20

Applicant: Shutesh Krishnan ,  Chee Hiong Chew ,  Jatinder Kumar

Inventor： Shutesh Krishnan ,  Chee Hiong Chew ,  Jatinder Kumar

IPC: H01L23/495

CPC classification number: H01L23/49541 ,  H01L23/3107 ,  H01L23/49548 ,  H01L23/49861 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electronic device can include a packaging material having a first surface and a second surface opposite the first surface, and leads including die connection surfaces and external connection surfaces. The electronic device can further include a trench extending from an upper surface of the packaging substrate towards a lower surface of the packaging substrate, wherein a set of leads lie immediately adjacent to the trench, and the packaging material is exposed at the bottom of the trench. In an embodiment, an encapsulant is formed over the upper surface of the packaging substrate and within the trench. In a particular embodiment, the trenches may be formed before or after placing a die over the packaging substrate, or before or after forming electrical connections between the die and leads of the packaging substrate.

Abstract translation: 电子设备可以包括具有第一表面和与第一表面相对的第二表面的包装材料，并且包括裸片连接表面和外部连接表面的引线。 电子设备还可以包括从包装衬底的上表面朝向包装衬底的下表面延伸的沟槽，其中一组引线紧邻沟槽，并且包装材料暴露在沟槽的底部 。 在一个实施例中，密封剂形成在包装衬底的上表面之上并且在沟槽内。 在特定实施例中，沟槽可以在将芯片放置在封装衬底上之前或之后形成，或者在形成封装衬底的管芯和引线之间的电连接之前或之后形成沟槽。

公开(公告)号：US20090102028A1

公开(公告)日：2009-04-23

申请号：US12049909

申请日：2008-03-17

Applicant: Shutesh Krishnan ,  Soon Wei Wang ,  Jatinder Kumar

Inventor： Shutesh Krishnan ,  Soon Wei Wang ,  Jatinder Kumar

IPC: H01L21/60 ,  H01L21/56 ,  H01L23/495

CPC classification number: H01L23/49582 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/49541 ,  H01L24/28 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2224/05554 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4911 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83001 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83855 ,  H01L2224/83856 ,  H01L2224/8388 ,  H01L2224/85001 ,  H01L2224/85439 ,  H01L2224/85455 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/18301 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2224/85 ,  H01L2924/07025 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A method for manufacturing a semiconductor component that includes a leadframe having a non-metallic base structure and an intermediate leadframe structure. The non-metallic base structure may be, among other things, paper, cellulose, or plastic. A layer of electrically conductive material is formed over the non-metallic base structure. A circuit element attach structure and a plurality of leadframe leads are formed from the layer of electrically conductive material. A circuit element is coupled to the circuit element attach structure and electrically coupled to the plurality of leadframe leads. The circuit element is encapsulated and at least the non-metallic base structure is removed. Alternatively, a plurality of leadframe leads may be formed on the electrically conductive layer and a circuit element is placed over the electrically conductive layer. The circuit element is electrically coupled to the plurality of leadframe leads and encapsulated. The non-metallic base structure and the electrically conductive layer are removed.

Abstract translation: 一种半导体元件的制造方法，其包括具有非金属基底结构的引线框架和中间引线框架结构。 非金属基底结构可以是纸，纤维素或塑料等。 在非金属基底结构上形成一层导电材料。 电路元件连接结构和多个引线框引线由导电材料层形成。 电路元件耦合到电路元件连接结构并电耦合到多个引线框引线。 电路元件被封装，并且至少去除非金属基底结构。 或者，可以在导电层上形成多个引线框引线，并且将电路元件放置在导电层上。 电路元件电耦合到多个引线框引线并被封装。 去除非金属基底结构和导电层。

公开(公告)号：US3950559A

公开(公告)日：1976-04-13

申请号：US497749

申请日：1974-08-15

Applicant: Jatinder Kumar Kapoor ,  John Norman Turner

Inventor： Jatinder Kumar Kapoor ,  John Norman Turner

IPC: A23B7/10 ,  A23B7/154 ,  A23L3/00 ,  A23L3/34 ,  A23B7/14

CPC classification number: A23B7/154 ,  A23B7/10 ,  A23L3/00

Abstract: Post harvest treatment of bananas with gibberellins A.sub.4 /A.sub.7 optionally mixed with a fungicide, in amounts sufficient to delay ripening.

Abstract translation: 用赤霉素A4 / A7对香蕉进行收获后处理，任选与杀真菌剂混合，其量足以延缓成熟。

公开(公告)号：US08268676B2

公开(公告)日：2012-09-18

申请号：US12697002

申请日：2010-01-29

Applicant: Shutesh Krishnan ,  Chee Hiong Chew ,  Jatinder Kumar

Inventor： Shutesh Krishnan ,  Chee Hiong Chew ,  Jatinder Kumar

IPC: H01L21/60

CPC classification number: H01L23/49541 ,  H01L23/3107 ,  H01L23/49548 ,  H01L23/49861 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electronic device can include a packaging material having a first surface and a second surface opposite the first surface, and leads including die connection surfaces and external connection surfaces. The electronic device can further include a trench extending from an upper surface of the packaging substrate towards a lower surface of the packaging substrate, wherein a set of leads lie immediately adjacent to the trench, and the packaging material is exposed at the bottom of the trench. In an embodiment, an encapsulant is formed over the upper surface of the packaging substrate and within the trench. In a particular embodiment, the trenches may be formed before or after placing a die over the packaging substrate, or before or after forming electrical connections between the die and leads of the packaging substrate.

Abstract translation: 电子设备可以包括具有第一表面和与第一表面相对的第二表面的包装材料，并且包括裸片连接表面和外部连接表面的引线。 电子设备还可以包括从包装衬底的上表面朝向包装衬底的下表面延伸的沟槽，其中一组引线紧邻沟槽，并且包装材料暴露在沟槽的底部 。 在一个实施例中，密封剂形成在包装衬底的上表面之上并且在沟槽内。 在特定实施例中，沟槽可以在将芯片放置在封装衬底上之前或之后形成，或者在形成封装衬底的管芯和引线之间的电连接之前或之后形成沟槽。

公开(公告)号：US20070138610A1

公开(公告)日：2007-06-21

申请号：US11403978

申请日：2006-04-14

Applicant: Shutesh Krishnan ,  Jatinder Kumar

Inventor： Shutesh Krishnan ,  Jatinder Kumar

IPC: H01L23/495

CPC classification number: H01L23/3107 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/0603 ,  H01L2224/32245 ,  H01L2224/40245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15313 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/37099

Abstract: In one embodiment, a semiconductor package includes a conductive slug and columnar leads in spaced relationship thereto. The columnar leads are coupled to an electronic device attached to the slug, and are exposed at least on one side of the package opposite the die attach slug. The die attach slug is further exposed to provide a package configured in a slug up orientation.

Abstract translation: 在一个实施例中，半导体封装包括与其间隔开的导电块和柱形引线。 柱状引线耦合到附接到芯块的电子器件，并且至少在封装的与管芯附接块相对的一侧上暴露。 芯片附接芯片被进一步暴露以提供以小插头方向配置的封装。