公开(公告)号：US09176808B2

公开(公告)日：2015-11-03

申请号：US13724011

申请日：2012-12-21

申请人： Hojun Shim ,  Je-Hyuck Song ,  Kwanggu Lee

发明人： Hojun Shim ,  Je-Hyuck Song ,  Kwanggu Lee

IPC分类号： G11C29/00 ,  G06F11/10

CPC分类号： G06F11/10 ,  G06F11/1004 ,  G06F12/0246 ,  G06F2212/1032 ,  G06F2212/1044 ,  G06F2212/401 ,  G06F2212/7203 ,  G06F2212/7207

摘要： A storage device which includes a user area of a memory cell array; a buffer area configured to temporarily store compressed data to be written into the user area; and compressed data management logic configured to control the user area and the buffer area such that compressed data stored in the buffer area is written into the user area. The compressed data management logic manages compressed data to be written into the user area by an ECC block unit rather than by a page-size unit.

摘要翻译： 一种存储装置，包括存储单元阵列的用户区域; 缓冲区域，被配置为临时存储要写入用户区域的压缩数据; 以及被配置为控制用户区域和缓冲区域的压缩数据管理逻辑，使得存储在缓冲区域中的压缩数据被写入用户区域。 压缩数据管理逻辑通过ECC块单元而不是页大小单元来管理要写入用户区的压缩数据。

公开(公告)号：US08614919B2

公开(公告)日：2013-12-24

申请号：US13137422

申请日：2011-08-15

申请人： Jaesoo Lee ,  Kangho Roh ,  Wonhee Cho ,  Hojun Shim ,  Youngjoon Choi ,  Jaehoon Heo ,  Je-Hyuck Song ,  Seung-Duk Cho ,  Seontaek Kim ,  Moonwook Oh ,  Jong Tae Park ,  Wonmoon Cheon ,  Chanik Park ,  Yang-sup Lee

发明人： Jaesoo Lee ,  Kangho Roh ,  Wonhee Cho ,  Hojun Shim ,  Youngjoon Choi ,  Jaehoon Heo ,  Je-Hyuck Song ,  Seung-Duk Cho ,  Seontaek Kim ,  Moonwook Oh ,  Jong Tae Park ,  Wonmoon Cheon ,  Chanik Park ,  Yang-sup Lee

IPC分类号： G11C16/04

CPC分类号： G11C11/5628 ,  G06F12/0246 ,  G06F2212/7201 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/3418 ,  G11C16/3431 ,  G11C29/00 ,  G11C2211/5621 ,  Y02D10/13

摘要： A memory system is provided with a processor, a main memory, and a flash memory. Performance of the memory system is improved through achievement of speed-up and high data reliability. The memory system includes a nonvolatile memory device and a controller configured to drive a control program to control the nonvolatile memory device. The control program executes a second access operation for the nonvolatile memory device even before a first access operation to the nonvolatile memory device is completed.

公开(公告)号：US20090106509A1

公开(公告)日：2009-04-23

申请号：US12238592

申请日：2008-09-26

申请人： Ho-Jun SHIM ,  Je-Hyuck SONG ,  Seung-Duk CHO

发明人： Ho-Jun SHIM ,  Je-Hyuck SONG ,  Seung-Duk CHO

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7208

摘要： Provided are a memory system and a method of driving the same. The method includes setting microcodes in a top control sequencer and multiple channel control sequencers, and executing the microcode set in the top control sequencer. The method may further include checking execution results of the microcode.

摘要翻译： 提供一种存储系统及其驱动方法。 该方法包括在顶部控制定序器和多个通道控制定序器中设置微码，以及执行顶部控制定序器中的微代码集。 该方法还可以包括检查微代码的执行结果。

公开(公告)号：US09684361B2

公开(公告)日：2017-06-20

申请号：US14599054

申请日：2015-01-16

申请人： Hyun Tae Park ,  Je Hyuck Song ,  Jong Kyun Min ,  Chang Duck Lee ,  Hyun Kyu Jang

发明人： Hyun Tae Park ,  Je Hyuck Song ,  Jong Kyun Min ,  Chang Duck Lee ,  Hyun Kyu Jang

IPC分类号： G06F1/00 ,  G06F1/32

CPC分类号： G06F1/3287 ,  G06F1/3278 ,  Y02D10/157 ,  Y02D10/171

摘要： In a method of operating a device, signals associated with wakeup of the device are detected using a first physical layer among a plurality of physical layers, and a detection signal is generated based on the detected signals. The detection signal is transmitted directly to a power management circuit. The first physical layer is included in logical lane #0 or physical lane #0.

公开(公告)号：US08638585B2

公开(公告)日：2014-01-28

申请号：US13137409

申请日：2011-08-12

申请人： Jaesoo Lee ,  Kangho Roh ,  Wonhee Cho ,  Hojun Shim ,  Youngjoon Choi ,  Jaehoon Heo ,  Je-Hyuck Song ,  Seung-Duk Cho ,  Seontaek Kim ,  Moonwook Oh ,  Jong Tae Park ,  Wonmoon Cheon ,  Chanik Park ,  Yang-sup Lee

发明人： Jaesoo Lee ,  Kangho Roh ,  Wonhee Cho ,  Hojun Shim ,  Youngjoon Choi ,  Jaehoon Heo ,  Je-Hyuck Song ,  Seung-Duk Cho ,  Seontaek Kim ,  Moonwook Oh ,  Jong Tae Park ,  Wonmoon Cheon ,  Chanik Park ,  Yang-sup Lee

IPC分类号： G11C5/02

CPC分类号： G11C11/5628 ,  G06F12/0246 ,  G06F2212/7201 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/3418 ,  G11C16/3431 ,  G11C29/00 ,  G11C2211/5621 ,  Y02D10/13

摘要： A memory system is provided with a processor, a main memory, and a flash memory. Performance of the memory system is improved through achievement of speed-up and high data reliability. The memory system includes a nonvolatile memory device and a controller configured to drive a control program to control the nonvolatile memory device. The control program executes a second access operation for the nonvolatile memory device even before a first access operation to the nonvolatile memory device is completed.

公开(公告)号：US08565021B2

公开(公告)日：2013-10-22

申请号：US13137401

申请日：2011-08-11

申请人： Jaesoo Lee ,  Kangho Roh ,  Wonhee Cho ,  Hojun Shim ,  Youngjoon Choi ,  Jaehoon Heo ,  Je-Hyuck Song ,  Seung-Duk Cho ,  Seontaek Kim ,  Moonwook Oh ,  Jong Tae Park ,  Wonmoon Cheon ,  Chanik Park ,  Yang-sup Lee

发明人： Jaesoo Lee ,  Kangho Roh ,  Wonhee Cho ,  Hojun Shim ,  Youngjoon Choi ,  Jaehoon Heo ,  Je-Hyuck Song ,  Seung-Duk Cho ,  Seontaek Kim ,  Moonwook Oh ,  Jong Tae Park ,  Wonmoon Cheon ,  Chanik Park ,  Yang-sup Lee

IPC分类号： G11C16/04

CPC分类号： G11C11/5628 ,  G06F12/0246 ,  G06F2212/7201 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/3418 ,  G11C16/3431 ,  G11C29/00 ,  G11C2211/5621 ,  Y02D10/13

摘要： A memory system is provided with a processor, a main memory, and a flash memory. Performance of the memory system is improved through achievement of speed-up and high data reliability. The memory system includes a nonvolatile memory device and a controller configured to drive a control program to control the nonvolatile memory device. The control program executes a second access operation for the nonvolatile memory device even before a first access operation to the nonvolatile memory device is completed.

公开(公告)号：US20110299335A1

公开(公告)日：2011-12-08

申请号：US13137401

申请日：2011-08-11

申请人： Jaesoo Lee ,  Kangho Roh ,  Wonhee Cho ,  Hojun Shim ,  Youngjoon Choi ,  Jaehoon Heo ,  Je-Hyuck Song ,  Seung-Duk Cho ,  Seontaek Kim ,  Moonwook Oh ,  Jong Tae Park ,  Wonmoon Cheon ,  Chanik Park ,  Yang-sup Lee

发明人： Jaesoo Lee ,  Kangho Roh ,  Wonhee Cho ,  Hojun Shim ,  Youngjoon Choi ,  Jaehoon Heo ,  Je-Hyuck Song ,  Seung-Duk Cho ,  Seontaek Kim ,  Moonwook Oh ,  Jong Tae Park ,  Wonmoon Cheon ,  Chanik Park ,  Yang-sup Lee

IPC分类号： G11C16/10

CPC分类号： G11C11/5628 ,  G06F12/0246 ,  G06F2212/7201 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/3418 ,  G11C16/3431 ,  G11C29/00 ,  G11C2211/5621 ,  Y02D10/13

摘要： A memory system is provided with a processor, a main memory, and a flash memory. Performance of the memory system is improved through achievement of speed-up and high data reliability. The memory system includes a nonvolatile memory device and a controller configured to drive a control program to control the nonvolatile memory device. The control program executes a second access operation for the nonvolatile memory device even before a first access operation to the nonvolatile memory device is completed.

公开(公告)号：US20150205339A1

公开(公告)日：2015-07-23

申请号：US14599054

申请日：2015-01-16

申请人： Hyun Tae PARK ,  Je Hyuck SONG ,  Jong Kyun MIN ,  Chang Duck LEE ,  Hyun Kyu JANG

发明人： Hyun Tae PARK ,  Je Hyuck SONG ,  Jong Kyun MIN ,  Chang Duck LEE ,  Hyun Kyu JANG

IPC分类号： G06F1/32

CPC分类号： G06F1/3287 ,  G06F1/3278 ,  Y02D10/157 ,  Y02D10/171

摘要： In a method of operating a device, signals associated with wakeup of the device are detected using a first physical layer among a plurality of physical layers, and a detection signal is generated based on the detected signals. The detection signal is transmitted directly to a power management circuit. The first physical layer is included in logical lane #0 or physical lane #0.

摘要翻译： 在操作设备的方法中，使用多个物理层中的第一物理层来检测与设备的唤醒相关联的信号，并且基于检测到的信号来生成检测信号。 检测信号被直接发送到电源管理电路。 第一物理层包含在逻辑通道＃0或物理通道＃0中。

公开(公告)号：US08593307B2

公开(公告)日：2013-11-26

申请号：US13364787

申请日：2012-02-02

申请人： Man-keun Seo ,  Jun-jin Kong ,  Hong-rak Son ,  Kyoung-Lae Cho ,  Je-hyuck Song ,  Kwang-gu Lee

发明人： Man-keun Seo ,  Jun-jin Kong ,  Hong-rak Son ,  Kyoung-Lae Cho ,  Je-hyuck Song ,  Kwang-gu Lee

IPC分类号： H03M7/40

CPC分类号： H03M7/40

摘要： At least one example embodiment discloses a method of compressing data in a storage device. The method includes determining a codeword length of a symbol using a first table indicating a relationship between a number of occurrences of the symbol in received data and the codeword length, determining a codeword having the codeword length for the symbol, and generating compressed data of the received data, the generating including converting the symbol into the codeword.

摘要翻译： 至少一个示例性实施例公开了一种在存储设备中压缩数据的方法。 该方法包括使用指示接收数据中的符号的出现次数与码字长度之间的关系的第一表来确定符号的码字长度，确定具有用于符号的码字长度的码字，以及生成 接收到的数据，生成包括将符号转换成码字。

公开(公告)号：US20130179752A1

公开(公告)日：2013-07-11

申请号：US13724011

申请日：2012-12-21

申请人： Hojun Shim ,  Je-Hyuck Song ,  Kwanggu Lee

发明人： Hojun Shim ,  Je-Hyuck Song ,  Kwanggu Lee

IPC分类号： G06F11/10

CPC分类号： G06F11/10 ,  G06F11/1004 ,  G06F12/0246 ,  G06F2212/1032 ,  G06F2212/1044 ,  G06F2212/401 ,  G06F2212/7203 ,  G06F2212/7207

摘要： A storage device which includes a user area of a memory cell array; a buffer area configured to temporarily store compressed data to be written into the user area; and compressed data management logic configured to control the user area and the buffer area such that compressed data stored in the buffer area is written into the user area. The compressed data management logic manages compressed data to be written into the user area by an ECC block unit rather than by a page-size unit.

摘要翻译： 一种存储装置，包括存储单元阵列的用户区域; 缓冲区域，被配置为临时存储要写入用户区域的压缩数据; 以及被配置为控制用户区域和缓冲区域的压缩数据管理逻辑，使得存储在缓冲区域中的压缩数据被写入用户区域。 压缩数据管理逻辑通过ECC块单元而不是页大小单元来管理要写入用户区的压缩数据。