摘要:
An automatic exposure (AE) sensor includes a line-selecting circuit for line selection between horizontal lines and vertical lines, in addition to components of a typical AE sensor. The line-selecting circuit temporally filters a SYNC pulse for notifying a subsequent circuit about a pulse timing of an imaging signal to select a line to be read out and to cause the subsequent circuit to change an active pixel region. The number of selected lines is determined by an external input. The active pixel region is reduced when the AE sensor is incorporated in a device having a low performance CPU, thereby reducing load on the CPU. The active pixel region is increased when the AE sensor is incorporated in a device having a high performance CPU, thereby effectively using the CPU performance to achieve higher density control.
摘要:
In the case of bending an outer pipe, a pressure die provided just in front of a bending section is provided with a groove, wherein the shape of the groove on the side far from the bending section is semi-circular and of which the diameter corresponds to that of the outer pipe before bending, while the shape of the groove on the side near the bending section is tapered semi-elliptically. With this, the cross-sectional shape of the outer pipe is caused to change into a substantially elliptical shape in which the outside of the section to be bent is tapered. The cross-sectional shape becomes substantially circular when bending is completed.
摘要:
A CCD delay line comprises of first, second and third transfer regions which are formed in a semiconductor substrate. Output portions of the second and third transfer regions are connected to a differential amplifier. The output terminal of the differential amplifier is connected to input sources of the first and second transfer regions. The third transfer region is able to carry at most 30% of maximum amount of charge which the first and second transfer regions can carry. A signal is supplied from a signal source through a clamp circuit to an input gate electrode of the first transfer region. Bias changing means independently change one of an input bias voltage supplied to the input gate electrode of the first transfer region and a reference bias voltage supplied to an input gate electrode of the second transfer region.
摘要:
Novel strains Paenibacillus sp. BS-0048, Paenibacillus sp. BS-0074, Paenibacillus polymyxa BS-0105 and Paenibacillus sp. BS-0277 and Fusaricidin A, Fusaricidin B and novel compounds 3 and 4 produced thereby have an activity of inducing resistance to plant diseases. Thus, they can protect plants from infections with fungi, bacteria, viruses and so on and, as a result, effectively control plant diseases.
摘要:
Novel strains Paenibacillus sp. BS-0048, Paenibacillus sp. BS-0074, Paenibacillus polymyxa BS-0105 and Paenibacillus sp. BS-0277 and Fusaricidin A, Fusaricidin B and novel compounds 3 and 4 produced thereby have an activity of inducing resistance to plant diseases. Thus, they can protect plants from infections with fungi, bacteria, viruses and so on and, as a result, effectively control plant diseases.
摘要:
In order to perform addition of the electric charges obtained from adjacent pixels in the same sensor row with a multiplexing structure type of solid-state image pick-up apparatus, a solid-state image pick-up apparatus of the present invention comprises: a first CCD register 10 that transfers electric charges acquired by a first light-receiving pixel row; a second CCD register 20 that transfers electric charges acquired by a second light-receiving pixel row; a multiplex section 30 that transfers the respective electric charges, transferred by the first CCD register 10 and second CCD register 20 toward a floating diffusion amplifier FD; and signal generator 3 that in the case of alternately-output mode, applies signals in opposite phase to each other to a final stage of the first CCD register 10 and a final stage of the second CCD register 20, respectively, and, in the case of an add-and-output mode, applies to the final stage of the second CCD register 20 a signal for accumulating the electric charge until a transfer time when the electric charges to be added to each other are transferred by the second CCD register 20 comes.
摘要:
An input structure of CCD comprises a primary register having an input gate and a source region and an automatic biasing system which generates a feedback signal to be fed back to input of the primary register. The output of the automatic biasing system is connected to one of the input gate and the source of the primary register for supplying the feedback signal thereto for adjusting input bias level of the primary register. The other one of the input gate and the source is connected to an information signal input terminal to receive therefrom an information signal to be transferred therethrough.
摘要:
An image input device or a solid-state image sensing device using a CCD linear sensor includes a main sensor array and a sub sensor array. A transfer register for the sub sensor array is provided with charge sweep means for sweeping away unnecessary charges. Thus, only signals in the main sensor array are selectively read out without being affected by signals in the sub sensor array.
摘要:
An input structure of CCD comprises a primary register having an input gate and a source region and an automatic biasing system which generates a feedback signal to be fed back to input of the primary register. The output of the automatic biasing system is connected to one of the input gate and the source of the primary register for supplying the feedback signal thereto for adjusting input bias level of the primary register. The other one of the input gate and the source is connected to an information signal input terminal to receive therefrom an information signal to be transferred therethrough.
摘要:
A configuration of an imaging device includes: an S/H circuit 9 which samples signal voltages read out from a plurality of charge-detecting circuits by a horizontal scanning circuit and output from an output amplifier 6, without the transfer of signal charges by a charge transfer portion; a memory 10 which stores signal voltages sampled by the S/H circuit 9 as memory voltages (Vm1 to Vm4); and a signal processing circuit 8 which executes predetermined signal processing, using signal voltages read out from the plurality of charge-detecting circuits by the horizontal scanning circuit and output from the output amplifier 6 and memory signals stored in the memory 10, with the transfer of signal charges read out from the photoelectric conversion portion to the charge transfer portion.